ONIX-FMC-INTF Interface and Peripherals Module

The Dgtronix mezzanine board provides a powerful breakout solution for development, verification, and system integration

Image of Dgtronix ONIX-FMC-INTF Interface and Peripherals Module The ONIX-FMC-INTF interface and peripherals module from Dgtronix is a high-versatility mezzanine board compliant with the VITA 57.1 FMC HPC standard. Designed for engineers working with FMC carrier cards and FPGA systems, it routes mezzanine signals into a broad set of interfaces such as Gigabit Ethernet (GbE), SATA, USB, PMOD, and high-speed u.FL connectors to provide a powerful breakout solution for development, verification, and system integration.

The FMC-INTF module supports full FMC HPC connectivity to a carrier board, implements multiple u.FL connectors for GTH lanes and user clocks, integrates USB-to-UART and USB-to-SPI bridges, includes a PMOD interface for FPGA I/O expansion, and offers front-panel LEDs for status and diagnostics. With its broad interface set and compact design, it accelerates prototype workflows, supports system debug, and simplifies mezzanine carrier connectivity for FPGA/ASIC platforms.

Features
  • VITA 57.1 FMC HPC connector for full mezzanine interfacing
  • Gigabit Ethernet (10/100/1000) interface via FMC connection
  • SATA interface routed through FMC
  • USB 2.0 PHY for host connectivity (USB-to-UART/USB-to-SPI) via FTDI bridge
  • PMOD interface (6-pin and 12-pin versions) for peripheral I/O expansion
  • Multiple u.FL connectors: GTH TX/RX lanes and user clock input
  • 10-pin user header for GPIO and control signals
  • Front-panel LEDs for status indication
  • Compact module footprint with full carrier compatibility
Applications
  • Rapid prototyping and development of FMC-based carrier cards
  • Debugging and system integration of mezzanine modules in FPGA/ASIC platforms
  • Interface breakout and I/O routing for mezzanine-to-system connectivity
  • Development and validation of high-speed peripheral interfaces (GbE, SATA, and USB) in modular systems
  • Expansion I/O for FPGA platforms using PMOD/u.FL interfaces
  • Lab/test environments requiring flexible mezzanine interfacing
Updated: 2026-02-09
Published: 2026-01-26