How to design general-purpose multichannel data acquisition system

Contributed By Digi-Key's European Editors

Data acquisition is a key function in robotics and the Industrial Internet of Things. Being able to power a data capture sub-system for multiple sensors from an energy-harvesting source opens up the potential to capture data from many more places, as well as reducing the need to recharge or replace batteries.

A multi-channel data acquisition sub-system can be built with power coming from solar cells or thermal energy via a thermoelectric generation (TEG), but the power consumption is a key consideration. Using an ultra-low-power successive approximation analog-to-digital converter (SAR ADC) such as the 12-bit AD7091R-5 from Analog Devices allows such a sub-system to be built that also has a small form factor. This is an increasingly important consideration, as the data acquisition board needs to fit into smaller places that do not have mains power available.

Figure 1 shows the combination of the AD7091R with an efficient energy harvesting circuit based on the Analog Devices’ ADP5090 boost regulator with four single-ended analog sensor inputs. The ADC has a typical power consumption of 100 µW on a single 3 V supply when sampling at the maximum 22 kSPS with a typical signal-to-noise ratio (SNR) of 68 dB for a 1 kHz input signal.

Image of Analog Devices AD7091 SAR ADC and ADP5090 boost converter

Figure 1: Combining the AD7091 SAR ADC and ADP5090 boost converter optimized for energy-harvesting sources.

The 12-bit SAR ADC operates from a single 2.7 V to 5.25 V power supply and includes an on-chip conversion clock, an accurate reference, and an I2C interface that operates in both standard mode at 100 kHz and a fast 400 kHz mode. A multiplexer output eliminates the need for a signal conditioning circuit in each channel when additional filtering is required so that the input signal of the active channel appears at the MUXOUT pin. The filters before the VIN pins are designed to have a cutoff frequency of about 8.6 MHz to attenuate noise at the ADC input and absorb the charge kickbacks from the ADC using a low series resistance value and a reasonably sized capacitor that can source and sink the high frequency charge kickbacks from the ADC. If no additional filtering or signal conditioning is required, the MUXOUT pin is tied directly to ADCIN.

A stable reference voltage is essential for data acquisition, so an on-chip 2.5 V reference is available on the REFIN/ REFOUT pin and the chip operates with either this or an externally applied reference. The logic state of the P_DOWN LSB bit in the configuration register determines whether the internal reference is used. The internal reference is selected for the ADCs when the P_DOWN LSB bit is set to 1. When the P_DOWN LSB bit is set to 0, an external reference in the range of 2.5 V to VDD can be supplied into the device through the REFIN/ REFOUT pin for less jitter and higher accuracy.

The internal reference circuitry consists of a 2.5 V band gap reference and a reference buffer and is disabled by default on power up so that an external reference can be used. Changing the configuration bit as part of the start up then allows the 2.5 V internal reference to be used at the REFIN/REFOUT pin, which is typically decoupled to GND using a 2.2 μF capacitor that requires 50 ms to power up. It is recommended to buffer the internal reference before applying it elsewhere in the system.

The conversion process and data acquisition are controlled using the I2C interface and an internal oscillator and data can be read after the conversion to reach the maximum 22.22 kSPS throughput rate in fast mode.

The sample mode uses the CONVST/GPO1 pin, which when toggled delivers an ADC conversion, while the command mode uses the read of the conversion result register to start the conversion to provide a steady stream of data. However, the device also has an autocycle mode so that it can operate in an autonomous mode to monitor events that fall outside of a user-defined range. This is ideal for setting alarm conditions. These modes are shown in the I2C configuration table in Figure 2.

Image of configuration table for the modes in the Analog Devices AD7091

Figure 2: The configuration table for the modes in the AD7091.

The four single-ended analog input channels include a channel sequencer that allows a pre-programmed selection of channels to be converted sequentially and the on-chip configuration register allows the user to set up different operating conditions such as power management, alert functionality, busy indication, channel sequencing, and general-purpose output pins. The MUXOUT and ADCIN pins also allow signal conditioning of the multiplexer output before acquisition by the ADC.

The AD7091R-5 uses two power supply pins, which has an impact on the energy harvesting supply. VDRIVE allows direct interfacing with any logic between 1.8 V and 5.25 V, but to reduce the number of supplies needed, VDRIVE and VDD can be tied together.

The ADC is also designed to be insensitive to power supply variations over a wide frequency range so that the energy harvesting sources can be used easily. It powers down automatically at the end of each conversion phase which means that the power scales linearly with the sampling rate, and an automatic power-down feature supports low sampling rates of even a few hertz for very low energy applications.

This is then coupled with the ADP5090 integrated boost regulator to convert the DC power from photovoltaic cells or thermoelectric generators to charge storage elements such as a rechargeable battery or super capacitor. The CN-0372 board, shown in Figure 3, uses a super capacitor that supplies power for small electronic devices and battery-free systems.

Image of Analog Devices CN-0372 evaluation board

Figure 3: The CN-0372 evaluation board combines a SAR ADC and boost converter with amplifier and power converter.

This operates on an input power range from 16 µW to 200 mW with sub-microwatt losses in operation.  With the internal cold-start circuit, the regulator can start operating at an input voltage as low as 380 mV. This solution eliminates the need for an external battery to power the circuit and makes full use of the available harvestable energy instead. 

By sensing the input voltage at the VIN pin, the control loop keeps the input voltage ripple in a fixed range to maintain a stable DC-DC boost conversion. The VIN sensing and programmable regulation points of the input voltage allow extraction of the highest possible energy from the PV cell or TEG harvester.

For solar cells, a programmable minimum operation threshold (MINOP) enables boost shutdown during a low light condition, while the charging control function protects the rechargeable energy storage by monitoring the battery voltage with programmable charging termination voltage and shutdown discharging voltage.

The circuit in Figure 4 converts power from an energy source connected to the J4 terminal, stores charge in the super capacitor (C26), and provides power to the entire circuit via the SYS voltage output.

Image of four-channel data acquisition sub-system

Figure 4: Converting power from a photovoltaic cell or thermoelectric generator to drive the four-channel data acquisition sub-system.

Harvested energy from a PV cell or TEG is introduced at the ENERGY_IN pin. When this exceeds 380 mV, the chip enters cold start-up until the main boost is enabled when the SYS voltage exceeds VSYS_TH, which is typically 1.93 V. The logic high level on PGOOD is equal to the SYS voltage, and when the battery terminal voltage is reached, the main boost charger is turned off.

This allows the regulator to operate in pulse frequency mode (PFM), transferring energy stored in the input capacitor to SYS and the 50 mF, 3.5 V super capacitor at C26.  PGOOD threshold is set by external connectors to indicate that the SYS voltage is at an acceptable voltage.

The ADP5090 is also equipped with battery overcharging and deep discharging protection thresholds, which are also set by external resistors.

Evaluating the circuits

Connecting a low power, high impedance DC source (such as a PV cell or TEG) to the J4 terminal, and placing SL4 and SL5 in Position A makes use of the ADP5090 energy harvesting circuit as the system supply. PC-based evaluation software from ADI can then be used with the EVAL-CN0372-PMDZ board and a USB connection to the PC.


Developing a multi-channel data acquisition sub-system powered by energy from the environment requires the combination of a low power ADC and a boost converter optimized for energy harvesting. The integrated multiplexing and filtering in the ADC reduces the complexity of the design while the different configuration options, particularly the autonomous threshold-based mode, allow multiple sensors to be monitored with minimal power. This is then coupled with the boost converter that can operate from low voltages and support the monitoring of a rechargeable battery or super capacitor to store the collected energy. All of this is brought together in an evaluation board to allow designers to see how the data can be captured.   

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