LM3495 Evaluation Board Datasheet by Texas Instruments

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ITEXAs INSTRUMENTS 100 90 23 5 so / a G E 70 1 60 50 0 2 4 6 6 10 OUTPUT CURRENT (A)
User's Guide
SNVA149BMarch 2006Revised April 2013
AN-1446 LM3495 Evaluation Board
Specifications Of The Board
The evaluation board has been designed for testing of various circuits using the LM3495 buck regulator
controller. A complete schematic for all the components is shown in Circuit Schematic. The board is four
layers, consisting of signal/power traces on top and bottom, one internal ground plane, and an internal
split power plane. The top and bottom planes are 1oz. copper, internal planes are 1/2 oz., and the board is
62mil FR4 laminate.
Example Circuit
The example circuit that comes on the evaluation board steps input voltages of 12V ±10% down to 1.2V at
currents up to 10A with a switching frequency of 500 kHz. The measured efficiency of the converter is
86% at an output current of 7A.
Efficiency for VIN = 12V
Powering The Converter
The example circuit for the LM3495 evaluation board is optimized to run at inputs of 12V, however the
circuit will operate with input voltages ranging from 2.9V to 18.0V connected between the ‘Vin’ and ‘GND’
terminals at the top of the board. Fixed loads, resistors, and variable electronic loads can be connected
between the ‘Vo’ and ‘GND’ terminals. Table 1 lists all the components used in the example circuit.
Enabling The Converter
The SPDT switch ON/OFF controls the state of the converter while power is applied to the input terminals.
While in the OFF position the COMP/SD* pin of the LM3495 is grounded, the output is disabled, and the
IC enters a low power state. While in the ON position the output voltage is regulated and is capable of
delivering current to a load connected at the output terminals.
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S
S
S
G
D
D
D
D
SO-8
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Testing The Converter
Efficiency Measurement Setup shows a block diagram of connections for making measurements of
efficiency. The wires used for making connections at both the input and output should be rated to at least
10A of continuous current and should be no longer than is needed for convenient testing. A series
ammeter capable of measuring 10A or more should be used for both the input and the output lines.
Dedicated voltmeters should be connected with their positive and negative leads right at the four power
terminals at the top of the evaluation board. This measurement technique minimizes the voltage loss in
the wires that connect the evaluation board to the input power supply and the electronic load.
Output voltage ripple measurements should be taken directly across the 100 nF ceramic capacitor Cox,
placed right between the output terminals. Care must be taken to minimize the loop area between the
oscilloscope probe tip and the ground lead. One method to minimize this loop is to remove the probe’s
spring tip and ‘pigtail’ ground lead and then wind bare wire around the probe shaft. The bare wire should
contact the ground of the probe, and the end of the wire can then contact the ground side of Cox.Output
Voltage Ripple Measurement Setup shows a diagram of this method.
An oscilloscope probe modified as described above can also be used to measure the switch node voltage,
LG pin voltage, and HG pin voltage (all three with respect to ground) using the 40mil diameter hole pairs
labeled “+ SW –“, “+ LG –“, and “+ HG –“, respectively.
SKIP/PWM
A second SPDT switch labeled SKIP/FPWM determines that control scheme the LM3495 uses at low
output currents. When set to SKIP, the converter saves energy during light loads (approximately 100 mA
or less) by using the body diode of the low side FET, as well as leaving the high side FET off if possible.
When the switch is set to FPWM, the LM3495 forces both top and bottom FETs to switch during every
cycle, regardless of the load current.
MOSFET Footprints
The LM3495 evaluation board has footprints for single N-MOSFETs with SO-8 packages and standard
pinouts. These footprints can also accept newer MOSFET packages that are compatible with SO-8
footprints. see SO-8 MOSFET Pinout.Q1 is the high side FET, and Q2 low side FET.
SO-8 MOSFET Pinout
Permanent Components
The following components should remain the same for any new circuits evaluated on the LM3495
evaluation board:
Name Value
Cb 0.1 µF
Cf 1 µF
Cdd 2.2 µF
Additional Footprints
A 100 pF ceramic capacitor should be placed at position Dsync whenever the LM3495 runs without an
external clock. When an external clock is used, Dsync should be removed and a 100 pF ceramic
capacitor placed at Csync.
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The 0resistor J1 connects the TRACK pin and VDD pins of the LM3495 together. It should be removed
only when the tracking function is used.
The 0resistor J2 connects the VIN and VLIN5 terminals of the LM3495 together. This resistor should be
used only when the input voltage is 5.5V or less, to provide maximum MOSFET gate drive.
The 0resistor J3 connects the ‘Vin’ terminal to the VIN pin of the LM3495. This resistor should be
removed only for testing of the input current draw of the LM3495 IC.
The 0resistor Rbst can be replaced with a higher value resistor to limit the current drawn by the BOOST
pin. This slows the high-side FET gate drive rise time and may reduce ringing on the switch node. Care
must be taken, as slowing the gate drive too much can cause shoot-through current.
Components Rt1 and Rt2 are used if the output of the converter is tracking another supply during startup.
For this application the output of the external supply should be connected to the TRACK IN terminal.
When the tracking feature is not used, the track pin should be connected to the VDD pin by placing a 0
resistor in position J2.
Components Rsnb and Csnb can be used to filter ringing on the switch node.
D2 provides a position for a diode to go in parallel with Q2. In circuits with output currents of
approximately 5A or less, a Schottky diode at D2 can improve the efficiency of the converter.
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Cox
Vo GND
Oscilloscope
Vo GND GND Vin
18V, 6A Power
Supply
A+
-
V
LM3495
Evaluation Board
50W, 10A
Electronic Load
A
+
-
V
Ammeter Ammeter
Voltmeter
Voltmeter
FB SNS
FPWM
PGND
CSL
LG
ILIM
SW/CSH
HG
BOOST
+
CF
RFB2
RFB1
RLIM
CIN1
L1
Q1
Q2
CB
D1
1 PF
0.1 PF
Vin
Vo
LM3495
SGND
FREQ/SYNC
COMP/SD
VIN VLIN5
TRACK
CDD
2.2PF
CC1
RC1
RFRQ
CC2
TRACK
IN RT1
RT2
J3
CSYNC
+ +
CO1 CO2
+CIN2
CINX
COX
J1
VLIN5
ON/OFF
SKIP/FPWM
SYNC
IN
1
2
3
4
5
6
7
8
9
10
11
12
13 14
15
16
J2
DSYNC
LIN
RLG
D2
RBST
CSNB
RSNB
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Complete Circuit Schematic
Circuit Schematic
Connection Diagrams
Efficiency Measurement Setup
Output Voltage Ripple Measurement Setup
Typical Performance Waveforms
Switch Node Voltage (VIN = 12V, VO= 1.2V, IO= 5A)
Switch Node Voltage (VIN = 12V, VO= 1.2V, IO= 5A)
Output Voltage Ripple, AC Coupled (VIN = 12V, VO= 1.2V, IO= 5A)
Load Transient Response (VIN = 12V, VO= 1.2V, IO= 0A to 4A)
Load Transient Response (VIN = 12V, VO= 1.2V, IO= 4A to 0A)
Bill of Materials (BOM)
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Table 1. Bill of Materials (BOM)
Qty ID Part Number Type Size Parameters Vendor
1 U1 LM3495 Synchronous TSSOP-16 TI
Controller
1 Q1 HAT2198R N-MOSFET SO-8 30V, 9.6mRenesas
11nC
1 Q2 HAT2165H N-MOSFET LFPAK 30V Renesas
3.4m, 33nC
1 D1 MBR0530 Schottky Diode SMA 30V, 0.5A Vishay
1 L1 RLF12560T-1R0N140 Inductor 12.5x12.8 1µH 14A 3mTDK
x6.0mm
1 Cin C3225X5R1E226M Capacitor 1210 22µF, 25V TDK
2 Co1, Co2 C3225X5R0J107M Capacitor 1210 100µF 6.3V 1mTDK
1 Cf C3216X7R1E105M Capacitor 1206 1µF, 25V TDK
1 Cdd C3216X7R1E225M Capacitor 1206 2.2µF 25V TDK
2 Cb, Cinx VJ1206Y104KXXAT Capacitor 1206 100nF 10% Vishay
1 Cc1 VJ1206Y103KXXAT Capacitor 1206 10nF 10% Vishay
3 Cc2, Csync, VJ1206A101KXXAT Capacitor 1206 100pF 10% Vishay
Dsync
1 Cox VJ0805Y104KXXAT Capacitor 805 100nF 10% Vishay
3 Rbst, J1, J3 CRCW08050R00F Resistor 805 0Vishay
1 Lin CRCW25120R00F Resistor 2512 0Vishay
1 Rc1 CRCW12061501F Resistor 1206 1.5k1% Vishay
2 Rfb1, Rfb2 CRCW12061002F Resistor 1206 10k1% Vishay
1 Rfrq CRCW12065492F Resistor 1206 54.9k1% Vishay
1 Rlg CRCW12061R00F Resistor 1206 11% Vishay
1 Rlim CRCW12063321F Resistor 1206 3.32k1% Vishay
2 SKIP/FPWM NKK A12AB SPST NKK
ON/OFF
5 Vo, GND1 Newark 40F6004 Terminal Silver 0.094” Cambion
GND2, GND3
Vin
4 SYNC IN Newark 94F1478 Terminal Silver 0.062” Keystone
GND4, GND5
TRACK IN
5
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PCB Layout
Top Layer and Top Overlay
Bottom Layer
Internal Layer 1
Internal Layer 2
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