LT6109-1, -2 Datasheet by Analog Devices Inc.

LTLIHE] \D LTéIOQ—HLT6109—2 TECHNOLOGY L7HEWEAR 1
LT6109-1/LT6109-2
1
610912fa
TYPICAL APPLICATION
FEATURES DESCRIPTION
High Side Current Sense
Amplifier with Reference
and Comparators
The LT
®
6109 is a complete high side current sense device
that incorporates a precision current sense amplifier, an
integrated voltage reference and two comparators. Two
versions of the LT6109 are available. The LT6109-1 has
the comparators connected in opposing polarity and the
LT6109-2 has the comparators connected in the same polar-
ity. In addition, the current sense amplifier and comparator
inputs and outputs are directly accessible. The amplifier
gain and comparator trip points are configured by external
resistors. The open-drain comparator outputs allows for
easy interface to other system components.
The overall propagation delay of the LT6109 is typically
only 1.4µs, allowing for quick reaction to overcurrent
and undercurrent conditions. The 1MHz bandwidth al-
lows the LT6109 to be used for error detection in critical
applications such as motor control. The high threshold
accuracy of the comparators, combined with the ability to
latch both comparators, ensures the LT6109 can capture
high speed events.
The LT6109 is fully specified for operation from –40°C to
125°C, making it suitable for industrial and automotive ap-
plications. The LT6109 is available in a small 10-lead MSOP.
Circuit Fault Protection with Latching Load Disconnect and Early Warning Indication
APPLICATIONS
n Current Sense Amplifier
Fast Step Response: 500ns
Low Offset Voltage: 125µV Maximum
Low Gain Error: 0.2% Maximum
n Internal 400mV Precision Reference
n Internal Latching Comparators with Reset
Fast Response Time: 500ns
Total Threshold Error: ±1.25% Maximum
Two Comparator Polarity Options
n Wide Supply Range: 2.7V to 60V
n Supply Current: 550µA
n Low Shutdown Current: 5µA Maximum
n Specified for –40°C to 125°C Temperature Range
n Available in 10-Lead MSOP Package
n Overcurrent, Undercurrent and Fault Detection
n Current Shunt Measurement
n Battery Monitoring
n Motor Control
n Automotive Monitoring and Control
n Remote Sensing
n Industrial Control L, LT, LTC, LTM, TimerBlox, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Response to Overcurrent Event
SENSEHI SENSELO
OUTA
LT6109-2
INC2RESET
INC12N2700
100mA WARNING
250mA DISCONNECT
*CMH25234B
V+
EN/RST
OUTC1
OUTC2
V
0.1Ω IRF9640
3.3V
6.2V*
12V
100Ω
6.04k
100k
1.62k10k
1k
1k
0.1µF
VOUT
2.37k
1.6k
610912 TA01a
TO LOAD
5µs/DIV
VLOAD
10V/DIV
VOUTC1
5V/DIV
ILOAD
200mA/DIV
0V
0V
VOUTC2
5V/DIV 0V
0mA
610912 TA01b
250mA DISCONNECT
100mA WARNING
LT6109—1/LT6109—2 FH'H'H'H" ULHJLHJ 2 L7LJ1‘JW
LT6109-1/LT6109-2
2
610912fa
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V) .................................60V
Maximum Voltage
(SENSELO, SENSEHI, OUTA) ............................... V+ + 1V
Maximum V+ – (SENSELO or SENSEHI) ....................33V
Maximum EN/RST Voltage ........................................ 60V
Maximum Comparator Input Voltage ........................60V
Maximum Comparator Output Voltage......................60V
Input Current (Note 2) ..........................................–10mA
SENSEHI, SENSELO Input Current ....................... ±10mA
Differential SENSEHI or SENSELO Input Current ...±2.5mA
Amplifier Output Short-Circuit Duration (to V) .. Indefinite
Operating Temperature Range (Note 3)
LT6109I ................................................40°C to 85°C
LT6109H ............................................ 40°C to 125°C
Specified Temperature Range (Note 3)
LT6109I ................................................40°C to 85°C
LT6109H ............................................ 40°C to 125°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................... 300°C
(Note 1)
1
2
3
4
5
SENSELO
EN/RST
OUTC2
OUTC1
V
10
9
8
7
6
SENSEHI
V+
OUTA
INC2
INC1
TOP VIEW
MS PACKAGE
10-LEAD PLASTIC MSOP
θJA = 160°C/W, θJC = 45°C/W
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT6109AIMS-1#PBF LT6109AIMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 85°C
LT6109IMS-1#PBF LT6109IMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 85°C
LT6109AHMS-1#PBF LT6109AHMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 125°C
LT6109HMS-1#PBF LT6109HMS-1#TRPBF LTFNJ 10-Lead Plastic MSOP –40°C to 125°C
LT6109AIMS-2#PBF LT6109AIMS-2#TRPBF LT FWY 10-Lead Plastic MSOP –40°C to 85°C
LT6109IMS-2#PBF LT6109IMS-2#TRPBF LT FWY 10-Lead Plastic MSOP –40°C to 85°C
LT6109AHMS-2#PBF LT6109AHMS-2#TRPBF LT FWY 10-Lead Plastic MSOP –40°C to 125°C
LT6109HMS-2#PBF LT6109HMS-2#TRPBF LT FWY 10-Lead Plastic MSOP –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LT61 09— 1 / LT61 09—2 L7 LJUW 3
LT6109-1/LT6109-2
3
610912fa
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V+Supply Voltage Range l2.7 60 V
ISSupply Current (Note 4) V+ = 2.7V, RIN = 1k, VSENSE = 5mV 475 µA
V+ = 60V, RIN = 1k, VSENSE = 5mV
l
600 700
1000
µA
µA
Supply Current in Shutdown V+ = 2.7V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V
l
3 5
7
µA
µA
V+ = 60V, VEN/RST = 0V, RIN = 1k, VSENSE = 0.5V
l
7 11
13
µA
µA
EN/RST Pin Current VEN/RST = 0V, V+ = 60V –200 nA
VIH EN/RST Pin Input High V+ = 2.7V to 60V l1.9 V
VIL EN/RST Pin Input Low V+ = 2.7V to 60V l0.8 V
Current Sense Amplifier
VOS Input Offset Voltage VSENSE = 5mV, LT6109A
VSENSE = 5mV, LT6109
VSENSE = 5mV, LT6109A
VSENSE = 5mV, LT6109
l
l
–125
–350
–250
–450
125
350
250
450
µV
µV
µV
µV
VOS/TInput Offset Voltage Drift VSENSE = 5mV l±0.8 µV/°C
IBInput Bias Current
(SENSELO, SENSEHI)
V+ = 2.7V to 60V
l
60 300
350
nA
nA
IOS Input Offset Current V+ = 2.7V to 60V ±5 nA
IOUTA Output Current (Note 5) l1 mA
PSRR Power Supply Rejection Ratio
(Note 6)
V+ = 2.7V to 60V
l
120
114
127 dB
dB
CMRR Common Mode Rejection Ratio V+ = 36V, VSENSE = 5mV, VICM = 2.7V to 36V 125 dB
V+ = 60V, VSENSE = 5mV, VICM = 27V to 60V
l
110
103
125 dB
dB
VSENSE(MAX) Full-Scale Input Sense Voltage
(Note 5)
RIN = 500Ω l500 mV
Gain Error (Note 7) V+ = 2.7V to 12V
V+ = 12V to 60V, VSENSE = 5mV to 100mV
l
–0.2
–0.08
0
%
%
SENSELO Voltage (Note 8) V+ = 2.7V, VSENSE = 100mV, ROUT = 2k
V+ = 60V, VSENSE = 100mV
l
l
2.5
27
V
V
Output Swing High (V+ to VOUTA) V+ = 2.7V, VSENSE = 27mV l0.2 V
V+ = 12V, VSENSE = 120mV l0.5 V
BW Signal Bandwidth IOUT = 1mA
IOUT = 100µA
1
140
MHz
kHz
trInput Step Response (to 50% of
Final Output Voltage)
V+ = 2.7V, VSENSE = 24mV Step, Output Rising Edge
V+ = 12V to 60V, VSENSE = 100mV Step, Output Rising Edge
500
500
ns
ns
tSETTLE Settling Time to 1% VSENSE = 10mV to 100mV, ROUT = 2k 2 µs
LT6109—1/LT6109—2 4 L7LJ1W
LT6109-1/LT6109-2
4
610912fa
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference and Comparator
VTH(R)
(Note 9)
Rising Input Threshold Voltage
(LT6109-1 Comparator 1
LT6109-2 Both Comparators)
V+ = 2.7V to 60V, LT6109A
V+ = 2.7V to 60V, LT6109
l
l
395
392
400
400
405
408
mV
mV
VTH(F)
(Note 9)
Falling Input Threshold Voltage
(LT6109-1 Comparator 2)
V+ = 2.7V to 60V, LT6109A
V+ = 2.7V to 60V, LT6109
l
l
395
392
400
400
405
408
mV
mV
VHYS VHYS = VTH(R) – VTH(F) V+ = 2.7V to 60V 3 10 15 mV
Comparator Input Bias Current VINC1,2 = 0V, V+ = 60V l–50 nA
VOL Output Low Voltage IOUTC1,C2 = 500µA, V+ = 2.7V
l
60 150
220
mV
mV
High to Low Propagation Delay 5mV Overdrive
100mV Overdrive
3
0.5
µs
µs
Output Fall Time 0.08 µs
tRESET Reset Time 0.5 µs
tRPW Valid RST Pulse Width l2 15 µs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input and output pins have ESD diodes connected to ground. The
SENSEHI and SENSELO pins have additional current handling capability
specified as SENSEHI, SENSELO input current.
Note 3: The LT6109I is guaranteed to meet specified performance from
–40°C to 85°C. LT6109H is guaranteed to meet specified performance
from –40°C to 125°C.
Note 4: Supply current is specified with the comparator outputs high.
When the comparator outputs go low the supply current will increase by
75µA typically per comparator.
Note 5: The full-scale input sense voltage and the maximum output
current must be considered to achieve the specified performance.
Note 6: Supply voltage and input common mode voltage are varied while
amplifier input offset voltage is monitored.
Note 7: Specified gain error does not include the effects of external
resistors RIN and ROUT. Although gain error is only guaranteed between
12V and 60V, similar performance is expected for V+ < 12V, as well.
Note 8: Refer to SENSELO, SENSEHI Range in the Applications
Information section for more information.
Note 9: The input threshold voltage which causes the output voltage of the
comparator to transition from high to low is specified. The input voltage
which causes the comparator output to transition from low to high is
the magnitude of the difference between the specified threshold and the
hysteresis.
LTé 1 09— 1 / LT61 09—2 ace ‘2 mu UFFSETVULTAGE (th PERCENTAGE UFUNITS (m can GAIN ERROR (m PERCENTAGE 0E \ L7 HEW 5
LT6109-1/LT6109-2
5
610912fa
TYPICAL PERFORMANCE CHARACTERISTICS
Input Offset Voltage
vs Temperature
Amplifier Offset Voltage
vs Supply Voltage Offset Voltage Drift Distribution
Amplifier Gain Error
vs Temperature Amplifier Gain Error Distribution
Supply Current vs Supply Voltage Start-Up Supply Current Enable/Disable Response
Performance characteristics taken at TA = 25°C,
V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
SUPPLY VOLTAGE (V)
0
700
600
500
400
300
200
100
030 50
610912 G01
10 20 40 60
SUPPLY CURRENT (µA)
SUPPLY VOLTAGE (V)
0
–100
OFFSET VOLTAGE (µV)
–60
–20
20
10 20 30 40
610912 G05
50
60
100
–80
–40
0
40
80
60
5 TYPICAL UNITS
0V
V+
5V/DIV
IS
500µA/DIV
0µA
10µs/DIV 610912 G02 100µs/DIV
VEN/RST
2V/DIV
IS
500µA/DIV
0V
0µA
610912 G03
TEMPERATURE (°C)
–40
INPUT OFFSET VOLTAGE (µV)
300
200
100
0
–100
–200
–300
80
610912 G04
–10 20 50 12511065–25 5 35 95
5 TYPICAL UNITS
OFFSET VOLTAGE DRIFT (µV/°C)
6
8
12
610912 G06
4
2
0–0.5 0.5–1 1 1.5 2–1.5–2
0
10
PERCENTAGE OF UNITS (%)
TEMPERATURE (°C)
–50 –25
–0.20
GAIN ERROR (%)
–0.10
0.05
050 75
610912 G07
–0.15
0
–0.05
25 100 125
RIN = 1k
RIN = 100Ω
VSENSE = 5mV TO 100mV
GAIN ERROR (%)
–0.048
0
PERCENTAGE OF UNITS (%)
5
15
20
25 VSENSE = 5mV TO 100mV
–0.052 –0.056
610912 G08
10
–0.060 –0.68
–0.064
Amplifier Output Swing
vs Temperature
TEMPERATURE (°C)
–50
0
V+ – VOUTA (V)
0.05
0.15
0.20
0.25
0.50
0.35
050 75
610912 G18
0.10
0.40
0.45
0.30
–25 25 100 125
V+ = 12V
VSENSE = 120mV
V+ = 2.7V
VSENSE = 27mV
LT6109—1 /LT6109—2 PUWER SUPPLY REJEUTIUN RATIU (as) INPUT BIAS CURRENTMA) mu “Ell iw‘lllllm 45 WW Hm L7HCU§QB
LT6109-1/LT6109-2
6
610912fa
Performance characteristics taken at TA = 25°C,
V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
Amplifier Input Bias Current
vs Temperature
Amplifier Step Response
(VSENSE = 0mV to 100mV)
Amplifier Step Response
(VSENSE = 0mV to 100mV)
Amplifier Step Response
(VSENSE = 10mV to 100mV)
Amplifier Step Response
(VSENSE = 10mV to 100mV)
Amplifier Gain vs Frequency
System Step Response
Common Mode Rejection Ratio
vs Frequency
TYPICAL PERFORMANCE CHARACTERISTICS
FREQUENCY (Hz)
1
0
COMMON MODE REJECTION RATIO (dB)
120
100
10 100 1k 10k 100k 1M 10M
610912 G10
80
60
40
20
FREQUENCY (Hz)
22
GAIN (dB)
28
34
40
46
1k 100k 1M 10M
610912 G11
16
10k
IOUTA = 1mA
IOUTA = 100µA
G = 100
G = 50, ROUT = 5k
G = 20, ROUT = 2k
0V
VSENSE
100mV/DIV
VOUTA
1V/DIV
VOUTC1
2V/DIV
VEN/RST
5V/DIV
0V
0V
0V
610912 G12
2µs/DIV
ROUT = 2k,100mV INC1 OVERDRIVE
TEMPERATURE (°C)
–25
INPUT BIAS CURRENT (nA)
60
80
100
95
610912 G13
40
20
50
70
90
30
10
0535 65
–10–40 110
20 50 80 125
SENSEHI
SENSELO
VOUTA
2V/DIV
VSENSE
50mV/DIV
0V
0V
610912 G14
2µs/DIV
RIN = 100Ω
G = 100V/V
VOUTA
2V/DIV
VSENSE
50mV/DIV
0V
0V
610912 G15
2µs/DIV
RIN = 100Ω
G = 100V/V
0V
0V
VOUTA
1V/DIV
VSENSE
100mV/DIV
610912 G16
2µs/DIV
RIN = 1k
ROUT = 20k
G = 20V/V
0V
0V
VOUTA
1V/DIV
VSENSE
100mV/DIV
610912 G17
2µs/DIV
RIN = 1k
ROUT = 20k
G = 20V/V
Power Supply Rejection Ratio
vs Frequency
FREQUENCY (Hz)
1
0
120
100
140
160
10 100 1k 10k 100k 1M 10M
610912 G09
80
60
40
20
LTé 1 09— 1 / LT61 09—2 I; 1535333535,; :5 05:35: SEEEB ‘H'V :5 EEE SEE .5 85D 5:6 > ,____.___ . _ _ 25 FEES gm 5%: EEIEES _ _ ~ ~ ~ _ 25 SEES 3; :32. EEEES L7 HEW
LT6109-1/LT6109-2
7
610912fa
Performance characteristics taken at TA = 25°C,
V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
Hysteresis Distribution
Hysteresis vs Temperature Hysteresis vs Supply Voltage
Comparator Input Bias Current
vs Input Voltage
Comparator Input Bias Current
vs Input Voltage
Comparator Threshold
Distribution
Comparator Threshold
vs Temperature
EN/RST Current vs Voltage
Comparator Output Low Voltage
vs Output Sink Current
COMPARATOR INPUT VOLTAGE (V)
–20
COMPARATOR INPUT BIAS CURRENT (nA)
–10
0
10
–15
–5
5
20 40
610912 G25
600
125°C
25°C
–40°C
COMPARATOR INPUT VOLTAGE (V)
–20
COMPARATOR INPUT BIAS CURRENT (nA)
–10
0
10
–15
–5
5
0.2 0.4 0.6 0.8
610912 G26
1.00
125°C
25°C
–40°C
0
0
V
OL
OUTC1, OUTC2 (V)
0.25
0.50
0.75
1.00
1
IOUTC (mA)
2
610912 G27
3
125°C
25°C
–40°C
TYPICAL PERFORMANCE CHARACTERISTICS
TEMPERATURE (°C)
–40 –25
COMPARATOR THRESHOLD (mV)
398
400
402
50 110
610912 G20
396
394
392 –10 5 20 35 80
65 125
95
404
406
408
5 TYPICAL PARTS
COMPARATOR HYSTERESIS (mV)
3.0
0
PERCENTAGE OF UNITS (%)
5
10
15
20
30
–40°C 25°C 125°C
4.6 6.2 7.7 9.3 10.9 12.5 14.1
610912 G21
15.7 17.3
25
V+ (V)
0
14
12
10
8
6
4
2
030 50
610912 G23
10 20 40 60
COMPARATOR HYSTERESIS (mV)
5 TYPICAL PARTS
EN/RST VOLTAGE (V)
0
–250
EN/RST CURRENT (nA)
–200
–150
–100
–50
50
10 20 30 40
610912 G24
50 60
0
COMPARATOR THRESHOLD (mV)
0
PERCENTAGE OF UNITS (%)
5
15
20
25
399.2 404
610912 G19
10
396 397.6 400.8 402.8
TEMPERATURE (°C)
–40
COMPARATOR HYSTERESIS (mV)
20
18
16
14
12
10
8
6
4
0
2
80
610912 G22
–10 20 50 12511065–25 5 35 95
LT6109—1 /LT6109—2 0mm 0mm LEAKAGE CURRENT (HA) /125 COMPARATOR PROPAGATION DELAY (us) :: RISE/FALL TIME (n5) L7HCU§QB
LT6109-1/LT6109-2
8
610912fa
Comparator Rise/Fall Time
vs Pull-Up Resistor
Comparator Step Response
(5mV INC1 Overdrive)
Comparator Step Response
(100mV INC1 Overdrive) Comparator Reset Response
SENSELO (Pin 1): Sense Amplifier Input. This pin must
be tied to the load end of the sense resistor.
EN/RST (Pin 2): Enable and Latch Reset Input. When the
EN/RST pin is pulled high the LT6109 is enabled. When the
EN/RST pin is pulled low for longer than typically 40µs,
the LT6109 will enter the shutdown mode. Pulsing this pin
low for between 2µs and 15µs will reset the comparators
of the LT6109.
Comparator Propagation Delay
vs Input Overdrive
PIN FUNCTIONS
OUTC2 (Pin 3): Open-Drain Comparator 2 Output. Off-
state voltage may be as high as 60V above V, regardless
of V+ used.
OUTC1 (Pin 4): Open-Drain Comparator 1 Output. Off-
state voltage may be as high as 60V above V, regardless
of V+ used.
V (Pin 5): Negative Supply Pin. This pin is normally con-
nected to ground.
Comparator Output Leakage
Current vs Pull-Up Voltage
COMPARATOR OUTPUT PULL-UP VOLTAGE (V)
0
–2
OUTC1, OUTC2 LEAKAGE CURRENT (nA)
3
8
13
18
23
125°C
10 20 30 40
610912 G28
50 60
–40°C AND 25°C
RC PULL-UP RESISTOR (kΩ)
1
10
RISE/FALL TIME (ns)
100
1000
10000
10 100 1000
610912 G30
RISE TIME
FALL TIME
VOH = 0.9 • VPULLUP
VOL = 0.1 • VPULLUP
100mV INC1 OVERDRIVE
CL = 2pF
VINC
0.5V/DIV
0V
VOUTC
2V/DIV
0V
VEN/RST
5V/DIV
0V
610912 G31
5µs/DIV
0V
VINC
0.5V/DIV
VOUTC
2V/DIV
VEN/RST
5V/DIV
0V
0V
610912 G32
5µs/DIV
0V
VOUTC
5V/DIV
VEN/RST
2V/DIV
0V
5µs/DIV
610912 G33
Performance characteristics taken at TA = 25°C,
V+ = 12V, VPULLUP = V+, VEN/RST = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless
otherwise noted. (See Figure 3)
TYPICAL PERFORMANCE CHARACTERISTICS
COMPARATOR INPUT OVERDRIVE (mV)
0
COMPARATOR PROPAGATION DELAY (µs)
3.0
4.0
5.0
160
610912 G29
2.0
1.0
2.5
3.5
4.5
1.5
0.5
040 80 120 200
H TO L
L TO H
LT61 09—1 /LT61 09—2 L7 LJUW 9
LT6109-1/LT6109-2
9
610912fa
PIN FUNCTIONS
INC1 (Pin 6): This is the inverting input of comparator 1.
The second input of this comparator is internally connected
to the 400mV reference.
INC2 (Pin 7): This is the input of comparator 2. For the
LT6109-1 this is the noninverting input of comparator 2.
For the LT6109-2 this is the inverting input of compara-
tor2. The second input of each of these comparators is
internally connected to the 400mV reference.
OUTA (Pin 8): Current Output of the Sense Amplifier. This
pin will source a current that is equal to the sense voltage
divided by the external gain setting resistor, RIN.
V+ (Pin 9): Positive Supply Pin. The V+ pin can be con-
nected directly to either side of the sense resistor, RSENSE.
When V+ is tied to the load end of the sense resistor, the
SENSEHI pin can go up to 0.2V above V+. Supply current
is drawn through this pin.
SENSEHI (Pin 10): Sense Amplifier Input. The internal
sense amplifier will drive SENSEHI to the same potential
as SENSELO. A resistor (typically RIN) tied from supply
to SENSEHI sets the output current, IOUT = VSENSE/RIN,
where VSENSE is the voltage developed across RSENSE.
BLOCK DIAGRAMS
Figure 1. LT6109-1 Block Diagram (Comparators with Opposing Polarity)
100Ω
OUTA
+
+
9
10
18
INC2 7
INC1
610912 F01
6
V+
V
V
V
V
V+
3k
V+
3k
SENSEHI
LT6109-1
SENSELO
200nA
RESET
UNDERCURRENT FLAG
OVERCURRENT FLAG
2EN/RST
3OUTC2
4OUTC1
34V 6V
ENABLE AND
RESET TIMING
+
V
V+
5
400mV
REFERENCE
LT6109—1/LT6109'2 'j—r' |_. § § 4« >->I-‘ » >—>H \ / 1—.
LT6109-1/LT6109-2
10
610912fa
BLOCK DIAGRAMS
Figure 2. LT6109-2 Block Diagram (Comparators with the Same Polarity)
APPLICATIONS INFORMATION
The LT6109 high side current sense amplifier provides
accurate monitoring of currents through an external sense
resistor. The input sense voltage is level-shifted from the
sensed power supply to a ground referenced output and
is amplified by a user-selected gain to the output. The
output voltage is directly proportional to the current flow-
ing through the sense resistor.
The LT6109 comparators have a threshold set with a built-in
400mV precision reference and have 10mV of hysteresis.
The open-drain outputs can be easily used to level shift
to digital supplies.
Amplifier Theory of Operation
An internal sense amplifier loop forces SENSEHI to have
the same potential as SENSELO as shown in Figure 3.
Connecting an external resistor, RIN, between SENSEHI
and VSUPPLY forces a potential, VSENSE, across RIN. A
corresponding current, IOUTA, equal to VSENSE/RIN, will
flow through RIN. The high impedance inputs of the sense
amplifier do not load this current, so it will flow through
an internal MOSFET to the output pin, OUTA.
100Ω
OUTA
+
+
9
10
18
INC2 7
INC1
610912 F02
6
V+
V
V
V
V
V+
3k
V+
3k
SENSEHI
LT6109-2
SENSELO
200nA
RESET
OVERCURRENT FLAG
OVERCURRENT FLAG
2EN/RST
3OUTC2
4OUTC1
34V 6V
ENABLE AND
RESET TIMING
+
V
V+
5
400mV
REFERENCE
LTé 1 09— 1 / LT61 09—2 Vow 0m IOUTA SENSE L7 LJUW 1 1
LT6109-1/LT6109-2
11
610912fa
APPLICATIONS INFORMATION
The output current can be transformed back into a voltage
by adding a resistor from OUTA to V(typically ground).
The output voltage is then:
VOUT = V + IOUTA • ROUT
where ROUT = R1 + R2 + R3 as shown in Figure 3.
Table 1. Example Gain Configurations
GAIN RIN ROUT VSENSE FOR VOUT = 5V IOUTA AT VOUT = 5V
20 499Ω 10k 250mV 500µA
50 200Ω 10k 100mV 500µA
100 100Ω 10k 50mV 500µA
Useful Equations
Input Voltage: VSENSE =ISENSE RSENSE
Voltage Gain: VOUT
VSENSE
=ROUT
RIN
Current Gain: IOUTA
ISENSE
=RSENSE
RIN
Note that VSENSE(MAX) can be exceeded without damag-
ing the amplifier, however, output accuracy will degrade
as VSENSE exceeds VSENSE(MAX), resulting in increased
output current, IOUTA.
Selection of External Current Sense Resistor
The external sense resistor, RSENSE, has a significant effect
on the function of a current sensing system and must be
chosen with care.
First, the power dissipation in the resistor should be
considered. The measured load current will cause power
dissipation as well as a voltage drop in RSENSE. As a
result, the sense resistor should be as small as possible
while still providing the input dynamic range required by
the measurement. Note that the input dynamic range is
the difference between the maximum input signal and the
minimum accurately reproduced signal, and is limited
primarily by input DC offset of the internal sense ampli-
fier of the LT6109. To ensure the specified performance,
RSENSE should be small enough that VSENSE does not
exceed VSENSE(MAX) under peak load conditions. As an
example, an application may require the maximum sense
voltage be 100mV. If this application is expected to draw
2A at peak load, RSENSE should be set to 50mΩ.
Once the maximum RSENSE value is determined, the mini-
mum sense resistor value will be set by the resolution or
dynamic range required. The minimum signal that can be
accurately represented by this sense amplifier is limited by
the input offset. As an example, the LT6109 has a maximum
input offset of 125µV. If the minimum current is 20mA, a
sense resistor of 6.25mΩ will set VSENSE to 125µV. This is
the same value as the input offset. A larger sense resistor
will reduce the error due to offset by increasing the sense
voltage for a given load current. Choosing a 50mΩ RSENSE
will maximize the dynamic range and provide a system
that has 100mV across the sense resistor at peak load
(2A), while input offset causes an error equivalent to only
2.5mA of load current.
In the previous example, the peak dissipation in RSENSE
is 200mW. If a 5mΩ sense resistor is employed, then
the effective current error is 25mA, while the peak sense
voltage is reduced to 10mV at 2A, dissipating only 20mW.
The low offset and corresponding large dynamic range of
the LT6109 make it more flexible than other solutions in this
respect. The 125µV maximum offset gives 72dB of dynamic
range for a sense voltage that is limited to 500mV max.
Sense Resistor Connection
Kelvin connection of the SENSEHI and SENSELO inputs
to the sense resistor should be used in all but the lowest
power applications. Solder connections and PC board
interconnections that carry high currents can cause sig-
nificant error in measurement due to their relatively large
resistances. One 10mm × 10mm square trace of 1oz copper
is approximately 0.5mΩ. A 1mV error can be caused by as
little as 2A flowing through this small interconnect. This
will cause a 1% error for a full-scale VSENSE of 100mV.
A 10A load current in the same interconnect will cause
a 5% error for the same 100mV signal. By isolating the
sense traces from the high current paths, this error can
be reduced by orders of magnitude. A sense resistor with
integrated Kelvin sense terminals will give the best results.
Figure 3 illustrates the recommended method for connect-
ing the SENSEHI and SENSELO pins to the sense resistor.
LT6109—1/LT6109—2 ngngngng u||.| 'H‘W 12
LT6109-1/LT6109-2
12
610912fa
APPLICATIONS INFORMATION
Selection of External Input Gain Resistor, RIN
RIN should be chosen to allow the required speed and
resolution while limiting the output current to 1mA. The
maximum value for RIN is 1k to maintain good loop sta-
bility. For a given VSENSE, larger values of RIN will lower
power dissipation in the LT6109 due to the reduction
in IOUT while smaller values of RIN will result in faster
response time due to the increase in IOUT . If low sense
currents must be resolved accurately in a system that has
a very wide dynamic range, a smaller RIN may be used
if the maximum IOUTA current is limited in another way,
such as with a Schottky diode across RSENSE (Figure 4).
This will reduce the high current measurement accuracy
by limiting the result, while increasing the low current
measurement resolution.
This approach can be helpful in cases where occasional
bursts of high currents can be ignored.
Care should be taken when designing the board layout for
RIN, especially for small RIN values. All trace and inter-
connect resistances will increase the effective RIN value,
causing a gain error.
The power dissipated in the sense resistor can create a
thermal gradient across a printed circuit board and con-
sequently a gain error if RIN and ROUT are placed such
that they operate at different temperatures. If significant
power is being dissipated in the sense resistor then care
Figure 3. LT6109-1 Typical Connection
OUTA
IOUTA
+
+
V+
C1
SENSEHI
INC2
INC1
5
4
3
2
1
R1*
610912 F03
V
V+
V+
V
LT6109-1
SENSELO
EN/RST
OUTC2
VRESET
RC
VPULLUP
LOAD
VSUPPLY
VSENSE
RSENSE
UNDERCURRENT
FLAG
OVERCURRENT
FLAG
RIN
+
OUTC1
*ROUT = R1 + R2 + R3
+
V
V
V+
ISENSE = VSENSE
RSENSE
RCR2*
6
7
8
9
10
R3* CL
VOUT
400mV
REFERENCE
CLC
CLC
DSENSE
RSENSE
V+
LOAD
610912 F04
Figure 4. Shunt Diode Limits Maximum Input Voltage to Allow
Better Low Input Resolution Without Overranging
L7 LJUW LT61 09— 1 / LT61 09—2 OUT 13
LT6109-1/LT6109-2
13
610912fa
APPLICATIONS INFORMATION
In this case, the only error is due to external resistor
mismatch, which provides an error in gain only. However,
offset voltage, input bias current and finite gain in the
amplifier can cause additional errors:
Output Voltage Error, VOUT(VOS), Due to the Amplifier
DC Offset Voltage, VOS
VOUT(VOS) =VOS ROUT
RIN
The DC offset voltage of the amplifier adds directly to the
value of the sense voltage, VSENSE. As VSENSE is increased,
accuracy improves. This is the dominant error of the system
and it limits the available dynamic range.
Output Voltage Error, VOUT(IBIAS), Due to the Bias
Currents IB+ and IB
The amplifier bias current IB+ flows into the SENSELO pin
while IB flows into the SENSEHI pin. The error due to IB
is the following:
VOUT(IBIAS) =ROUT IB+RSENSE
RIN
IB
Since IB+ ≈ IB = IBIAS, if RSENSE << RIN then,
VOUT(IBIAS) = –ROUT (IBIAS)
It is useful to refer the error to the input:
VVIN(IBIAS) = –RIN (IBIAS)
For instance, if IBIAS is 100nA and RIN is 1k, the input re-
ferred error is 100µV. This error becomes less significant
as the value of RIN decreases. The bias current error can
be reduced if an external resistor, RIN+, is connected as
shown in Figure 5, the error is then reduced to:
VOUT(IBIAS) = ±ROUT • IOS; IOS = IB+ – IB
Minimizing low current errors will maximize the dynamic
range of the circuit.
should be taken to place RIN and ROUT such that the gain
error due to the thermal gradient is minimized.
Selection of External Output Gain Resistor, ROUT
The output resistor, ROUT
, determines how the output cur-
rent is converted to voltage. VOUT is simply IOUTA ROUT
.
Typically, ROUT is a combination of resistors configured
as a resistor divider which has voltage taps going to the
comparator inputs to set the comparator thresholds.
In choosing an output resistor, the maximum output volt-
age must first be considered. If the subsequent circuit is a
buffer or ADC with limited input range, then ROUT must be
chosen so that IOUTA(MAX) ROUT is less than the allowed
maximum input range of this circuit.
In addition, the output impedance is determined by ROUT
.
If another circuit is being driven, then the input impedance
of that circuit must be considered. If the subsequent circuit
has high enough input impedance, then almost any use-
ful output impedance will be acceptable. However, if the
subsequent circuit has relatively low input impedance, or
draws spikes of current such as an ADC load, then a lower
output impedance may be required to preserve the accuracy
of the output. More information can be found in the Output
Filtering section. As an example, if the input impedance of
the driven circuit, RIN(DRIVEN), is 100 times ROUT, then the
accuracy of VOUT will be reduced by 1% since:
VOUT =IOUTA
R
OUT
R
IN(DRIVEN)
ROUT +RIN(DRIVEN)
=IOUTA ROUT 100
101 =0.99 IOUTA ROUT
Amplifier Error Sources
The current sense system uses an amplifier and resistors
to apply gain and level-shift the result. Consequently, the
output is dependent on the characteristics of the amplifier,
such as gain error and input offset, as well as the matching
of the external resistors.
Ideally, the circuit output is:
VOUT =VSENSE ROUT
RIN
; VSENSE =RSENSE ISENSE
LT6109—1 /LT6109—2 Rm / >L Rm' _\ w 14 L7LJCUEN2
LT6109-1/LT6109-2
14
610912fa
APPLICATIONS INFORMATION
There is also power dissipated due to the quiescent power
supply current:
PS = IS • V+
The comparator output current flows into the comparator
output pin and out of the V pin. The power dissipated in
the LT6109 due to each comparator is often insignificant
and can be calculated as follows:
POUTC1,C2 = (VOUTC1,C2 – V) • IOUTC1,C2
The total power dissipated is the sum of these
dissipations:
PTOTAL = POUTA + POUTC1 + POUTC2 + PS
At maximum supply and maximum output currents, the
total power dissipation can exceed 100mW. This will
cause significant heating of the LT6109 die. In order to
prevent damage to the LT6109, the maximum expected
dissipation in each application should be calculated. This
number can be multiplied by the θJA value, 160°C/W, to
find the maximum expected die temperature. Proper heat
sinking and thermal relief should be used to ensure that
the die temperature does not exceed the maximum rating.
Output Filtering
The AC output voltage, VOUT, is simply IOUTA ZOUT. This
makes filtering straightforward. Any circuit may be used
which generates the required ZOUT to get the desired filter
response. For example, a capacitor in parallel with ROUT
will give a lowpass response. This will reduce noise at the
output, and may also be useful as a charge reservoir to
keep the output steady while driving a switching circuit
such as a MUX or ADC. This output capacitor in parallel
with ROUT will create an output pole at:
f3dB =1
2πROUT CL
SENSELO, SENSEHI Range
The difference between VBATT (see Figure 7) and V+, as
well as the maximum value of VSENSE, must be considered
to ensure that the SENSELO pin doesn’t exceed the range
listed in the Electrical Characteristics table. The SENSELO
and SENSEHI pins of the LT6109 can function from 0.2V
Figure 6. Gain Error vs Resistor Tolerance
SENSEHI
LT6109
I
SENSE
R
SENSE
V
+
9
V
5
V
+
R
IN
V
BATT
SENSELO
10
1OUTA 8
610912 F05
R
OUT
V
OUT
R
IN+
+
Figure 5. RIN+ Reduces Error Due to IB
Output Voltage Error, VOUT(GAIN ERROR), Due to
External Resistors
The LT6109 exhibits a very low gain error. As a result,
the gain error is only significant when low tolerance
resistors are used to set the gain. Note the gain error is
systematically negative. For instance, if 0.1% resistors
are used for RIN and ROUT then the resulting worst-case
gain error is –0.4% with RIN = 100Ω. Figure 6 is a graph
of the maximum gain error which can be expected versus
the external resistor tolerance.
Output Current Limitations Due to Power Dissipation
The LT6109 can deliver a continuous current of 1mA to the
OUTA pin. This current flows through RIN and enters the
current sense amplifier via the SENSEHI pin. The power
dissipated in the LT6109 due to the output signal is:
POUT = (VSENSEHI – VOUTA) • IOUTA
Since VSENSEHI ≈ V+, POUTA ≈ (V+ – VOUTA) • IOUTA
RESISTOR TOLERANCE (%)
0.01
0.01
RESULTING GAIN ERROR (%)
0.1
1
10
0.1 1 10
610912 F06
RIN = 100Ω
RIN = 1k
LTé 1 09— 1 / LT61 09—2 4?; L7HEJWEGR 1 5
LT6109-1/LT6109-2
15
610912fa
above the positive supply to 33V below it. These operat-
ing voltages are limited by internal diode clamps shown
in Figures 1 and 2. On supplies less than 35.5V, the lower
range is limited by V + 2.5V. This allows the monitored
supply, VBATT
, to be separate from the LT6109 positive
supply as shown in Figure 7. Figure 8 shows the range of
operating voltages for the SENSELO and SENSEHI inputs,
for different supply voltage inputs (V+). The SENSELO and
SENSEHI range has been designed to allow the LT6109 to
monitor its own supply current (in addition to the load),
as long as VSENSE is less than 200mV. This is shown in
Figure 9.
Minimum Output Voltage
The output of the LT6109 current sense amplifier can
produce a non-zero output voltage when the sense voltage
is zero. This is a result of the sense amplifier VOS being
forced across RIN as discussed in the Output Voltage Er-
ror, VOUT(VOS) section. Figure 10 shows the effect of the
input offset voltage on the transfer function for parts at
the VOS limits. With a negative offset voltage, zero input
sense voltage produces an output voltage. With a positive
offset voltage, the output voltage is zero until the input
sense voltage exceeds the input offset voltage. Neglect-
ing VOS, the output circuit is not limited by saturation of
pull-down circuitry and can reach 0V.
Response Time
The LT6109 amplifier is designed to exhibit fast response
to inputs for the purpose of circuit protection or current
monitoring. This response time will be affected by the
external components in two ways, delay and speed.
APPLICATIONS INFORMATION
Figure 9. LT6109 Supply Current Monitored with Load
Figure 7. V+ Powered Separately from Load Supply (VBATT)
Figure 8. Allowable SENSELO, SENSEHI Voltage Range
SENSEHI
LT6109
ISENSE
RSENSE
V+
9
V
5
V+
RIN
VBATT
SENSELO
10
1OUTA 8
610912 F07
ROUT
VOUT
+
60
50
40
30
20 20.2V
40.2V
10
27
ALLOWABLE OPERATING VOLTAGES ON
SENSELO AND SENSEHI INPUTS (V)
2.8V
2.5V
2.7 10 20 30 35.5 40 50
V+ (V)
60
610912 F08
VALID SENSELO/
SENSEHI RANGE
SENSEHI
LT6109
ISENSE
RSENSE
V+
9
V
5
RIN
VBATT
SENSELO
10
1OUTA 8
610912 F09
ROUT
VOUT
+
Figure 10. Amplifier Output Voltage vs Input Sense Voltage
INPUT SENSE VOLTAGE (µV)
0
OUTPUT VOLTAGE (mV)
40
80
120
20
60
100
200 400 600 800
610912 F10
10001000 300 500 700 900
VOS = –125µV
VOS = 125µV
G = 100
LTé109—1/LT6109'2
LT6109-1/LT6109-2
16
610912fa
If the output current is very low and an input transient
occurs, there may be an increased delay before the
output voltage begins to change. The Typical Performance
Characteristics show that this delay is short and it can
be improved by increasing the minimum output current,
either by increasing RSENSE or decreasing RIN. Note that
the Typical Performance Characteristics are labeled with
respect to the initial sense voltage.
The speed is also affected by the external components.
Using a larger ROUT will decrease the response time, since
VOUT = IOUTA ZOUT where ZOUT is the parallel combination
of ROUT and any parasitic and/or load capacitance. Note
that reducing RIN or increasing ROUT will both have the
effect of increasing the voltage gain of the circuit. If the
output capacitance is limiting the speed of the system, RIN
and ROUT can be decreased together in order to maintain
the desired gain and provide more current to charge the
output capacitance.
The response time of the comparators is the sum of the
propagation delay and the fall time. The propagation
delay is a function of the overdrive voltage on the input
of the comparators. A larger overdrive will result in a
lower propagation delay. This helps achieve a fast system
response time to fault events. The fall time is affected by
the load on the output of the comparator as well as the
pull-up voltage.
The LT6109 amplifier has a typical response time of 500ns
and the comparators have a typical response time of 500ns.
When configured as a system, the amplifier output drives
the comparator input causing a total system response
time which is typically greater than that implied by the
individually specified response times. This is due to the
overdrive on the comparator input being determined by
the speed of the amplifier output.
Internal Reference and Comparators
The integrated precision reference and comparators com-
bined with the high precision current sense allow for rapid
and easy detection of abnormal load currents. This is often
critical in systems that require high levels of safety and
reliability. The LT6109 comparators are optimized for fault
detection and are designed with latching outputs. Latch-
ing outputs prevent faults from clearing themselves and
APPLICATIONS INFORMATION
require a separate system or user to reset the outputs. In
applications where the comparator output can intervene
and disconnect loads from the supply, latched outputs are
required to avoid oscillation. Latching outputs are also
useful for detecting problems that are intermittent. The
comparator outputs on the LT6109 are always latching
and there is no way to disable this feature.
Each of the comparators has one input available externally,
with the two versions of the part differing by the polarity
of those available inputs. The other comparator inputs are
connected internally to the 400mV precision reference.
The input threshold (the voltage which causes the output
to transition from high to low) is designed to be equal to
that of the reference. The reference voltage is established
with respect to the device V connection.
Comparator Inputs
The comparator inputs can swing from V to 60V regardless
of the supply voltage used. The input current for inputs
well above the threshold is just a few pAs. With decreas-
ing input voltage, a small bias current begins to be drawn
out of the input near the threshold, reaching 50nA max
when at ground potential. Note that this change in input
bias current can cause a small nonlinearity in the OUTA
transfer function if the comparator inputs are coupled to
the amplifier output with a voltage divider. For example, if
the maximum comparator input current is 50nA, and the
resistance seen looking out of the comparator input is 1k,
then a change in output voltage of 50µV will be seen on the
analog output when the comparator input voltage passes
through its threshold. If both comparator inputs are con-
nected to the output then they must both be considered.
Setting Comparator Thresholds
The comparators have an internal precision 400mV refer-
ence. In order to set the trip points of the LT6109-1 com-
parators, the output currents, IOVER and IUNDER, as well
as the maximum output current, IMAX, must be calculated:
IOVER =VSENSE(OVER)
RIN
, IUNDER =VSENSE(UNDER)
RIN
,
IMAX =VSENSE(MAX)
RIN
LT61 09—1 /LT61 09—2 IUNDER( 1) R WM) 'MAX M AW“) I if: M + R Vs VSENSE W H1 9 _,_ 1—— ~\J’ } Br ”fix— III-w 17
LT6109-1/LT6109-2
17
610912fa
where IOVER and IUNDER are the over and under currents
through the sense resistor which cause the comparators
to trip. IMAX is the maximum current through the sense
resistor.
Depending on the desired maximum amplifier output volt-
age (VMAX) the three output resistors, R1, R2 and R3, can
be configured in two ways. If:
VMAX >400mV
IOVER
+400mV –IUNDER R1
( )
IUNDER
IMAX
then use the configuration shown in Figure 3. The desired
trip points and full-scale analog output voltage for the
circuit in Figure 3 can then be achieved using the follow-
ing equations:
APPLICATIONS INFORMATION
R1=400mV
IOVER
R2 =400mV IUNDER R1
( )
IUNDER
R3 =VMAX IMAX R1+R2
( )
I
MAX
If:
VMAX <400mV
IOVER
+400mV –IUNDER R1
( )
IUNDER
IMAX
then use the configuration shown in Figure 11.
Figure 11. Typical Configuration with Alternative ROUT Configuration
OUTA
IOUTA
+
+
V+
C1
SENSEHI
INC2
INC1
R1
610912 F11
V
V+
V+
V
LT6109-1
SENSELO
EN/RST
OUTC2
VRESET
RC
VPULLUP
LOAD
V
SUPPLY
VSENSE
RSENSE
UNDERCURRENT
FLAG
OVERCURRENT
FLAG
RIN
+
OUTC14
3
2
1
5
+
V
V
V+
ISENSE = VSENSE
RSENSE
RC
R2
6
7
8
9
10
R3
CL
VOUT
400mV
REFERENCE
CLC
CLC
LT6109—1/LT6109'2 7 1 w IUNDER( )
LT6109-1/LT6109-2
18
610912fa
APPLICATIONS INFORMATION
The desired trip points and full-scale analog output voltage
for the circuit in Figure 13 can be achieved as follows:
R1=400mV
IOVER
R2 =VMAX IMAX R1
( )
IMAX
R3 =400mV IUNDER R1+R2
( )
IUNDER
Trip points for the LT6109-2 can be set by replacing IUNDER
with a second overcurrent, IOVER2.
Hysteresis
Each comparator has a typical built-in hysteresis of 10mV
to simplify design, ensure stable operation in the pres-
ence of noise at the inputs, and to reject supply noise that
might be induced by state change load transients. The
hysteresis is designed such that the threshold voltage is
altered when the output is transitioning from low to high
as is shown in Figure 12.
External positive feedback circuitry can be employed
to increase the effective hysteresis if desired, but such
circuitry will have an effect on both the rising and fall-
ing input thresholds, VTH (the actual internal threshold
remains unaffected).
Figure 13 shows how to add additional hysteresis to a
noninverting comparator.
R6 can be calculated from the extra hysteresis being added,
VHYS(EXTRA) and the amplifier output current which you
want to cause the comparator output to trip, IUNDER. Note
that the hysteresis being added, VHYS(EXTRA), is in addition
to the typical 10mV of built-in hysteresis.
R6 =400mV – VHYS(EXTRA)
IUNDER
R1 should be chosen such that R1 >> R6 so that VOUTA
does not change significantly when the comparator trips.
Figure 12. Comparator Output Transfer Characteristics
Figure 13. Noninverting Comparator with Added Hysteresis
VHYS
OUTC1
(LT6109-1/LT6109-2)
OUTC2
(LT6109-2)
OUTC2
(LT6109-1)
VHYS
VTH
INCREASING
VINC1,2
610912 F12
+
V+
V+
V
INC2
V
5
610912 F13
OUTA
7
8
V+
V+
SENSEHI
9
10
1
3
LT6109-1
RIN
RSENSE
ILOAD
R3
V+
SENSELO
OUTC2
400mV
REFERENCE
R5
R6
R1 VTH
R2
+
LT61 09—1 /LT61 09—2 L7HEJWEGR 1 9
LT6109-1/LT6109-2
19
610912fa
R3 should be chosen to allow sufficient VOL and compara-
tor output rise time due to capacitive loading.
R2 can be calculated:
R2 =R1V+– 400mV
( )
– VHYS(EXTRA) R3
( )
VHYS(EXTRA)
For very large values of R2 PCB related leakage may
become an issue. A tee network can be implemented to
reduce the required resistor values.
The approximate total hysteresis will be:
VHYS =10mV +R1V+– 400mV
R2+R3
For example, to achieve IUNDER = 100µA with 50mV of
total hysteresis, R6 = 3.57k. Choosing R1 = 35.7k, R3 =
10k and V+ = 5V results in R2 = 4.12M.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R6 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2 + R3) >> R6. The maximum VOUTA error
caused by this can be calculated as:
VOUTA =V+R6
R1+R2 +R3+R6
APPLICATIONS INFORMATION
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
When using the comparators with their inputs decoupled
from the output of the amplifier, they may be driven directly
by a voltage source. It is useful to know the threshold
voltage equations with the additional hysteresis. The input
falling edge threshold which causes the output to transition
from high to low is:
VTH(F) =400mV R11
R1+1
R2+R3
V+R1
R2+R3
The input rising edge threshold which causes the output
to transition from low to high is:
VTH(R) =410mV R11
R1+1
R2
Figure 14 shows how to add additional hysteresis to an
inverting comparator.
R7 can be calculated from the amplifier output current which
is required to cause the comparator output to trip, IOVER.
R7 =400mV
IOVER
, Assuming R1+R2
( )
>> R7
Figure 14. Inverting Comparator with Added Hysteresis
+
V+
V+
V
INC1
V
5
610912 F14
OUTA 8
9
6
V+
V+
SENSEHI
LT6109-1
RIN
RSENSE
ILOAD
V+
SENSELO
OUTC14
1
10
400mV
REFERENCE
R3
R6
R7
R1 VTH
R2
VDD
+
LT6109—1/LT6109—2 R1+ + 20 L7ELUEN2
LT6109-1/LT6109-2
20
610912fa
APPLICATIONS INFORMATION
To ensure (R1 + R2) >> R7, R1 should be chosen such
that R1 >> R7 so that VOUTA does not change significantly
when the comparator trips.
R3 should be chosen to allow sufficient VOL and compara-
tor output rise time due to capacitive loading.
R2 can be calculated:
R2 =R1VDD – 390mV
VHYS(EXTRA)
Note that the hysteresis being added, VHYS(EXTRA), is in
addition to the typical 10mV of built-in hysteresis. For very
large values of R2 PCB related leakage may become an
issue. A tee network can be implemented to reduce the
required resistor values.
The approximate total hysteresis is:
VHYS =10mV +R1VDD – 390mV
R2
For example, to achieve IOVER = 900µA with 50mV of total
hysteresis, R7 = 442Ω. Choosing R1 = 4.42k, R3 = 10k
and VDD = 5V results in R2 = 513k.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R7 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2) >> R7. The maximum VOUTA error caused
by this can be calculated as:
VOUTA =VDD R7
R1+R2+R7
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
When using the comparators with their inputs decoupled
from the output of the amplifier they may be driven directly
by a voltage source. It is useful to know the threshold
voltage equations with additional hysteresis. The input
rising edge threshold which causes the output to transi-
tion from high to low is:
VTH(R) =400mV 1+R1
R2
The input falling edge threshold which causes the output
to transition from low to high is:
VTH(F) =390mV 1+R1
R2
VDD
R1
R2
Comparator Outputs
The comparator outputs can maintain a logic low level of
150mV while sinking 500µA. The outputs can sink higher
currents at elevated VOL levels as shown in the Typical
Performance Characteristics. Load currents are conducted
to the V pin. The output off-state voltage may range
between 0V and 60V with respect to V, regardless of the
supply voltage used. As with any open-drain device, the
outputs may be tied together to implement wire-OR logic
functions. The LT6109-1 can be used as a single-output
window comparator in this way.
EN/RST Pin
The EN/RST pin performs the two functions of resetting
the latch on the comparators as well as shutting down the
LT6109. After powering on the LT6109, the comparators
must be reset in order to guarantee a valid state at their
outputs.
Applying a pulse to the EN/RST pin will reset the compara-
tors from their tripped state as long as the input on the
comparator is below the threshold and hysteresis for an
inverting comparator or above the threshold and hysteresis
for a noninverting comparator. For example, if VINC1 is
pulled higher than 400mV and latches the comparator, a
reset pulse will not reset that comparator unless its input
is held below the threshold by a voltage greater than the
10mV typical hysteresis. The comparator outputs typically
unlatch in 0.5µs with 2pF of capacitive load. Increased
capacitive loading will cause increased unlatch time.
Figure 15 shows the reset functionality of the EN/RST
pin. The width of the pulse applied to reset the compara-
tors must be greater than tRPW(MIN) (2µs) but less than
tRPW(MAX) (15µs). Applying a pulse that is longer than
40µs typically (or tying the pin low) will cause the part
to enter shutdown. Once the part has entered shutdown,
the supply current will be reduced to 3µA typically and the
amplifier, comparators and reference will cease to function
RESET PULSE WIDTH UM‘TS 1—45 _:f— L7 LJUW LT61 09— 1 / LT61 09—2 21
LT6109-1/LT6109-2
21
610912fa
APPLICATIONS INFORMATION
until the EN/RST pin is transitioned high. When the part
is disabled, both the amplifier and comparator outputs
are high impedance.
When the EN/RST pin is transitioned from low to high
to enable the part, the amplifier output PMOS can turn
on momentarily causing typically 1mA of current to flow
into the SENSEHI pin and out of the OUTA pin. Once the
amplifier is fully on, the output will go to the correct cur-
rent. Figure16 shows this behavior and the impact it has
on VOUTA. Circuitry connected to OUTA can be protected
from these transients by using an external diode to clamp
VOUTA or a capacitor to filter VOUTA.
Power Up
After powering on the LT6109, the comparators must be
reset in order to guarantee a valid state at their outputs.
Fast supply ramps may cause a supply current transient
during start-up as shown in the Typical Performance
Characteristics. This current can be lowered by reducing
the edge speed of the supply.
Reverse-Supply Protection
The LT6109 is not protected internally from external rever-
sal of supply polarity. To prevent damage that may occur
during this condition, a Schottky diode should be added
in series with V (Figure 17). This will limit the reverse
current through the LT6109. Note that this diode will limit
the low voltage operation of the LT6109 by effectively
reducing the supply voltage to the part by VD.
Also note that the comparator reference, comparator output
and EN/RST input are referenced to the V pin. In order to
preserve the precision of the reference and to avoid driving
the comparator inputs below V, R2 must connect to the
V pin. This will shift the amplifier output voltage up by
VD. VOUTA can be accurately measured differentially across
R1 and R2. The comparator output low voltage will also be
shifted up by VD. The EN/RST pin threshold is referenced
to the V pin. In order to provide valid input levels to the
LT6109 and avoid driving EN/RST below V the negative
supply of the driving circuit should be tied to V.
Figure 16. Amplifier Enable Response
Figure 15. Comparator Reset Functionality
EN/RST
OUTC1
OUTC2
tRESET
0.5µs (TYPICAL)
610912 F15
tRPW(MAX)
15µs
COMPARATOR
RESET
RESET PULSE WIDTH LIMITS
tRPW(MIN)
2µs
50µs/DIV
0V
VEN/RST
2V/DIV
0V
VOUTA
2V/DIV
610912 F14
V+ = 60V
RIN = 100Ω
ROUT = 10k
LT6109—1/LT6109—2 .n— r: W # J L 22 L7 LINE/“2
LT6109-1/LT6109-2
22
610912fa
APPLICATIONS INFORMATIONAPPLICATIONS INFORMATION
+
V+
V+
V
INC
V
5
VD
+
VOUTA
+
610912 F17
OUTA 8
9
6
V+
V+
SENSEHI
LT6109-1
RIN
RSENSE
ILOAD
VDD
VDD
SENSELO
OUTC4
EN/RST
2
1
10
400mV
REFERENCE
R3 R1
R2
VDD
+
Figure 17. Schottky Prevents Damage During Supply Reversal
TYPICAL APPLICATIONS
Overcurrent and Undervoltage Battery Fault Protection
SENSEHI SENSELO
OUTA
0.1Ω
R10
100Ω
LT6109-1
V
TO
LOAD
VOUT
9.53k
475Ω
30V
UNDERVOLTAGE
DETECTION
0.8A
OVERCURRENT
DETECTION
INC1
INC2
V+
EN/RST
OUTC2
8
1
6
7
5
OUTC1
10
9
10k
100k 6.2V*
IRF9640
2
5V
INC2
3
4
RESET
6109 TA02
100k
2N7000
*CMH25234B
1M
13.3k
+
+
+
+
0.1µF
10µF
12 LITHIUM
40V CELL STACK
The comparators monitor for overcurrent and undervolt-
age conditions. If either fault condition is detected the
battery will immediately be disconnected from the load.
The latching comparator outputs ensure the battery stays
disconnected from the load until an outside source resets
the LT6109 comparator outputs.
LT61 09—1 /LT61 09—2 L7HEJWEGR 23
LT6109-1/LT6109-2
23
610912fa
TYPICAL APPLICATIONS
MCU Interfacing with Hardware Interupts
SENSEHI SENSELO
OUTA
0.1Ω
V+
100Ω
LT6109-1
V
TO LOAD
VOUT
ADC IN
2k
6.65k
INC2
1.33k
INC1
V+
EN/RST
OUTC1
8
1
7
6
5
OUTC2
10
9
10k 2
5V
4
3
RESET
6109 TA03
10k
5V
VOUT/ADC IN
AtMega1280
PB0
PB1
PCINT2
PCINT3
ADC2
PB5
5
6
7
2
3
1
UNDERCURRENT ROUTINE
RESET COMPARATORS
MCU INTERUPT
OUTC2 GOES LOW
5V
0V
610912 TA03b
Example:
The comparators are set to have a 50mA undercurrent
threshold and a 300mA overcurrent threshold. The MCU
will receive the comparator outputs as hardware interrupts
and immediately run an appropriate fault routine.
Simplified DC Motor Torque Control
The figure shows a simplified DC motor control circuit.
The circuit controls motor current, which is proportional
to motor torque; the LT6109 is used to provide current
feedback to a difference amplifier that controls the current
in the motor. The LTC
®
6992 is used to convert the output
of the difference amp to the motors PWM control signal.
SENSEHI SENSELO
OUTA
LT6109
V
5.62k 100k
2
3
7LTC6246
F
4
61
3
6IRF640
5V
1N5818
0.1Ω
V
MOTOR
5
4
2
0.47µF VOUT
CURRENT SET POINT (0V TO 5V)
3.4k
1k
INC2
1M
610912 TA04
1k
78.7k 100k
280k
INC1
V+
EN/RST
OUTC1
OUTC2
RESET
100µF
+
LTC6992-1
V+
GND
5V
BRUSHED
DC MOTOR
(0A TO 5A)
MABUCHI
RS-540SH
MOD
SET
OUT
DIV
LT6109—1/LT6109—2 -||»w ' "HM—w "h \ :VSLT {a “/9? \i L7LJCUEN2
LT6109-1/LT6109-2
24
610912fa
TYPICAL APPLICATIONSTYPICAL APPLICATIONS
Power-On Reset or Disconnect Using a TimerBlox
®
Circuit
+
+
V
V+
V+
V
+
V
5
INC1
610912 TA06
V+
400mV
REFERENCE
V+
RIN
100Ω
RSENSE
ILOAD
R5
10k
INC2
OUTA
6
7
8
9
SENSEHI
LT6109-1
5V
SENSELO
OUTC2
OUTC1
EN/RST
10
1
3
4
2
R1
8.06k
R2
1.5k
R3
499Ω
R4
10k
R7
1M
R6
487k
R8
30k
TRIG
C1
0.1µF
Q1
2N2222
OUT
GND V+
SET DIV
LTC6993-3
5V
CREATES A DELAYED
10µs RESET PULSE
ON START-UP
OPTIONAL:
DISCHARGES C1
WHEN SUPPLY
IS DISCONNECTED
The LTC6993-1 provides a 10µS reset pulse to the LT6109-1.
The reset pulse is delayed by R7 and C1 whose time constant
must be greater than 10ms and longer than the supply
turn-on time. Optional components R8 and Q1 discharge
capacitor C1 when the supply and/or ground are discon-
nected. This ensures that when the power supply and/or
ground are restored, capacitor C1 can fully recharge and
trigger the LTC6993-3 to produce another comparator reset
pulse. These optional components are particularly useful
if the power and/or ground connections are intermittent,
as can occur when PCB are plugged into a connector.
LT61 09— 1 / LT61 09—2 fl / I 3V}; J_. un-w 'l'll' Im—I ”'I -Iw~—lwl——. ”Wm "H I "-H— L7HEJWEGR 25
LT6109-1/LT6109-2
25
610912fa
TYPICAL APPLICATIONS
Precision Power-On Reset Using a TimerBlox
®
Circuit
+
+
V
V+
V+
V
+
V
5
INC1
610912 TA07
V+
400mV
REFERENCE
V+
RIN
100Ω
RSENSE
ILOAD
R5
10k
INC2
OUTA
6
7
8
SENSEHI
LT6109-1
9
5V
SENSELO
OUTC2
OUTC1
EN/RST
10
1
3
4
2
R8
100k
R1
8.06k
R2
1.5k
R3
499Ω
R4
10k
R4
487k
C2
0.1µF
R5
681k
R6
1M
10µs RESET PULSE
GENERATOR
C1
0.1µF
R7
191k
1 SECOND DELAY
ON START-UP
TRIG OUT
GND V+
SET DIV
LTC6993-1
TRIG
GND
SET
LTC6994-1
OUT
V+
DIV
LT6109—1/LT6109—2 my: a ‘27 m5: 005) :DEIDEIEIW 23 i 320 345 {205) was was) 5:23: 552.4 # WE 55:7. ‘57 W ‘ : 26 L7ELUEN2
LT6109-1/LT6109-2
26
610912fa
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)
MSOP (MS) 0307 REV E
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1234 5
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
LT61 09— 1 / LT61 09—2 L7HEJWEGR 27
LT6109-1/LT6109-2
27
610912fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 12/12 Addition of A-grade Performance and Electrical Characteristics
Correction to Typical Application diagram
Addition of A-grade Order Information
Clarification to Absolute Maximum Short Circuit Duration
Edits to Electrical Characteristics conditions and notes
Clarification to nomenclature used in Typical Performance Characteristics
Clarification to Description of Pin Functions
Internal Reference Block redrawn for consistency
Edits to Applications Information
Addition of LT6108 to Related Parts
1, 3, 4, 11, 13, 15 (Fig10), 28
1
2
2
3, 4
5-8
8, 9
9, 10, 12, 17, 18, 19, 25, 26
10-16, 18, 20-25
28
LT6109—1/LT6109—2 28 L7ELUEN2
LT6109-1/LT6109-2
28
610912fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2011
LT 1212 REV A • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
ADC Driving Application
PART NUMBER DESCRIPTION COMMENTS
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LTC4150 Coulomb Counter/Battery Gas Gauge Indicates Charge Quantity and Polarity
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LT6108 High Side Current Sense Amplifier with Reference and
Comparator
2.7V to 60V, 125µV Offset, Resistor Set Gain, ±1.25% Threshold
Error
LT6700 Dual Comparator with 400mV Reference 1.4V to 18V, 6.5µA Supply Current
SENSEHI SENSELO
OUTA
0.1Ω SENSE
LOW
SENSE
HIGH
LT6109-1
V
OUT
2k 0.1µF
0.1µF
6.65k
INC2
1.33k
OVERCURRENT
UNDERCURRENT
INC1
V+
EN/RST
OUTC1
8
1
7
6
5
OUTC2
10
9
2
4
VCC
VCC VREF
10k 3
RESET
6109 TA05
IN
VCC
10k
IN+LTC2470
COMP
TO
MCU
100Ω
The low sampling current of the LTC2470 16-bit delta
sigma ADC is ideal for the LT6109.