
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 3
92 Freescale Semiconductor
Signal Listings
D2_MDQ[0:63] A7, B7, C5, D5, C8, D8, D6, A5, C4, A3, D3,
D2, A4, B4, C2, C1, E3, E1, H4, G1, D1, E4,
G3, G2, J4, J2, L1, L3, H3, H1, K1, L4, AA4,
AA2, AD1, AD2, Y1, AA1, AC1, AC3, AD5,
AE1, AG1, AG2, AC4, AD4, AF3, AF4, AH3,
AJ1, AM1, AM3, AH1, AH2, AL2, AL3, AK5,
AL5, AK7, AM7, AK4, AM4, AM6, AJ7
I/O D2_GVDD —
D2_MECC[0:7] H6, J5, M5, M4, G6, H7, M2, M1 I/O D2_GVDD —
D2_MDM[0:8] C7, B3, F4, J1, AB1, AE2, AK1, AM5, K6 O D2_GVDD —
D2_MDQS[0:8] B6, B1, F1, K2, AB3, AF1, AL1, AL6, L6 I/O D2_GVDD —
D2_MDQS[0:8] A6, A2, F2, K3, AB2, AE3, AK2, AJ6, K5 I/O D2_GVDD —
D2_MBA[0:2] W5, V5, P3 O D2_GVDD —
D2_MA[0:15] W1, U4, U3, T1, T2, T3, T5, R2, R1, R5, V4,
R4, P1, AH5, P4, N1
OD2_GV
DD —
D2_MWE Y4 O D2_GVDD —
D2_MRAS W3 O D2_GVDD —
D2_MCAS AB5 O D2_GVDD —
D2_MCS[0:3] Y3, AF6, AA5, AF7 O D2_GVDD —
D2_MCKE[0:3] N6, N5, N2, N3 O D2_GVDD 23
D2_MCK[0:5] U1, F5, AJ3, V2, E7, AG4 O D2_GVDD —
D2_MCK[0:5] V1, G5, AJ4, W2, E6, AG5 O D2_GVDD —
D2_MODT[0:3] AE6, AG7, AE5, AH6 O D2_GVDD —
D2_MDIC[0:1] F8, F7 IO D2_GVDD 27
D2_MVREF A18 DDR Port 2
reference
voltage
D2_GVDD /2 3
High Speed I/O Interface 1 (SERDES 1)4
SD1_TX[0:7] L26, M24, N26, P24, R26, T24, U26, V24 O SVDD —
SD1_TX[0:7] L27, M25, N27, P25, R27, T25, U27, V25 O SVDD —
SD1_RX[0:7] J32, K30, L32, M30, T30, U32, V30, W32 I SVDD —
SD1_RX[0:7] J31, K29, L31, M29, T29, U31, V29, W31 I SVDD —
SD1_REF_CLK N32 I SVDD —
SD1_REF_CLK N31 I SVDD —
SD1_IMP_CAL_TX Y26 Analog SVDD 19
SD1_IMP_CAL_RX J28 Analog SVDD 30
SD1_PLL_TPD U28 O SVDD 13, 17
Table 63. MPC8641 Signal Reference by Functional Block (continued)
Name1Package Pin Number Pin Type Power Supply Notes