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ADG804 Datasheet by Analog Devices Inc.

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ANALOG DEVICES
0.5 Ω CMOS 1.65 V TO 3.6 V
4-Channel Multiplexer
Data Sheet
ADG804
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 © 2004–2011 Analog Devices, Inc. All rights reserved.
FEATURES
0.5 Ω typical on resistance
0.8 Ω maximum on resistance at 125°C
1.65 V to 3.6 V operation
Automotive temperature range: –40°C to +125°C
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast switching times <25 ns
Typical power consumption (<0.1 μW)
APPLICATIONS
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Cellular phones
Modems
Audio and video signal routing
Communication systems
GENERAL DESCRIPTION
The ADG804 is a low voltage 4-channel CMOS multiplexer
comprising four single channels. This device offers ultralow
on resistance of less than 0.8 Ω over the full temperature range.
The digital inputs can handle 1.8 V logic with a 2.7 V to 3.6 V
supply.
The ADG804 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. A Logic 0 on the EN pin disables the device. The ADG804
has break-before-make switching.
The ADG804 is fully specified for 3.3 V, 2.5 V, and 1.8 V supply
operation. It is available in a 10-lead MSOP package.
FUNCTIONAL BLOCK DIAGRAM
2
9
4
7
1105
8
1 OF 4
DECODER
ADG804
S1
S2
S3
S4
A0 A1 EN
D
04307-0-001
Figure 1.
PRODUCT HIGHLIGHTS
1. <0.8 Ω over full temperature range of –40°C to +125°C.
2. Single 1.65 V to 3.6 V operation.
3. Operational with 1.8 V CMOS logic.
4. High current handling capability (300 mA continuous
current at 3.3 V).
5. Low THD + N (0.02% typ).
6. Small 10-lead MSOP package.
ADG804 Data Sheet
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration ............................................................................. 7
Typical Performance Characteristics ..............................................8
Test Circuits ..................................................................................... 11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
9/11Rev. 0 to Rev. A
Changes to Maximum Leakage Currents Parameter and
Conditions, Table 1 ........................................................................... 3
Changes to Maximum Leakage Currents Parameter and
Conditions, Table 2 ........................................................................... 4
Changes to Maximum Leakage Currents Parameter and
Conditions, Table 3 ........................................................................... 5
Added Lead Temperature Parameter ............................................ 6
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 13
4/04Revision 0: Initial Version
Table L
Data Sheet ADG804
Rev. A | Page 3 of 16
SPECIFICATIONS
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.1
Table 1.
Parameter
+25°C
40°C to
+85°C
40°C to
+125°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 0.5 typ VDD = 2.7 V; VS = 0 V to VDD, IS = 10 mA; Figure 18
0.65
0.75
0.8
max
On Resistance Match between 0.04 typ VDD = 2.7 V; VS = 0.65 V, IS = 10 mA
Channels (∆RON) 0.075 0.08 max
On Resistance Flatness (RFLAT(ON)) 0.1 typ VDD = 2.7 V; VS = 0 V to VDD,
0.15 0.16 max IS = 10 mA
LEAKAGE CURRENTS VDD = 3.6 V
Source Off Leakage I
S
(OFF)
±0.1
nA typ
V
S
= 1 V/2.6 V; V
D
= 2.6 V/1 V; Figure 19
±2 nA max
Drain Off Leakage ID (OFF) ±0.1 nA typ VS = 1 V/2.6 V; VD = 2.6 V/1 V; Figure 19
±2
nA max
Channel On Leakage ID, IS (ON) ±0.1 nA typ VS = VD = 1 V or 2.6 V; Figure 20
±2 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2 V min
Input Low Voltage, VINL 0.8 V max
Input Current IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
CIN, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS2
tTRANSISTION 24 ns typ RL = 50 , CL = 35 pF
30 32 35 ns max VS = 1.5 V/0 V; Figure 21
tON ENABLE 23 ns typ RL = 50 , CL = 35 pF
29 30 31 ns max VS = 1.5 V/0 V; Figure 23
tOFF ENABLE 5 ns typ RL = 50 , CL = 35 pF
6 7 8 ns max VS = 1.5 V; Figure 23
Break-Before-Make Time Delay (tBBM) 20 ns typ RL = 50 , CL = 35 pF
5 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection
28
pC typ
V
S
= 1.5 V, R
S
= 0 , C
L
= 1 nF; Figure 24
Off Isolation 67 dB typ RL = 50 , CL = 5 pF,f = 100 kHz; Figure 25
Channel-to-Channel Crosstalk 75 dB typ RL = 50 , CL = 5 pF, f = 100 kHz; Figure 27
Total Harmonic Distortion (THD+N) 0.02 % RL = 32 , f = 20 Hz to 20 kHz, VS = 2 V p-p
Insertion Loss 0.06 dB typ RL = 50 , CL = 5 pF, f = 100 kHz
3 dB Bandwidth
33
MHz typ
R
L
= 50 , C
L
= 5 pF; Figure 26
CS (OFF) 24 pF typ
CD (OFF) 105 pF typ
CD, CS (ON) 125 pF typ
POWER REQUIREMENTS
V
DD
= 3.6 V
IDD 0.003 µA typ Digital inputs = 0 V or 3.6 V
1.0 4 µA max
1 Temperature range, Y version: 40°C to +125°C.
2 Guaranteed by design, not subject to production test.
Table 2‘
ADG804 Data Sheet
Rev. A | Page 4 of 16
VDD = 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted.1
Table 2.
Parameter
+25°C
40°C to
+85°C
40°C to
+125°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 0.65 typ VDD = 2.3 V; VS = 0 V to VDD, IS = 10 mA; Figure 18
0.77 0.8 0.88 max
On Resistance Match between 0.4 typ VDD = 2.3 V; VS = 0.7 V; IS = 10 mA
Channels (∆RON) 0.08 0.085 max
On Resistance Flatness (RFLAT(ON)) 0.16 typ VDD = 2.3 V; VS = 0 V to VDD; IS = 10 mA
0.23
0.24
max
LEAKAGE CURRENTS VDD = 2.7 V
Source Off Leakage IS (OFF) ±0.1 nA typ VS = 1 V/2 V, VD = 2 V/1 V; Figure 19
±2 nA max
Drain Off Leakage ID (OFF) ±0.1 nA typ VS = 1/2 V, VD = 2/1 V; Figure 19
±2 nA max
Channel On Leakage ID, IS (ON) ±0.1 nA typ VS = VD = 1 V or 2 V; Figure 20
±2 nA max
DIGITAL INPUTS
Input High Voltage, VINH 1.7 V min
Input Low Voltage, VINL 0.7 V max
Input Current IINL or IINH 0.005 µA typ VIN = VINL or VINH
±0.1 µA max
CIN, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS
2
TTRANSISTION 25 ns typ RL = 50 , CL = 35 pF
31 33 35 ns max VS = 1.5 V/0 V; Figure 21
tON ENABLE 25 ns typ RL = 50 , CL = 35 pF
30 32 34 ns max VS = 1.5 V/0 V; Figure 22
tOFF ENABLE 5 ns typ RL = 50 , CL = 35 pF
7 8 9 ns max VS = 1.5 V; Figure 22
Break-Before-Make Time Delay (tBBM) 20 ns typ RL = 50 , CL = 35 pF
5 ns min VS1 = VS2 = 1.5 V; Figure 22
Charge Injection 20 pC typ VS = 1.25 V, RS = 0 , CL = 1 nF; Figure 24
Off Isolation 67 dB typ RL = 50 , CL = 5 pF, f = 100 kHz; Figure 25
Channel-to-Channel Crosstalk 75 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 27
Total Harmonic Distortion (THD + N) 0.022 % RL = 32 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p
Insertion Loss
dB typ
R
L
= 50 , C
L
= 5 pF, f = 100 kHz
3 dB Bandwidth 33 MHz typ RL = 50 , CL = 5 pF; Figure 26
CS (OFF) 25 pF typ
CD (OFF) 110 pF typ
CD, CS (ON) 128 pF typ
POWER REQUIREMENTS VDD = 2.7 V
IDD 0.003 µA typ Digital inputs = 0 V or 2.7 V
1 4 µA max
__________________________________________________________________________
1 Temperature range, Y version: 40°C to +125°C.
2 Guaranteed by design, not subject to production test.
Table 3‘ 5°C
Data Sheet ADG804
Rev. A | Page 5 of 16
VDD = 1.65 V ± 1.95 V, G N D = 0 V, unless otherwise noted.1
Table 3.
Parameter
+25°C
40°C to +8C
40°C to
+125°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance (RON) 1 typ VDD = 1.8 V; VS = 0 V to VDD, IS = 10 mA
1.4 2.2 2.2 max
2.2 4 4 max VDD = 1.65 V, VS = 0 V to VDD,
IS = 10 mA; Figure 18
On Resistance Match between Channels (∆RON) 0.1 typ VDD = 1.65 V, VS = 0.7 V, IS = 10 mA
LEAKAGE CURRENTS VDD = 1.95 V
Source Off Leakage I
S
(OFF)
±0.1
nA typ
V
S
= 0.6 V/1.35 V, V
D
= 1.35 V/0.6 V;
±2 nA max Figure 19
Drain Off Leakage ID (OFF) ±0.1 nA typ VS = 0.6/1.35 V, VD = 1.35/0.6 V;
±2
nA max
Figure 19
Channel On Leakage ID, IS (ON) ±0.1 nA typ VS = VD = 0.6 V or 1.35 V; Figure 20
±2 nA max
DIGITAL INPUTS
Input High Voltage, VINH 0.65 VDD V min
Input Low Voltage, VINL 0.35 VDD V max
Input Current I
INL
or I
INH
0.005
µA typ
V
IN
= V
INL
or V
INH
±0.1 µA max
CIN, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS2
tTRANSISTION 32 ns typ RL = 50 , CL = 35 pF
40 42 44 ns max VS = 1.5 V/0 V; Figure 21
tON ENABLE 34 ns typ RL = 50 , CL = 35 pF
39 40 41 ns max VS = 1.5/0 V; Figure 22
tOFF ENABLE 8 ns typ RL = 50 , CL = 35 pF
10 11 13 ns max VS = 1.5 V; Figure 22
Break-Before-Make Time Delay (tBBM) 22 ns typ RL = 50 , CL = 35 pF
5 ns min VS1 = VS2 = 1 V; Figure 22
Charge Injection
12
pC typ
V
S
= 1 V, R
S
= 0 V, C
L
= 1 nF; Figure 24
Off Isolation 67 dB typ RL = 50 , CL = 5 pF, f = 100 kHz;
Figure 25
Channel-to-Channel Crosstalk 75 dB typ RL = 50 , CL = 5 pF, f = 100 kHz,
Figure 27
Total Harmonic Distortion (THD + N))
0.14
%
R
L
= 32 , f = 20 Hz to 20 kHz,
VS = 1.2 V p-p
Insertion Loss 0.08 dB typ RL = 50 , CL = 5 pF, f = 100 kHz
3 dB Bandwidth 30 MHz typ RL = 50 , CL = 5 pF; Figure 26
CS (OFF) 26 pF typ
C
D
(OFF)
115
pF typ
CD, CS (ON) 130 pF typ
POWER REQUIREMENTS VDD = 1.95 V
IDD 0.003 µA typ Digital inputs = 0 V or 1.95 V
1.0 4 µA max
_______________________________________________________________________________________
1 Temperature range, Y version: 40°C to +125°C.
2 Guaranteed by design, not subject to production test.
Table 4‘ Table 5‘ AD6804 Truth Table ESD CAUTION A M ESD (eledrosmtk dis¢harge) sensifive device‘ Chavged dewces and mum boavds (an aismavge wnhum detection Although m: mam fealuves paKemed m pvopnemy proxemon wmmy, damage may occm on deers “unwed m high energy ESD Thereiove, pvcpev ESD piezaunons should be Kaken m avowd pevfovmanze degvadanon m ‘05: of funcnonalwy
ADG804 Data Sheet
Rev. A | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter Rating
VDD to GND 0.3 V to +4.6 V
Analog Inputs1 0.3 V to VDD + 0.3 V
Digital Inputs1 0.3 V to +4.6 V or 10 mA,
whichever occurs first
Peak Current, S or D (Pulsed at 1 ms, 10% Duty
Cycle Max)
3.3 V Operation
500 mA
2.5 V Operation 460 mA
1.8 V Operation 420 mA
Continuous Current, S or D
3.3 V Operation 300 mA
2.5 V Operation 275 mA
1.8 V Operation 250 mA
Operating Temperature Range
Automotive (Y Version) 40°C to +125°C
Storage Temperature Range 65°C to +150°C
Junction Temperature 150°C
MSOP Package
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 44°C/W
Lead Temperature, Soldering As per JEDEC J-STD-020
1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Table 5. ADG804 Truth Table
A1 A0 EN ON Switch
x x 0 None
0 0 1 S1
0 1 1 S2
1 0 1 S3
1
1
1
S4
ESD CAUTION
Table 6‘ Terminology |_||_H_||_H_|
Data Sheet ADG804
Rev. A | Page 7 of 16
PIN CONFIGURATION
NC = NO CONNECT
ADG804
TOP VIEW
(Not to Scale)
A0
1
S1
2
GND
3
S3
4
EN
5
A1
S2
D
S4
V
DD
10
9
8
7
6
04307-0-002
Figure 2. 10-Lead MSOP (RM-10)
Table 6. Terminology
VDD Most positive power supply potential.
IDD Positive supply current.
GND Ground (0 V) reference.
S Source terminal. May be an input or an output.
D Drain terminal. May be an input or an output.
EN Active high logic control input.
A0, A1 Logic control inputs. Used to select which source terminal, S1 to S4, is connected to the drain, D.
VD, VS Analog voltage on terminals D, S.
R
ON
Ohmic resistance between D and S.
RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the
specified analog signal range.
∆RON On resistance match between any two channels.
IS (OFF) Source leakage current with the switch off.
ID (OFF) Drain leakage current with the switch off.
I
D
, I
S
(ON)
Channel leakage current with the switch on.
VINL Maximum input voltage for Logic 0.
VINH Minimum input voltage for Logic 1.
IINL (IINH) Input current of the digital input.
CS (OFF) Off switch source capacitance. Measured with reference to ground.
CD (OFF) Off switch drain capacitance. Measured with reference to ground.
CD, CS (ON) On switch capacitance. Measured with reference to ground.
CIN Digital input capacitance.
tON (EN) Delay time between the 50% and the 90% points of the digital input and switch on condition.
tOFF (EN) Delay time between the 50% and the 90% points of the digital input and switch off condition.
tTRANSITION Delay time between the 50% and the 90% points of the digital input and switch on condition when switching from one
address state to the other.
tBBM On or off time measured between the 80% points of both switches when switching from one to another.
Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching.
Off Isolation A measure of unwanted signal coupling through an off switch.
Crosstalk A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance.
3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response The frequency response of the on switch.
Insertion Loss The loss due to the on resistance of the switch.
THD + N The ratio of the harmonic amplitudes plus noise of a signal to the fundamental.
\L /‘\\ ,_/ \ /‘\\ \ /\\ /, 2/ /
ADG804 Data Sheet
Rev. A | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
V
DD
= 3V V
DD
= 2.7V
V
DD
= 3.3V
V
DD
= 3.6V
0.60
0.55
0.50
0.45
0.40
0.35
0
ON RESISTANCE ()
0.30
0.25
0.20 0.5 1.0 1.5 2.0 2.5
V
D
, V
S
(V)
3.0 3.5
04307-0-004
T
A
= 25°C
Figure 3. On Resistance vs. VD (VS) VDD = 2.7 V to 3.6 V
1.2
1.0
0.8
0.6
0.4
0.3
0.2 0.5 1.0 1.5 2.0 2.50
V
D
, V
S
(V)
ON RESISTANCE ()
V
DD
= 2.3V
T
A
= 25°C
V
DD
= 2.7V
V
DD
= 2.5V
04307-0-005
Figure 4. On Resistance vs. VD (VS) VDD = 2.5 V ± 0.2 V
1.4
1.2
1.0
0.8
0.6
0.2 0.2 1.0 1.2 1.4 1.80
V
D
, V
S
(V)
ON RESISTANCE ()
0.4
0.4 0.6 0.8 1.6
1.6
1.8
T
A
= 25
°C
V
DD
= 1.95V
04307-0-006
V
DD
= 1.8V
V
DD
= 1.65V
Figure 5. On Resistance vs. VD (VS) VDD = 1.8 ± 0.15 V
1.2
1.0
0.8
0.6
0.4
0.3
0
ON RESISTANCE ()
0.5 1.0 1.5 2.0 2.50
V
D
, V
S
(V)
3.0
V
DD
= 3.3V
40
°C
+25
°C
+85
°C
+125
°C
04307-0-007
Figure 6. On Resistance vs. VD (VS) for Different Temperature, VDD = 3.3 V
1.2
1.0
0.8
0.6
0.4
0.2
00.5 1.0 1.5 2.0 2.50
V
D
, V
S
(V)
ON RESISTANCE ()
40
°C
+25°C
+85°C
+125°C
V
DD
= 2.5V
04307-0-008
Figure 7. On Resistance vs. VD (VS) for Different Temperature, VDD = 2.5 V
V
DD
= 1.8V
40
°C
+25°C
+85°C
+125°C
1.4
1.2
1.0
0.9
0.7
0.5
0
ON RESISTANCE ()
0.2
0.2 0.4 0.6 0.8 1.00
V
D
, V
S
(V)
1.2 1.4 1.6 1.8
04307-0-009
Figure 8. On Resistance vs. VD (VS) for Different Temperature, VDD = 1.8 V
fl (4/).ng \ d,,_/
Data Sheet ADG804
Rev. A | Page 9 of 16
–10
0
10
20
30
40
50
60
70
80
90
CURRENT (nA)
40 600 20 80 100 120
TEMPERATURE (°C)
04307-0-010
V
DD
= 3.3V
I
D
, I
S
(ON)
I
D
(OFF)
I
S
(OFF)
Figure 9. Leakage Current vs. Temperature, VDD = 3.3 V
–20
0
20
40
60
80
100
CURRENT (nA)
40 600 20 80 100 120
TEMPERATURE (°C)
04307-0-011
V
DD
= 2.5V
I
D
, I
S
(ON)
I
S
(OFF)
I
D
(OFF)
Figure 10. Leakage Current vs. Temperature, VDD = 2.5 V
–0
0
10
20
30
40
CURRENT (nA)
50
60
70
40 600 20 80 100 120
TEMPERATURE (°C)
04307-0-017
V
DD
= 1.8V
I
D
, I
S
(ON)
I
D
(OFF)
I
S
(OFF)
Figure 11. Leakage Current vs. Temperature, VDD = 1.8 V
90
80
70
60
50
40
30
20
10
00 0.5 1.0 1.5 2.0 2.5 3.53.0
T
A
= 25
°C
V
DD
= 3.6V
V
DD
= 2.5V
V
DD
= 1.8V
V
S
(V)
Q
INJ
(pC)
04307-0-012
Figure 12. Charge Injection vs. Source Voltage, VDD = 1.8 V
V
DD
= 1.8V
V
DD
= 2.5V
V
DD
= 3V
V
DD
= 1.8V V
DD
= 2.5V
V
DD
= 3V
35
30
25
20
15
10
5
0
–40 –20 0 20 40 60 80 100 120
TEMPERATURE (
°C)
TIME (ns)
04307-0-013
t
ON
ENABLE
t
OFF
ENABLE
Figure 13. tON/tOFF Times vs. Temperature
T
A
= 25
°C
V
DD
= 3.3V/2.5V/1.8V
0
–2
–6
–8
–10
–12
–14
–16
–18
–20
ATTENUATION (dB)
–4
0.03 0.1 1 10 100 300
FREQUENCY (MHz)
04307-0-014
Figure 14. Bandwidth
ADG804 Data Sheet
Rev. A | Page 10 of 16
T
A
= 25
°C
V
DD
= 3.3V/2.5V/1.8V
–10
–30
–40
–50
–60
–70
–80
–90
ATTENUATION (dB)
–20
0.03 0.1 110 100 300
FREQUENCY (MHz)
04307-0-015
Figure 15. Off Isolation vs. Frequency
T
A
= 25
°C
V
DD
= 3.3V/2.5V/1.8V
–10
–30
–40
–50
–60
–70
–80
–90
ATTENUATION (dB)
–20
0.03 0.1 110 100 300
FREQUENCY (MHz)
04307-0-016
Figure 16. Crosstalk vs. Frequency
0.10
THD + N (%)
0
0.02
0.04
0.06
0.08
20 20k10050 200 1k500 2k 10k5k
FREQUENCY (Hz)
V
DD
= 2.5V
T
A
= 25°C
S1A – D1
32 LOAD
1.5V p-p
0430-0-028
Figure 17. Total Harmonic Distortion + Noise
f :3 4‘57 M?
Data Sheet ADG804
Rev. A | Page 11 of 16
TEST CIRCUITS
V1
V
S
I
DS
R
ON
= V1/I
DS
S D
04307-0-018
Figure 18. On Resistance
AA
I
D
(OFF)I
S
(OFF)
V
S
V
D
SD
04307-0-019
Figure 19. Off Leakage
A
I
D
(ON)
V
D
SD
NC
04307-0-020
Figure 20. On Leakage
50%50%
90%
90%
3V
0V
V
OUT
t
TRANSITION
t
TRANSITION
ADDRESS
DRIVE (EN)
V
DD
V
S
V
S1
V
S4
R
L
C
L
V
OUT
V
DD
S1
S2
S3
S4
A1
A0
EN GND 5035pF
D
+2.4V
0.1µF
04307-0-021
Figure 21. Switching Time of Multiplexer, tTRANSITION
V
DD
V
S
V
S
R
L
C
L
V
OUT
V
DD
S1
S2
S3
S4
A1
A0
EN GND 5035pF
D
+2.4V
0.1µF
50
t
BBM
t
BBM
80% 80%
50%50%
0V
V
IN
V
OUT
04307-0-022
Figure 22. Break-Before-Make Time Delay, tBBM
V
DD
V
S
R
L
C
L
V
OUT
V
DD
S1
S2
S3
S4
A1
A0
EN GND 5035pF
D
0.1µF
50t
ON
(EN) t
OFF
(EN)
50% 50%
50%50%
0V
0.9V
0
0.9V
0
3V
V
0
0V
ADDRESS
DRIVE (V
IN
)
OUTPUT
04307-0-023
Figure 23. Enable Delay, tON(EN), tOFF(EN)
§VV? M wwi w?
ADG804 Data Sheet
Rev. A | Page 12 of 16
DECODER
GND
A1 A2
EN
V
DD
V
DD
V
OUT
C
L
1nF
R
8
V
8
V
OUT
Q
INJ
= C
L
V
OUT
V
OUT
CHARGE INJECTION = V
OUT
C
L
V
IN
SW ON
SW OFF
04307-0-024
SW OFF
Figure 24. Charge Injection
NETWORK
ANALYZER
V
DD
GND
OFF ISOLATION = 20 LOG
V
DD
0.1F
S
D
50
50
50
V
S
V
OUT
R
L
V
OUT
V
S
04307-0-025
Figure 25. Off Isolation
NETWORK
ANALYZER
V
DD
GND
OFF ISOLATION = 20 LOG
V
DD
0.1F
Sx*
D
50
50
V
S
V
OUT
R
L
V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
04307-0-026
*UNUSED CHANNELS TERMINATED WITH 50 TO GROUND
Figure 26. Bandwidth
NETWORK
ANALYZER
VDD
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20 LO
G
VDD
0.1F
S1
D
50
VS
VOUT
VOUT
VS
S2
04307-0-027
50
RL
50
Figure 27. Channel-to-Channel Crosstalk
Data Sheet ADG804
Rev. A | Page 13 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-BA
091709-A
0.70
0.55
0.40
5
10
1
6
0.50 BSC
0.30
0.15
1.10 MAX
3.10
3.00
2.90
COPLANARITY
0.10
0.23
0.13
3.10
3.00
2.90
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
Figure 28. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding2, 3
ADG804YRM –40°C to +125°C 10-Lead Mini Small Outline Package (MSOP) RM-10 S1A
ADG804YRMZ –40°C to +125°C 10-Lead Mini Small Outline Package (MSOP) RM-10 S0N#
ADG804YRMZ-REEL –40°C to +125°C 10-Lead Mini Small Outline Package (MSOP) RM-10 S0N#
ADG804YRMZ-REEL7 –40°C to +125°C 10-Lead Mini Small Outline Package (MSOP) RM-10 S0N#
1 Z= RoHS compliant part.
2 Branding on this package is limited to three characters due to space constraints.
3 # denotes lead-free product may be top or bottom marked
ADG804 Data Sheet
Rev. A | Page 14 of 16
NOTES
Data Sheet ADG804
Rev. A | Page 15 of 16
NOTES
ANALOG DEVICES www.ana|ng.num
ADG804 Data Sheet
Rev. A | Page 16 of 16
NOTES
© 20042011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04307–0–9/11(A)

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