MAX7315 Datasheet by Analog Devices Inc./Maxim Integrated

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8. Po lVI/JXI/VI lVI/JXIIVI
General Description
The MAX7315 I2C-/SMBus-compatible serial interfaced
peripheral provides microprocessors with 8 I/O ports.
Each I/O port can be individually configured as either an
open-drain current-sinking output rated at 50mA at 5.5V,
or a logic input with transition detection. A ninth port can
be used for transition detection interrupt or as a general-
purpose output. The outputs are capable of directly dri-
ving LEDs, or providing logic outputs with external
resistive pullup up to 5.5V.
PWM current drive is integrated with 8 bits of control.
Four bits are global control and apply to all LED outputs
to provide coarse adjustment of current from fully off to
fully on in 14 intensity steps. Each output then has indi-
vidual 4-bit control, which further divides the globally
set current into 16 more steps. Alternatively, the current
control can be configured as a single 8-bit control that
sets all outputs at once.
The MAX7315 is pin and software compatible with the
PCA9534 and PCA9554(A).
Each output has independent blink timing with two blink
phases. All LEDs can be individually set to be on or off
during either blink phase, or to ignore the blink control.
The blink period is controlled by a register.
The MAX7315 supports hot insertion. All port pins, the INT
output, SDA, SCL, and the slave address inputs ADO-2
remain high impedance in power-down (V+ = 0V) with up
to 6V asserted upon them.
The MAX7315 is controlled through the 2-wire I2C/SMBus
serial interface, and can be configured to one of 64 I2C
addresses.
Applications
Features
400kbps, 2-Wire Serial Interface, 5.5V Tolerant
2V to 3.6V Operation
Overall 8-Bit PWM LED Intensity Control
Global 16-Step Intensity Control
Plus Individual 16-Step Intensity Control
Automatic Two-Phase LED Blinking
50mA Maximum Port Output Current
Supports Hot Insertion
Outputs Are 5.5V-Rated Open Drain
Inputs Are Overvoltage Protected to 5.5V
Transition Detection with Interrupt Output
Low Standby Current (1.2µA typ; 3.3µA max)
Tiny 3mm x 3mm, Thin QFN Package
-40°C to +125°C Temperature Range
All Ports Can Be Configured as Inputs or Outputs
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
________________________________________________________________ Maxim Integrated Products 1
12 11 10 9
INT/O8
P7
P6
5
6
7
8
P3
GND
P5
16
15
14
13
AD1
ADO
V+
1234
AD2
P0
P1
P2
SDA
P4
SCL
THIN QFN
TOP VIEW
MAX7315ATE
Pin Configurations
19-3056; Rev 3; 1/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642,or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Ordering Information
PART TEMP
RANGE
PIN-
PACKAGE
TOP
MARK
PKG
CODE
MAX7315ATE -40°Cto +125°C
16 Thin QFN
3mm x 3mm
x0.8mm
AAU T1633-4
MAX7315AEE -40°Cto +125°C16 QSOP — —
MAX 7315AU E -40°Cto +125°C16 TSSOP — —
Pin Configurations continued at end of data sheet.
LCD Backlights
LED Status Indication
Portable Equipment
Laptop Computers
Keypad Backlights
RGB LED Drivers
Cellular Phones
Typical Application Circuit appears at end of data sheet.
IIIIAXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage (with respect to GND)
V+ .............................................................................-0.3V to +4V
SCL, SDA, AD0, AD1, AD2, P0–P7 ..........................-0.3V to +6V
INT/O8 .....................................................................-0.3V to +8V
DC Current on P0–P7, INT/O8 ............................................55mA
DC Current on SDA.............................................................10mA
Maximum GND Current ....................................................190mA
Continuous Power Dissipation (TA=+70°C)
16-Pin TSSOP (derate 9.4mW/°C over +70°C) ............754mW
16-Pin QSOP (derate 8.3mW/°C over +70°C)..............666mW
16-Pin QFN (derate 14.7mW/°C over +70°C) ............1176mW
Operating Temperature Range (TMIN to TMAX)-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMIN to TMAX,unless otherwise noted. Typical values are at V+ = 3.3V, TA=+25°C.)
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Operating Supply Voltage V+ 2
3.6
V
Output Load External Supply
Voltage VEXT 0
5.5
V
TA=+25°C
1.2
2.3
TA=-40°C to +85°C
2.6
Standby Current
(Interface Idle, PWM Disabled)
I+
SCL and SDA at V +; other
digital inp uts at V +or GN D;
PWM intensi ty contr ol disab led
TA= TMIN to TMAX
3.3
µA
TA=+25°C 7
12.1
TA=-40°C to +85°C
13.5
Supply Current
(Interface Idle, PWM Enabled) I+
SCL and SDA at V +; other
digital inp uts at V +or GN D;
PWM intensi ty contr ol enab led
TA= TMIN to TMAX
14.4
µA
TA=+25°C 40 76
TA=-40°C to +85°C
78
Supply Current
(Interface Running, PWM
Disabled)
I+
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control disabled TA= TMIN to TMAX 80
µA
TA=+25°C 51
110
TA=-40°C to +85°C
117
Supply Current
(Interface Running, PWM
Enabled)
I+
fSCL = 400kHz; other digital
inputs at V+ or GND; PWM
intensity control enabled TA= TMIN to TMAX
122
µA
Input High Voltage
SDA, SCL, AD0, AD1, AD2,
P0–P7
VIH 0.7
V+
V
Input Low Voltage
SDA, SCL, AD0, AD1, AD2,
P0–P7
VIL 0.3
V+
V
Input Leakage Current
SDA, SCL, AD0, AD1, AD2,
P0–P7
IIH, IIL
Input = GND or V+
-0.2
+0.2
µA
Input Capacitance
SDA, SCL, AD0, AD1, AD2,
P0–P7
8pF
llfl/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMIN to TMAX,unless otherwise noted. Typical values are at V+ = 3.3V, TA= + 25°C.)
(Note 1)
SYMBOL
MIN
TYP
MAX
UNITS
0.15
0.25
TA=-40°C to +85°C
0.29
0.31
0.13
0.22
TA=-40°C to +85°C
0.25
0.27
0.12
0.22
TA=-40°C to +85°C
0.23
0.25
VOLSDA
0.4
kHz
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMIN to TMAX,unless otherwise noted. Typical values are at V+ = 3.3V, TA=+25°C.)
(Note 1)
SYMBOL
MIN
TYP
MAX
UNITS
400
kHz
1.3
tHD, STA
0.6
tSU, STA
0.6
tSU, STO
0.6
tHD, DAT
0.9
tSU, DAT
180
1.3
0.7
Rise Time of Both SDA and SCL Signals, Receiving
0.1Cb
300
0.1Cb
300
0.1Cb
250
400
M/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
4 _______________________________________________________________________________________
TIMING CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA= TMIN to TMAX,unless otherwise noted. Typical values are at V+ = 3.3V, TA=+25°C.)
(Note 1)
SYMBOL
MIN
TYP
MAX
UNITS
6.5
100
1
Note 1: All parameters tested at TA=+25°C. Specifications over temperature are guaranteed by design.
Note 2: Amaster device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 3: Guaranteed by design.
Note 4: Cb=total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDD and 0.7 x VDD.
Note 5: ISINK 6mA. Cb=total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VDD and 0.7 x VDD.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
STANDBY CURRENT vs. TEMPERATURE
MAX7315 toc01
TEMPERATURE (°C)
STANDBY CURRENT (µA)
1109565 80-10 5 20 35 50-25
1
2
3
4
5
6
7
8
9
10
0
-40 125
V+ = 3.6V
PWM ENABLED
V+ = 2.7V
PWM ENABLED
V+ = 2V
PWM DISABLED
V+ = 2.7V
PWM DISABLED
V+ = 3.6V
PWM 
DISABLED
V+ = 2V
PWM ENABLED
SUPPLY CURRENT vs. TEMPERATURE
(PWM DISABLED; fSCL = 400kHz)
MAX7315 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
110956580-10 5 20 35 50-25
10
20
30
40
50
60
70
0
-40 125
V+ = 3.6V
V+ = 2.7V
V+ = 2V
5
10
15
20
25
30
35
40
45
50
55
60
65
70
0
SUPPLY CURRENT vs. TEMPERATURE
(PWM ENABLED; fSCL = 400kHz)
MAX7315 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
110956580-10 5 20 35 50-25-40 125
V+ = 3.6V
V+ = 2.7V
V+ = 2V
__________________________________________Typical Operating Characteristics
(TA=+25°C, unless otherwise noted.)
J { l HIHHHHH ‘HHHIIHHH‘ J7mL—JL mnmmwrm ; un [VIIJXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________ 5
PORT OUTPUT LOW VOLTAGE WITH 50mA
LOAD CURRENT vs. TEMPERATURE
PORT OUTPUT LOW VOLTAGE VOL (V)
0.1
0.2
0.3
0.4
0.5
0.6
0
MAX7315 toc04
TEMPERATURE (°C)
110956580-10 5 20 35 50-25-40 125
V+ = 3.6V
V+ = 2.7V
V+ = 2V
PORT OUTPUT LOW VOLTAGE WITH 20mA
LOAD CURRENT vs. TEMPERATURE
MAX7315 toc05
TEMPERATURE (°C)
PORT OUTPUT LOW VOLTAGE VOL (V)
1109580655035205-10-25
0.1
0.2
0.3
0.4
0.5
0.6
0
-40 125
ALL OUTPUTS LOADED
V+ = 3.6V
V+ = 2.7V
V+ = 2V
PWM CLOCK FREQUENCY
vs. TEMPERATURE
MAX7315 toc06
TEMPERATURE (°C)
PWM CLOCK FREQUENCY
1109580655035205-10-25
0.950
1.000
1.050
0.900
0.925
0.975
1.025
-40 125
V+ = 3.6V
V+ = 2V
V+ = 2.7V
NORMALIZED TO V+ = 3.3V, TA= +25°C
SCOPE SHOT OF 2 OUTPUT PORTS
MAX7315 toc07
2ms/div
OUTPUT 1,
2V/div
OUTPUT 2,
2V/div
MASTER INTENSITY SET TO 1/15
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 15/16
SCOPE SHOT OF 2 OUTPUT PORTS
MAX7315 toc08
2ms/div
OUTPUT 1,
2V/div
OUTPUT 2,
2V/div
OUTPUT 1 INDIVIDUAL INTENSITY
SET TO 1/16
MASTER INTENSITY SET TO 14/15
OUTPUT 2 INDIVIDUAL INTENSITY
SET TO 14/15
SINK CURRENT vs. VOL
MAX7315 toc09
SINK CURRENT (mA)
VOL (V)
5040302010
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0
0
V+ = 2V
V+ = 2.7V
ONLY ONE OUTPUT LOADED
V+ = 3.3V
V+ = 3.6V
Typical Operating Characteristics (continued)
(TA=+25°C, unless otherwise noted.)
MEL
MAX7315
Functional Overview
The MAX7315 is a general-purpose input/output (GPIO)
peripheral that provides eight I/O ports, P0–P7, con-
trolled through an I2C-compatible serial interface. A 9th
output-only port, INT/O8, can be configured as an inter-
rupt output or as a general-purpose output port. All out-
put ports sink loads up to 50mA connected to external
supplies up to 5.5V, independent of the MAX7315’s
supply voltage. The MAX7315 is rated for a ground cur-
rent of 190mA, allowing all nine outputs to sink 20mA at
the same time. Figure 1 shows the output structure of
the MAX7315. The ports default to inputs on power-up.
Port Inputs and Transition Detection
An input ports register reflects the incoming logic levels
of the port pins, regardless of whether the pin is
defined as an input or an output. Reading the input
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
6 _______________________________________________________________________________________
AD0, AD1,
Exposed pad
Pin Description
Figure 1. Simplified Schematic of I/O Ports
D
CK
Q
Q
FF
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
WRITE
CONFIGURATION
PULSE
WRITE PULSE
READ PULSE
CONFIGURATION
REGISTER
D
CK
Q
Q
FF
INPUT PORT
REGISTER
D
CK
Q
Q
FF
OUTPUT
PORT
REGISTER
OUTPUT PORT
REGISTER DATA
I/O PIN
Q2
GND
INPUT PORT
REGISTER DATA
TO INT
ports register latches the current-input logic level of the
affected eight ports. Transition detection allows all ports
configured as inputs to be monitored for changes in
their logic status. The action of reading the input ports
register samples the corresponding 8 port bits’ input
condition. This sample is continuously compared with
the actual input conditions. A detected change in input
condition causes the INT/O8 interrupt output to go low,
if configured as an interrupt output. The interrupt is
cleared either automatically if the changed input returns
to its original state, or when the input ports register is
read.
The INT/O8 pin can be configured as either an interrupt
output or as a 9th output port with the same static or
blink controls as the other eight ports (Table 4).
Port Output Control and LED Blinking
The blink phase 0 register sets the output logic levels of
the eight ports P0–P7 (Table 8). This register controls
the port outputs if the blink function is disabled. A dupli-
cate register, the blink phase 1 register, is also used if
the blink function is enabled (Table 9). In blink mode,
the port outputs can be flipped between using the blink
phase 0 register and the blink phase 1 register using
software control (the blink flip flag in the configuration
register) (Table 4).
PWM Intensity Control
The MAX7315 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity con-
trol. PWM intensity control can be enabled on an out-
put-by-output basis, allowing the MAX7315 to provide
any mix of PWM LED drives and glitch-free logic out-
puts (Table 10). PWM can be disabled entirely, in which
case all output ports are static and the MAX7315 oper-
ating current is lowest because the internal oscillator is
turned off.
PWM intensity control uses a 4-bit master control and 4
bits of individual control per output (Tables 13, 14). The
4-bit master control provides 16 levels of overall intensi-
ty control, which applies to all PWM-enabled output
ports. The master control sets the maximum pulse width
from 1/15 to 15/15 of the PWM time period. The individ-
ual settings comprise a 4-bit number further reducing
the duty cycle to be from 1/16 to 15/16 of the time win-
dow set by the master control.
For applications requiring the same PWM setting for all
output ports, a single global PWM control can be used
instead of all the individual controls to simplify the con-
trol software and provide 240 steps of intensity control
(Tables 10 and 13).
Standby Mode
When the serial interface is idle and the PWM intensity
control is unused, the MAX7315 automatically enters
standby mode. If the PWM intensity control is used, the
operating current is slightly higher because the internal
PWM oscillator is running. When the serial interface is
active, the operating current also increases because
the MAX7315, like all I2Cslaves, has to monitor every
transmission.
Serial Interface
Serial Addressing
The MAX7315 operates as a slave that sends and
receives data through an I2C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX7315 and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX7315 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7k,
is required on SDA. The MAX7315 SCL line operates
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________ 7
Figure 2. 2-Wire Serial Interface Timing Details
SCL
SDA 
tRtF
tBUF
START
CONDITION
STOP
CONDITION
REPEATED START CONDITION
START CONDITION
tSU,STO
tHD,STA
tSU,STA
tHD,DAT
tSU,DAT
tLOW
tHIGH
tHD,STA
MIJXIIVI
MAX7315
only as an input. A pullup resistor, typically 4.7k,is
required on SCL if there are multiple masters on the 2-
wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX7315
7-bit slave address plus R/Wbit, a register address
byte, one or more data bytes, and finally a STOP condi-
tion (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
has finished communicating with the slave, it issues a
STOP (P) condition by transitioning SDA from low to
high while SCL is high. The bus is then free for another
transmission (Figure 3).
Bit Transfer
One data bit is transferred during each clock pulse.
The data on SDA must remain stable while SCL is high
(Figure 4).
Acknowledge
The acknowledge bit is a clocked 9th bit that the recipi-
ent uses to handshake receipt of each byte of data
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock
pulse, and the recipient pulls down SDA during the
acknowledge clock pulse so the SDA line is stable low
during the high period of the clock pulse. When the
master is transmitting to the MAX7315, the device gen-
erates the acknowledge bit because the MAX7315 is
the recipient. When the MAX7315 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient.
Slave Address
The MAX7315 has a 7-bit long slave address (Figure 6).
The eighth bit following the 7-bit slave address is the
R/Wbit. The R/Wbit is low for a write command, high
for a read command.
The slave address bits A6 through A0 are selected by
the address inputs AD0, AD1, and AD2. These pins can
be connected to GND, V+, SDA, or SCL. The MAX7315
has 64 possible slave addresses (Table 1) and, there-
fore, a maximum of 64 MAX7315 devices can be con-
trolled independently from the same interface.
Message Format for Writing the MAX7315
Awrite to the MAX7315 comprises the transmission of
the MAX7315’s slave address with the R/Wbit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX7315 is to be
written to by the next byte, if received (Table 2). If a
STOP condition is detected after the command byte is
received, then the MAX7315 takes no further action
beyond storing the command byte.
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
8 _______________________________________________________________________________________
Figure 3. Start and Stop Conditions
SDA
SCL
START
CONDITION
STOP
CONDITION
S P
Figure 4. Bit Transfer
SDA
SCL
DATA LINE STABLE;
DATA VALID
CHANGE OF DATA
ALLOWED
Figure 5. Acknowledge
SCL
SDA BY
TRANSMITTER
CLOCK PULSE
FOR ACKNOWLEDGE
START
CONDITION
SDA BY
RECEIVER
1 2 8 9
S
Figure 6. Slave Address
SDA
SCL
A5
MSB LSB
ACKA4 A1A6 A3 A0A2 R/W
llfl/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
_______________________________________________________________________________________ 9
Table 1. MAX7315 I2CSlave Address Map
M/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
10 ______________________________________________________________________________________
Table 1. MAX7315 I2CSlave Address Map (continued)
Any bytes received after the command byte are data
bytes. The first data byte goes into the internal register
of the MAX7315 selected by the command byte (Figure
8). If multiple data bytes are transmitted before a STOP
condition is detected, these bytes are generally stored
in subsequent MAX7315 internal registers because the
command byte address autoincrements (Table 2). A
diagram of a write to the output ports registers (blink
phase 0 register or blink phase 1 register) is given in
Figure 10.
Message Format for Reading
The MAX7315 is read using the MAX7315’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read using the same rules as for a
write (Table 2). Thus, a read is initiated by first configur-
ing the MAX7315’s command byte by performing a
write (Figure 7). The master can now read n consecu-
tive bytes from the MAX7315 with the first data byte
being read from the register addressed by the initial-
ized command byte. When performing read-after-write
verification, remember to reset the command byte’s
address because the stored command byte address
has been autoincremented after the write (Table 2). A
diagram of a read from the input ports register is shown
in Figure 10 reflecting the states of the ports.
Operation with Multiple Masters
If the MAX7315 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7315 should
use a repeated start between the write, which sets the
MAX7315’s address pointer, and the read(s) that takes
the data from the location(s) (Table 2). This is because it
is possible for master 2 to take over the bus after master
1has set up the MAX7315’s address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX7315’s address pointer, then master
1’s delayed read can be from an unexpected location.
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 11
Figure 8. Command and Single Data Byte Received
SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE
1
BYTE
AUTOINCREMENT MEMORY ADDRESS
D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3D2D5D4D7D6
ACKNOWLEDGE FROM MAX7315 ACKNOWLEDGE FROM MAX7315
ACKNOWLEDGE FROM MAX7315
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7315'S REGISTERS
R/W
Figure 9. n Data Bytes Received
SAAAP0SLAVE ADDRESS COMMAND BYTE DATA BYTE
N
BYTES
AUTOINCREMENT MEMORY ADDRESS
D15 D14 D13 D12 D11 D10 D9 D8 D1 D0D3D2D5D4D7D6
ACKNOWLEDGE FROM MAX7315 ACKNOWLEDGE FROM MAX7315
ACKNOWLEDGE FROM MAX7315
HOW COMMAND BYTE AND DATA BYTE MAP INTO
MAX7315'S REGISTERS
R/W
Figure 7. Command Byte Received
SAA
P
0SLAVE ADDRESS COMMAND BYTE
ACKNOWLEDGE FROM MAX7315
D15 D14 D13 D12 D11 D10 D9 D8
COMMAND BYTE IS STORED ON RECEIPT OF
STOP CONDITION
ACKNOWLEDGE FROM MAX7315
R/W
M/JXIIVI
MAX7315
Command Address Autoincrementing
The command address stored in the MAX7315 circu-
lates around grouped register functions after each data
byte is written or read (Table 2).
Device Reset
If a device reset input is needed, consider the
MAX7316. The MAX7316 includes a RST input, which
clears any transaction to or from the MAX7316 on the
serial interface and configures the internal registers to
the same state as a power-up reset.
Detailed Description
Initial Power-Up
On power-up all control registers are reset and the
MAX7315 enters standby mode (Table 3). Power-up
status makes all ports into inputs and disables both the
PWM oscillator and blink functionality.
Configuration Register
The configuration register is used to configure the PWM
intensity mode, interrupt, and blink behavior, operate
the INT/O8 output, and read back the interrupt status
(Table 4).
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
12 ______________________________________________________________________________________
Figure 10. Read, Write, and Interrupt Timing Diagrams
SLAVE ADDRESS
123456789
S A6 A5 A4 A3 A2 A1 A0 0 A 0 0 0 0 0 0 0
COMMAND BYTE
1A A AP
START CONDITION ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM SLAVE STOP
CONDITION
P7–P0 DATA1 VALID DATA2 VALID
SLAVE ADDRESS
123456789
S A6 A5 A4 A3 A2 A1 A0 1 A
COMMAND BYTE
ANA
START CONDITION ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM MASTER
P7–P0
STOP CONDITION
P
NO ACKNOWLEDGE FROM
MASTER
DATA2 DATA3
tDV tDV
SLAVE ADDRESS
123456789
S A6 A5 A4 A3 A2 A1 A0 1 A
COMMAND BYTE
ANA
START CONDITION ACKNOWLEDGE FROM SLAVE ACKNOWLEDGE FROM MASTER
P7–P0
STOP CONDITION
P
NO ACKNOWLEDGE FROM
MASTER
DATA1 DATA2 DATA3 DATA4
tDH tDS
DATA1
tIV
tIR tIR
tIV
SCL
SDA
SCL
SDA
SCL
SDA
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS)
READ FROM INPUT PORTS REGISTERS
INTERRUPT VALID/RESET
R/W
MSB LSBDATA1
MSB LSBDATA1
MSB LSBDATA2 MSB LSBDATA4
MSB LSBDATA4
MSB LSBDATA2
R/W
R/W
INT
llfl/JXIIVI
Ports Configuration
The 8 I/O ports P0 through P7 can be configured to any
combination of inputs and outputs using the ports con-
figuration register (Table 5). The INT/O8 output can also
be configured as an extra general-purpose output
using the configuration register (Table 4).
Input Ports
The input ports register is read only (Table 6). It reflect
the incoming logic levels of the ports, regardless of
whether the port is defined as an input or an output by
the ports configuration register. Reading the input ports
register latches the current-input logic level of the
affected eight ports. A write to the input ports register is
ignored.
Transition Detection
All ports configured as inputs are always monitored for
changes in their logic status. The action of reading the
input ports register or writing to the configuration regis-
ter samples the corresponding 8 port bits’ input condi-
tion (Tables 4, 6). This sample is continuously
compared with the actual input conditions. A detected
change in input condition causes an interrupt condition.
The interrupt is cleared either automatically if the
changed input returns to its original state, or when the
input ports register is read, updating the compared
data (Figure 10). Randomly changing a port from an
output to an input may cause a false interrupt to occur if
the state of the input does not match the content of the
input ports register. The interrupt status is available as
the interrupt flag INT in the configuration register (Table
4).
The input status of all ports is sampled immediately
after power-up as part of the MAX7315’s internal initial-
ization, so if all the ports are pulled to valid logic levels
at that time an interrupt does not occur at power-up.
INT
/O8 Output
The INT/O8 output pin can be configured as either the
INT output that reflects the interrupt flag logic state or as
ageneral-purpose output O8. When used as a general-
purpose output, the INT/O8 pin has the same blink and
PWM intensity control capabilities as the other ports.
Set the interrupt enable I bit in the configuration register
to configure INT/O8 as the INT output (Table 4). Clear
interrupt enable to configure INT/O8 as the O8. O8
logic state is set by the 2 bits O1 and O0 in the configu-
ration register. O8 follows the rules for blinking selected
by the blink enable flag E in the configuration register. If
blinking is disabled, then interrupt output control O0
alone sets the logic state of the INT/O8 pin. If blinking is
enabled, then both interrupt output controls O0 and O1
set the logic state of the INT/O8 pin according to the
blink phase. PWM intensity control for O8 is set by the 4
global intensity bits in the master, O8 intensity register
(Table 13).
Blink Mode
In blink mode, the output ports can be flipped between
using either the blink phase 0 register or the blink phase
1register. Flip control is by software control (the blink flip
flag B in the configuration register) (Table 4). If hardware
flip control is needed, consider the MAX7316, which
includes a BLINK input, as well as software control.
The blink function can be used for LED effects by pro-
gramming different display patterns in the two sets of
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 13
Table 2. Register Address Map
D7 D6 D5 D4 D3 D2 M/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
14 ______________________________________________________________________________________
Table 3. Power-Up Configuration
D7
D6
D5
D4
D3
D2
D1
D0
Blink phase 0 outputs P7–P0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Blink phase 1 outputs P7–P0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
P1, P0 are static logic outputs
1
1
1
1
1
1
1
1
P3, P2 are static logic outputs
1
1
1
1
1
1
1
1
P5, P4 are static logic outputs
1
1
1
1
1
1
1
1
P7, P6 are static logic outputs
1
1
1
1
1
1
1
1
Table 4. Configuration Register
R/W
0
1
INT
O1
X = Don’t care.
IIIl/JXIIVI
output port registers, and using the software or hard-
ware controls to flip between the patterns.
If the blink phase 1 register is written with 0xFF, then
the BLINK input can be used as a hardware disable to,
for example, instantly turn off an LED pattern pro-
grammed into the blink phase 0 register. This technique
can be further extended by driving the BLINK input with
aPWM signal to modulate the LED current to provide
fading effects.
The blink mode is enabled by setting the blink enable
flag E in the configuration register (Table 4). When blink
mode is enabled, the state of the blink flip flag sets the
phase, and the output ports are set by either the blink
phase 0 register or the blink phase 1 register (Table 7).
The blink mode is disabled by clearing the blink enable
flag E in the configuration register (Table 4). When blink
mode is disabled, the blink phase 0 register alone con-
trols the output ports.
Blink Phase Registers
When the blink function is disabled, the blink phase 0
register sets the logic levels of the 8 ports (P0 through
P7) when configured as outputs (Table 8). A duplicate
register called the blink phase 1 register is also used if
the blink function is enabled (Table 9). A logic high sets
the appropriate output port high impedance, while a
logic low makes the port go low.
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 15
Table 4. Configuration register (continued)
R/W
output is controlled by the O0 and O1 bits
INT
O1
INT/O8 outp ut i s low dur ing blink p hase 0
INT/O8 outp ut i s low dur ing blink p hase 1
1
1
X = Don’t care.
M/JXIIVI
MAX7315
Reading a blink phase register reads the value stored
in the register, not the actual port condition. The port
output itself may or may not be at a valid logic level,
depending on the external load connected.
The 9th output, O8, is controlled through 2 bits in the
configuration register, which provide the same static or
blink control as the other 8 output ports.
PWM Intensity Control
The MAX7315 includes an internal oscillator, nominally
32kHz, to generate PWM timing for LED intensity con-
trol or other applications such as PWM trim DACs. PWM
can be disabled entirely for all the outputs. In this case,
all outputs are static and the MAX7315 operating cur-
rent is lowest because the internal PWM oscillator is
turned off.
The MAX7315 can be configured to provide any combi-
nation of PWM outputs and glitch-free logic outputs.
Each PWM output has an individual 4-bit intensity con-
trol (Table 14). When all outputs are to be used with the
same PWM setting, the outputs can be controlled
together instead using the global intensity control
(Table 13). Table 10 shows how to set up the MAX7315
to suit a particular application.
PWM Timing
The PWM control uses a 240-step PWM period, divided
into 15 master intensity timeslots. Each master intensity
timeslot is divided further into 16 PWM cycles (Figure 11).
The master intensity operates as a gate, allowing the indi-
vidual output settings to be enabled from 1 to 15 timeslots
per PWM period (Figures 12, 13, 14) (Table 13).
Each output’s individual 4-bit intensity control only
operates during the number of timeslots gated by the
master intensity. The individual controls provide 16
intensity settings from 1/16 through 16/16 (Table 14).
Figures 15, 16, and 17 show examples of individual
intensity control settings. The highest value an individ-
ual or global setting can be set to is 16/16. This setting
forces the output to ignore the master control, and fol-
low the logic level set by the appropriate blink phase
register bit. The output becomes a glitch-free static out-
put with no PWM.
Using PWM Intensity Controls with Blink Disabled
When blink is disabled (Table 7), the blink phase 0 reg-
ister specifies each output’s logic level during the PWM
on-time (Table 8). The effect of setting an output’s blink
phase 0 register bit to 0 or 1 is shown in Table 11.With
its output bit set to zero, an LED can be controlled with
16 intensity settings from 1/16th duty through fully on,
but cannot be turned fully off using the PWM intensity
control. With its output bit set to 1, an LED can be con-
trolled with 16 intensity settings from fully off through
15/16th duty.
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
16 ______________________________________________________________________________________
Table 5. Ports Configuration Register
R/W
0
1
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
Table 6. Input Ports Register
R/W
1
IP7
IP6
IP5
IP4
IP3
IP2
IP1
IP0
Table 7. Blink Controls
BLINK
ENABLE
FLAG E
BLINK
FLIP
FLAG B
BLINK
FUNCTION
OUTPUT
REGISTERS
USED
0 X Disabled Blink phase 0
register
0Blink phase 0
register
1
1
Enabled
Blink phase 1
register
X = Don’t care.
llfl/JXIIVI
Using PWM Intensity Controls with Blink Enabled
When blink is enabled (Table 7), the blink phase 0 regis-
ter and blink phase 1 register specify each output’s logic
level during the PWM on-time during the respective blink
phases (Tables 8 and 9). The effect of setting an output’s
blink phase X register bit to 0 or 1 is shown in Table 12.
LEDs can be flipped between either directly on and off,
or between a variety of high/low PWM intensities.
Global/O8 Intensity Control
The 4 bits used for output O8’s PWM individual intensity
setting also double as the global intensity control (Table
13). Global intensity simplifies the PWM settings when
the application requires them all to be the same, such
as for backlight applications, by replacing the 9 individ-
ual settings with 1 setting. Global intensity is enabled
with the global intensity flag G in the configuration reg-
ister (Table 4). When global PWM control is used, the 4
bits of master intensity and 4 bits of O8 intensity effec-
tively combine to provide an 8 bit, 240-step intensity
control applying to all outputs.
It is not possible to apply global PWM control to a sub-
set of the ports, and use the others as logic outputs. To
mix static logic outputs and PWM outputs, individual
PWM control must be selected (Table 10).
Applications Information
Hot Insertion
I/O ports PO-P7, interrupt output INT/08, and serial
interface SDA, SCL, AD0-2 remain high impedance with
up to 6V asserted on them when the MAX7315 is pow-
ered down (V+ = 0V). The MAX7315 can therefore be
used in hot-swap applications.
Output Level Translation
The open-drain output architecture allows the ports to
level translate the outputs to higher or lower voltages
than the MAX7315 supply. An external pullup resistor
can be used on any output to convert the high-imped-
ance logic-high condition to a positive voltage level.
The resistor can be connected to any voltage up to
5.5V. For interfacing CMOS inputs, a pullup resistor
value of 220kis a good starting point. Use a lower
resistance to improve noise immunity, in applications
where power consumption is less critical, or where a
faster rise time is needed for a given capacitive load.
Compatibility with PCA9534 and
PCA9554(A)
The MAX7315 is pin compatible and software compatible
with PCA9534, and its variants PCA9554 and PCA9554A.
However, some PCA9534 and PCA9554(A) functions are
not implemented in the MAX7315, and the MAX7315's
PWM and blink functionality is not supported in the
PCA9534 and PCA9554(A). Software compatibility is
clearly not 100%, but the MAX7315 was designed so the
subset (omitted) features default to the same power-up
behavior as the PCA9534 and PCA9554(A), and the
superset features do not use existing registers in a differ-
ent way. In practice, many applications can use the
MAX7315 as a drop-in replacement for the PCA9534 or
PCA9554(A) with no software change.
Driving LED Loads
When driving LEDs, a resistor in series with the LED
must be used to limit the LED current to no more than
50mA. Choose the resistor value according to the fol-
lowing formula:
RLED =(VSUPPLY - VLED - VOL)/ILED
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 17
Table 8. Blink Phase 0 Register
R/W
0
1
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
Table 9. Blink Phase 1 Register
R/W
0
1
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
M/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
18 ______________________________________________________________________________________
Table 10. PWM Application Scenarios
Figure 11. PWM Timing
ONE PWM PERIOD IS 240 CYCLES OF THE 32kHz PWM
OSCILLATOR. A PWM PERIOD CONTAINS 15 MASTER
INTENSITY TIMESLOTS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 15 1 2
EACH MASTER INTENSITY
TIMESLOT CONTAINS 16
PWM CYCLES
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1615 16 1 2
Figure 12. Master Set to 1/15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 1514 15  21
.
Figure 14. Master Set to 15/15
1 2 3 4 5 6 7 8 9 10 11  12  13  14  15 14 15  21
.
.
Figure 13. Master Set to 14/15
1 2 3 4 5 6 7 8 9 10  11  12  13  14  15 14 15  2 1
.
.
llfl/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 19
Figure 16. Individual (or Global) Set to 15/16
MASTER INTENSITY TIMESLOT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
NEXT MASTER INTENSITY TIMESLOT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Figure 15. Individual (or Global) Set to 1/16
MASTER INTENSITY TIMESLOT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
NEXT MASTER INTENSITY TIMESLOT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Figure 17. Individual (or Global) Set to 16/16
MASTER INTENSITY TIMESLOT CONTROL IS IGNORED
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Table 11. PWM Intensity Settings (Blink Disabled)
SETTING
LOW TIME
HIGH TIME
LOW TIME
HIGH TIME
Static low
Static low
impedance
impedance
SETTING M/JXIIVI
MAX7315
where:
RLED is the resistance of the resistor in series with the
LED ().
VSUPPLY is the supply voltage used to drive the LED (V).
VLED is the forward voltage of the LED (V).
VOL is the output low voltage of the MAX7315 when
sinking ILED (V).
ILED is the desired operating current of the LED (A).
For example, to operate a 2.2V red LED at 14mA from a
5V supply, RLED =(5 - 2.2 - 0.25) / 0.014 = 182.
Driving Load Currents Higher than 50mA
The MAX7315 can be used to drive loads drawing more
than 50mA, like relays and high-current white LEDs, by
paralleling outputs. Use at least one output per 50mA of
load current; for example, a 5V 330mW relay draws
66mA and needs two paralleled outputs to drive it.
Ensure that the paralleled outputs chosen are controlled
by the same blink phase register, i.e., select outputs
from the P0 through P7 range. This way, the paralleled
outputs are turned on and off together. Do not use out-
put O8 as part of a load-sharing design. O8 cannot be
switched at the same time as any of the other outputs
because it is controlled by a different register.
The MAX7315 must be protected from the negative
voltage transient generated when switching off induc-
tive loads, such as relays, by connecting a reverse-
biased diode across the inductive load (Figure 18). The
peak current through the diode is the inductive load’s
operating current.
Power-Supply Considerations
The MAX7315 operates with a power-supply voltage of
2V to 3.6V. Bypass the power supply to GND with at
least 0.047µF as close to the device as possible. For
the QFN version, connect the underside exposed pad
to GND.
Chip Information
TRANSISTOR COUNT: 17,611
PROCESS: BiCMOS
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
20 ______________________________________________________________________________________
Table 12. PWM Intensity Settings (Blink Enabled)
SETTING
Phase 0: LE Don at l ow intensi ty
Phase 1: LE Don at hi gh intensi ty
Phase 0: LE Don at hi gh intensi ty
Phase 1: LE Don at l ow intensi ty
Phase 0: LE Don at hi gh intensi ty
Phase 1: LE Don at l ow intensi ty
Phase 0: LE Don at l ow intensi ty
Phase 1: LE Don at hi gh intensi ty
Static low
Static low
impedance
impedance
Phase 0: LED on continuously
Phase 1: LED off continuously
Phase 0: LED off continuously
Phase 1: LED on continuously
llfl/JXIIVI ,
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________________________ 21
Table 13. Master, O8 Intensity Register
MSB
LSB
MSB
LSB
R/W
0
1
M3
M1
M0
G3
G2
G1
G0
Master intensity duty cycle is 15/15 (full)
MAX IIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
22 ______________________________________________________________________________________
Table 14. Output Intensity Registers
MSB
LSB
MSB
LSB
R/W
0
1
P1I3
P1I2
P1I1
P1I0
P0I3
P0I2
P0I1
P0I0
MSB
LSB
MSB
LSB
0
1
P3I3
P3I2
P3I1
P3I0
P2I3
P2I2
P2I1
P2I0
MSB
LSB
MSB
LSB
0
1
P5I3
P5I2
P5I1
P5I0
P4I3
P4I2
P4I1
P4I0
MSB
LSB
MSB
LSB
0
1
P7I3
P7I2
P7I1
P7I0
P6I3
P6I2
P6I1
P6I0
ADDRESS IMPLEMENYATION l [MAXIM [MAXIM I’M—H—H—H—H—H—H—V LHJLILHJLLILI \ llfl/JXIIVI
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 23
Table 15. MAX7311, PCA9535, and PCA9555 Register Compatibility
ADDRESS
IMPLEMENTATION
0x10–0x13
Figure 18. Diode-Protected Switching Inductive Load
MAX7315
P0
P1
P2
P3
P4
P5
P6
P7
V+
2V TO 3.6V
µC
SDA
SCL
SDA
I/O
AD0
SCL
GND
AD2
AD1
0.047µF
INT/O8
BAS16
5V
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AD0
V+
SDA
SCL
P7
P6
P5
P4
TOP VIEW
MAX7315AEE
MAX7315AUE
QSOP/TSSOP
AD1
AD2
P2
P0
P1
P3
GND
INT/O8
Pin Configurations (continued)
MAX7315
P5
P0
P1
P2
P3
V+
3.3V
µC
SDA
SCL
SDA
I/O
AD0
5V 3.3V
P6
P7
SCL
P4
OUTPUT2
OUTPUT1
GND
5V
INPUT 1
INPUT 2
AD2
AD1
0.047µF
INT/O8
Typical Application Circuit
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MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
24 ______________________________________________________________________________________
QSOP.EPS
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
M/JXIIVI ‘ ‘ rum A N x A» A (la/“5x J2» Em“! MIC germ Maw M m/ \u‘ mu ©% lVl/JXl/Vl m rm" w" v A I>B>DD 9&5! lvmxuvl \ H/
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
______________________________________________________________________________________ 25
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
12x16L QFN THIN.EPS
0.10 C0.08 C
0.10 M C A B
D
D/2
E/2
E
A1
A2
A
E2
E2/2
L
k
e
(ND - 1) X e
(NE - 1) X e
D2
D2/2
b
L
e
L
C
L
e
C
L
L
C
L
C
PACKAGE OUTLINE
21-0136
2
1
I
8, 12, 16L THIN QFN, 3x3x0.8mm
MARKING
AAAA
EXPOSED PAD VARIATIONS
CODES
PKG.
T1233-1
MIN.
0.95
NOM.
1.10
D2
NOM.
1.10
MAX.
1.25
MIN.
0.95
MAX.
1.25
E2
12N
k
A2
0.25
NE
A1
ND
0
0.20 REF
--
3
0.02
3
0.05
L
e
E
0.45
2.90
b
D
A
0.20
2.90
0.70
0.50 BSC.
0.55
3.00
0.65
3.10
0.25
3.00
0.75
0.30
3.10
0.80
16
0.20 REF
0.25 -
0
4
0.02
4
-
0.05
0.50 BSC.
0.30
2.90
0.40
3.00
0.20
2.90
0.70
0.25
3.00
0.75
3.10
0.50
0.80
3.10
0.30
PKG
REF. MIN.
12L 3x3
NOM. MAX. NOM.
16L 3x3
MIN. MAX.
0.35 x 45°
PIN ID JEDEC
WEED-1
T1233-3 1.10 1.25 0.95 1.10 0.35 x 45°1.25 WEED-10.95
T1633F-3 0.65
T1633-4 0.95
0.80 0.95 0.65 0.80
1.10 1.25 0.95 1.10
0.225 x 45°
0.95 WEED-2
0.35 x 45°
1.25 WEED-2
T1633-2 0.95 1.10 1.25 0.95 1.10 0.35 x 45°
1.25 WEED-2
PACKAGE OUTLINE
21-0136
2
2
I
8, 12, 16L THIN QFN, 3x3x0.8mm
WEED-11.25
1.100.95 0.35 x 45°
1.251.10
0.95
T1233-4
T1633FH-3 0.65 0.80 0.95 0.225 x 45°
0.65 0.80 0.95 WEED-2
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994 .
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO
JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED
WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS .
9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
12. WARPAGE NOT TO EXCEED 0.10mm.
0.25 0.30 0.35
2
0.25
0
0.20 REF
--
0.02 0.05
0.35
8
2
0.55 0.75
2.90
2.90 3.00 3.10
0.65 BSC.
3.00 3.10
8L 3x3
MIN.
0.70 0.75 0.80
NOM. MAX.
TQ833-1 1.250.25 0.70 0.35 x 45°WEEC1.250.700.25
T1633-5 0.95 1.10 1.25 0.35 x 45°WEED-2
0.95 1.10 1.25
www maxim [c urn/packages m mm 1 mmmus u m: a an NIH mm: mm 2 MM mm on Dnnvnusmus Mm vn mm mm pg: am: 3 :nmmm mxmmm mums»: A mm: mm mun: was :5: 4m: vanuNs um 5 w mm H: mm 5 mm ALE” Envumim mu m mx 7 mm nr mu; San m rm mm: mm a mm a: Em? mm: uraENnrmN mumz um Amy mu run m m rum/ma m m smsr N HHHHHHH HHHHHHH 1 mmm mmm: 1 mum m 1 m w Km m AAAA ‘ A 7 nu m N .. m ms mg m M m m 033 £37 Q} ‘ u or; m m7 mi .. m m am m E no: m am am ‘ UUUUUUUl -~= ~19: E, m m. on m n m mmm m vAmnlms InEym w W E m 1 45¢ 159 1177 e usuis: mm H 525 1 as m \ 253 r51 I' EEEEWE;\ g L use 1 m ‘m i " L E N SEE vAnm’xM SEE VARJAUENS . 1 : u- 1 s- n‘ J a' \ij j M mm E H E mums JEBEC PKG MILLDEVERS IRENE: h ”“453 N “1““ MIN MAX MIN max fiflh, m4 u 17 $1"; an SH: 19: am mm , “ELM E WMWE\1t:T .5 u ,7 $242, an 5m m m fi— . 7,; .E an n W, m as; m m L _L 1 if i mmmw .n n uao 7m 73: m :m W W AK 11 ”a,“ saw in (17!? 296 new, new ®w lVllJXI/Vl / [W m.
MAX7315
8-Port I/O Expander with LED Intensity
Control, Interrupt, and Hot-Insertion Protection
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
TSSOP4.40mm.EPS
PACKAGE OUTLINE, TSSOP 4.40mm BODY
21-0066
1
1
I
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)

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