DC2593A Demo Manual Datasheet by Analog Devices Inc.

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NOW PART OF ANALOG DEVICES DEMO MANUAL DC2593A LIL TIEIDHNOLOGY
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DEMO MANUAL DC2593A
Description
Demonstration circuit DC2593A features the
LT
®
3045EDD-1, a 500mA, ultralow noise, and ultrahigh
power supply rejection ratio (PSRR) low dropout (LDO)
regulator with programmable current limit. Additionally,
the LT3045-1 incorporates a VIOC tracking function to
control an upstream switching converter to maintain a
constant voltage across the LT3045-1 and hence mini-
mize power dissipation.
DC2593A operates over an input range of 3.8V to 20V.
The LT3045-1 delivers a maximum output current of
500mA. It features ultralow noise and ultrahigh PSRR.
The power good feedback (PGFB) pin is used to set a
programmable power good threshold. This IC also offers
programmable current limit functionality. Current moni-
toring is also achieved by sensing the ILIM pin voltage. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog
Devices, Inc. All other trademarks are the property of their respective owners.
Built-in protection includes reverse battery protection,
reverse current protection, internal current limit with fold-
back, and thermal limit with hysteresis.
The LT3045-1 data sheet gives a complete description of
the device, operation and applications information. The
data sheet must be read in conjunction with this demo
manual for demonstration circuit DC2593A. The LT3045-
1EDD is assembled in a 12-lead (3mm × 3mm) plastic
DFN package with an exposed pad on the bottom side
of the IC. Proper board layout is essential for maximum
thermal performance.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2593A
LT3045EDD-1
20V, 500mA, Ultralow Noise
Ultrahigh PSRR RF LDO Regulator with VIOC
performance summary
Specifications are at TA = 25°C
PARAMETER CONDITIONS MIN TYP MAX
Input Voltage Range (VIN) IOUT = 150mA, VOUT = 3.3V 3.8V 20V
Input Voltage Range (VIN) IOUT = 500mA, VOUT = 3.3V 3.8V 9.3V*
Output Voltage (VOUT) VIN = 5V, IOUT = 500mA 3.2V 3.3V 3.4V
Shutdown Input Current (IIN) JP1 = OFF, VIN = 5V 0.1μA
*The maximum input voltage for 500mA load current is set by the 65°C temperature rise of LT3045-1 on the demo circuit. Higher input voltage can be
reached if larger copper area or force-air cooling is applied. The output current is also limited by the differential of input and output voltage, please refer
the data sheet for details.
LT3045—1 zuv, 500m, uumow NOISE, ULTRAHIGH PERI? LDC REGULATOR W‘TH V‘DC . 47— nmsu a 42 mm mm (mm! MmsE MOMYOR MDMYOF mm 6ND _ — POWER SUPPLY — VOUT ’ JJVéflOmM W SEE DEW Lav-10v an a W ”mum usm sum : o ow x was EN/W PG .4 I 5 O m and 12 are me ENC common to maxwa‘ cah‘elornmse measurement, was» Marla AN70 Appenmx a lumen“: ow. 9 + Vow LOAD + + @- U Iou1
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DEMO MANUAL DC2593A
Quick start proceDure
Figure 1. Test Procedure Setup Drawing for DC2593A
DC2593A is easy to set up to evaluate the performance of
the LT3045EDD-1. Refer to Figure 1 for proper measure-
ment equipment setup and follow the procedure below.
1. Connect load between VOUT and GND terminals.
2. With power off, connect the input power supply to the
VIN and GND terminals.
3. Make sure the shunt of JP1 is at ON option.
4. Turn the input power supply on and make sure the
voltage is between 3.8V and 20V.
5. Refer to Application Notes AN70 and AN159 for mea-
suring output noise and PSRR.
6. With JP1 at USER SELECT option, R4 and R2 can be
used to set an accurate undervoltage lockout (UVLO)
threshold.
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DEMO MANUAL DC2593A
Figure 2. Layer 3 of DC2593A
Best PSRR Performance: PCB Layout for Input Trace
For applications utilizing the LT3045-1 for post-regulating
switching converters, placing a capacitor directly at the
LT3045-1 input results in AC current (at the switching fre-
quency) to flow near the LT3045-1. Without careful atten-
tion to PCB layout, this relatively high frequency switch-
ing current generates an electromagnetic field (EMF)
that couples to the LT3045-1 output, thereby degrading
its effective PSRR. While highly dependent on the PCB,
the switching pre-regulator, and the input capacitor size,
among other factors, the PSRR degradation can easily
be 30dB at 1MHz. This degradation is present even if the
LT3045-1 is de-soldered from the board, because it effec-
tively degrades the PSRR of the PC board itself. While
negligible for conventional low PSRR LDOs, LT3045-1’s
ultrahigh PSRR requires careful attention to higher order
parasitics in order to realize the full performance offered
by the regulator.
pcB Layout
The LT3045-1 demo board alleviates this degradation in
PSRR by using a specialized layout technique. On layer3,
the input trace (VIN) is highlighted in red, with the return
path (GND) highlighted on the bottom layer together with
input capacitor C1. When an AC voltage is applied to the
input of the board, AC current flows on this path, thus
generating EMF. This EMF couples to output capacitor C2
and related traces, making the PSRR appear worse than it
actually is. With the input trace directly above the return
path, the EMFs are in opposite directions, and conse-
quently cancel each other out. Making sure these traces
exactly overlap each other maximizes the cancellation
effect and thus provides the maximum PSRR offered
by the regulator.
Figure 3. Bottom Layer of DC2593A
VIN
GND
C1
LT30454
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DEMO MANUAL DC2593A
Best AC Performance: PCB Layout for Output
Capacitor C2
For ultrahigh PSRR performance, the LT3045-1 band-
width is made quite high (~1MHz), making it very close
to the output capacitors self-resonance frequency
(~1.6MHz). Therefore, it is very important to avoid add-
ing extra impedance (ESL and ESR) outside the feedback
loop. To that end, minimize the effects of PCB trace and
solder inductance by Kelvin connecting OUTS and SET
pin capacitor (C
SET
) GND directly to output capacitor (C2)
terminals using split capacitor techniques. Pad 4 connects
to the OUTS pin and Pad 1 connects to the GND side of
the SET pin capacitor. With only small AC current flowing
through these connections, the impact of solder joint/
PCB trace inductance on stability is eliminated. While the
LT3045-1 is robust enough not to oscillate if the recom-
mended layout is not followed, phase/gain margin and
PSRR will degrade.
Figure 4. C2 and CSET Connections for Best Performance
C
2
R
SET
C
SET
C1
OUT
SET
LT3045-1
100μA
OUTS
PG
ILIM
GND
PGFB
VIOC
EN/UV
V
OUT
V
IN
4
3
1
2
pcB Layout
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DEMO MANUAL DC2593A
Figure 5. Split Pads for C2 on Top Layer of DC2593A
pcB Layout
C2
CSET
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DEMO MANUAL DC2593A
parts List
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
Required Circuit Components
1 1 CIN CAP, ALUM, 22µF, 35V, 5MM × 5.4MM SUN ELECTRONIC INDUSTRIES CORP, 35CE22BSS
2 2 C1, C4 CAP, X7R, 4.7µF, 25V, 10% 1206 MURATA, GRM31CR71E475KA88L
3 1 C2 CAP, X5R, 10µF, 25V, 10% 1206 MURATA, GJ831CR61E106KE83L
4 1 R1 RES, CHIP, 200k, 1/10W, 5% 0603 VISHAY, CRCW0603200KJNED
5 1 R3 RES, CHIP, 33.2k, 1/10W, 1% 0603 VISHAY, CRCW060333K2FKEA
6 1 R5 RES, CHIP, 453k, 1/10W, 1% 0603 VISHAY, CRCW0603453KFKEA
7 1 R6 RES, CHIP, 49.9k, 1/10W, 1% 603 VISHAY, CRCW060349K9FKEA
8 1 R7 RES, CHIP, 249, 1/10W, 1% 0603 VISHAY, CRCW0603249RFKEA
9 1 U1 IC, LT3045VIEDD-1 12PIN DFN 3MM × 3MM LINEAR TECHNOLOGY, LT3045VIEDD-1#PBF
Additional Demo Board Circuit Components
1 0 R2, R4 (OPT) RES, 0603
2 0 C3, C5 (OPT) CAP, 1206
3 1 R8 RES, CHIP, 0, 1/10W, 5% 0603 VISHAY, CRCW06030000Z0EA
Hardware: For Demo Board Only
1 7 E1 TO E7 TESTPOINT, TURRET, 0.094" PBF MILL-MAX, 2501-2-00-80-00-00-07-0
2 1 JP1 HEADER 3 PIN 0.079 DOUBLE ROW WURTH ELEKTRONIK, 62000621121
3 1 XJP1 SHUNT, 0.079" CENTER WURTH ELEKTRONIK, 60800213421
4 2 J1, J2 CONN, BNC, 5 PINS CONNEX, 112404
5 4 MH1 TO MH4 STAND-OFF, NYLON 6.4mm WURTH ELEKTRONIK, 702931000
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DEMO MANUAL DC2593A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
schematic Diagram
1. ALL RESISTORS ARE 0603.
NOTE: UNLESS OTHERWISE SPECIFIED
*
SEE DEMO MANUAL
*
R7
249
J2
MONITOR
OUTPUT NOISE
C3
OPT
1206
U1
LT3045EDD-1
IN
1
IN
2
EN
4
PG
5
ILIM
6
OUT 11
OUTS 10
GND
9
SET 8
PGFB 7
GND
13
VIOC
3
OUT 12
JP1
USER SELECT
OFF
ON
EN/UV
1 2
3
56
4
R5
453K
E6
GND
R4
OPT
C1
4.7uF
1206
25V
+
CIN
22µF
35V
35CE22BSS
R1
200K
C5
OPT
1206
C2
10uF
25V
1206
E2
GND
E7
VIOC
J1
MONITOR
INPUT RIPPLE
R2
OPT
E1
VIN
3.8V-20V R8
0
R6
49.9K
R3
33.2K
E3
EN/UV
E5 3.3V, 500mA
VOUT
E4
PG
C4
4.7uF
1206
25V
L7L|F1EN2 \ SNGL‘éS
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DEMO MANUAL DC2593A
LINEAR TECHNOLOGY CORPORATION 2017
LT 0517 • PRINTED IN USA
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application
engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation

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Available Quantity: 7
Unit Price: 145.44