LC898217XH Datasheet by onsemi

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0N Selllimuuluctor“p
© Semiconductor Components Industries, LLC, 2017 1 Publication Order Number :
April 2017 - Rev. 0 LC898217XH/D
ORDERING INFORMATION
See detailed ordering and shipping information on page 9 of this data sheet.
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LC898217XH
Auto Focus (AF) Controller & Driver
1. Overview
LC898217XH is the AF control LSI. It consists of 1 system of feedback
circuit for AF control. Built-in equalizer circuit using digital operation.
Built-in A/D converter, D/A converter, Constant Current Driver.
LC898217XH contains an internal EEPROM. It easily accomplishes
Hall calibration and power-on sequence. Also LC898217XH has fast
settling function for quickly moving focus lens. This is suitable for
small & thinner camera module.
2. Features
Built-in equalizer circuit using digital operation
- AF control equalize circuit
- Any coefficient can be specified by 2-wire serial I/F (TWIF)
2-wire serial interface
(The communication protocol is compatible with I2C.)
Built-in A/D converter
- Input 1 channel
Built-in D/A converter
- Output 2 channel (Hall offset, Constant current bias)
Built-in VGA
- Hall Amp
- 1 channel
Built-in EEPROM
- 128 byte (16 byte/page)
Built-in OSC
Built-in Constant Current Driver
- 110 mA
- 1 channel
Package
- WL-CSP 10-pin
- Pb-Free, Halogen Free
Supply voltage
- VDD (2.6 V to 3.3 V)
WLCSP10, 1.04x2.04x0.265
' Process when gins are not used ' In case of connecting PORT gm wxlh HOST CPU
LC898217XH
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3. Pin Description
TYPE
I
INPUT
P
Power supply, GND
NC
NOT CONNECT
O
OUTPUT
B
BIDIRECTION
2-wire serial interface
SCL
I
2-wire serial interface clock pin
SDA
B
2-wire serial interface data pin
Hall interface
BIASO
O
D/A output (to Hall element)
OPINP
I
VGA input (from Hall element)
OPINM
I
VGA input (from Hall element)
Driver interface
OUT1
O
Driver output (to Actuator)
OUT2
O
Driver output (to Actuator)
Power supply pin
VDD
P
Power supply
VSS
P
GND
Test pin
PORT
B
Analog test signal input/output
Convergence detection monitor output
VSYNC input
* Process when pins are not used
PIN TYPE “O” Ensure that it is set to OPEN.
PIN TYPE “I” OPEN is inhibited. Ensure that it is connected to the VDD or VSS even when it is unused.
(Please contact ON Semiconductor for more information about selection of VDD or VSS.)
PIN TYPE “B” If you are unsure about processing method on the pin description of pin layout table, please contact us.
Note that incorrect processing of unused pins may result in defects.
* In case of connecting PORT pin with HOST CPU
When LC898217XH is power off and HOST CPU is power on, a HOST CPU pin connected with PORT pin have to be
fixed "L" level.
LC898217XH
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4. Pin Layout
Circuit Name Number of PINs Circuit Name Number of PINs
Analog 4 Driver 2
Logic 2 Power 2
“PORT” pin has analog function and digital function.
BOTTOM VIEW
A B
1OUT2 OUT1
2VSS VDD
3PORT SCL
4BIASO SDA
5OPINM OPINP
LC898217XH
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5. Block Diagram
2-Wire Serial
I/F
SDA
SCL
OUT1
OUT2
AD EQ Control
logic
VDD
-
+
VSS
OSC POR LDO
PORT
EEPROM
Hall
Driver
OPINP
OPINM
Hall
BIASO
Constant
Current
Driver
-
+
Logic OUT
Logic IN
Adjustment
& Measurement
Circuit
OUT1
OUT2
DA
ch1
ch2
-
+
DA
2.2uF
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6. Package Dimensions
unit : mm
WLCSP10, 1.04x2.04x0.265
CASE 567TH
ISSUE O
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE SPHERICAL
CROWNS OF THE SOLDER BALLS.
DIM
AMIN NOM
0.240
MILLIMETERS
D
E
b0.12 0.17
e0.40 BSC
0.265
E
D
A B
PIN A1
REFERENCE
e
0.03 C
10X
b
B
A
0.10 C
A1 C
0.17
10X
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.40
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 3
A1 0.040 REF
RECOMMENDED
A
PACKAGE
OUTLINE
123
PITCH
0.40
PITCH
A
e
e/2
45
A3 0.025 REF
A3
A
M
0.05 BC
0.99 1.04
1.99 2.04
MAX
0.22
0.290
1.09
2.09
15
B
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7. Electrical Characteristics
1) Absolute Maximum Rating at VSS = 0 V
Item
Symbol
Condition
Rating
Unit
Supply voltage
VDD33 max
Ta 25°C
0.3 to 4.6
V
Input/output voltage V
I
33, V
O
33 Ta 25°C 0.3 to V
DD
33+0.3
V
Storage ambient
temperature
Tstg 55 to 125
°C
Operating ambient
temperature
Topr 30 to 70
°C
2) Allowable Operating Ratings at Ta = 30 to 70°C, VSS = 0 V
3 V power supply (VDD)
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
VDD33
2.6
2.8
3.3
V
Input voltage range
VIN
0
VDD33
V
3) DC Characteristics : Input/Output level at VSS = 0 V, VDD = 2.6 to 3.6 V, Ta = 30 to 70°C
4) Driver output (OUT1, OUT2) at VSS = 0 V, VDD = 2.8 V, Ta = 25°C
Item Symbol Condition Min Typ Max Unit Applicable pins
Maximum current Ifull
105 115 mA
OUT1, OUT2
Output leak current
Ioleak
1
µA
5) Non-volatile Memory Characteristics
Item
Symbol
Condition
Min
Typ
Max
Unit
Applicable circuit
Endurance
EN
1000
Cycles
EEPROM
Data retention RT
10 Years
Write time tWT
20 ms
Item
Symbol
Condition
Min
Typ
Max
Unit
Applicable pins
High-level input voltage
VIH
CMOS
compliant
Schmidt
1.4
V
SCL, SDA,
PORT
Low-level input voltage VIL 0.4 V
High-level output voltage
VOH
IOL =
2 mA
VDD0.4
V
PORT
Low-level output voltage
VOL
IOL = 2 mA
0.4
V
SDA, PORT
Pulldown resistor
Rdn
50
220
kΩ
PORT
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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8. AC Characteristics
8.1 VDD supply timing
VDD
SCL/SDA
t2
t1
t3
Vbot
VSS
Figure 8.1 VDD supply timing
It is available to use 2-wire serial interface 5 ms later for Power On Reset of VDD.
Item Symbol Min Typ Max Unit
VDD turn on time
t1 3 ms
2-wire serial interface start time
from V
DD
on t2 5 ms
VDD off time
t3 100 ms
Bottom Voltage Vbot 0.1 V
WW
LC898217XH
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8.2 AC specification
Figure 8.2 shows interface timing definition and Table 8.1 shows electric characteristics.
tBUF
tSU,STO
tHD,STA
tSU,STA
tSU,DATtHD,DAT
tLOW
tr tf
tHD,STA
SDA
SCL
VIHmin
VILmax
tf
tr
Start
Condition Repeated
Condition Stop
Condition Start
Condition
VIHmin
VILmax
Figure 8.2 2-wire serial interface timing definition
Table 8.1 Electric characteritics for 2-wire serial interface (AC characteristics)
Item Symbol Pin name Fast-mode Fast-mode Plus Unit
Min Typ Max Min Typ Max
SCL clock frequency FSCL SCL 400 1000 kHz
START condition
hold time
tHD, STA
SCL
SDA
0.6 0.26 µs
SCL clock
Low period
tLOW SCL 1.3 0.5 µs
SCL clock
High period
tHIGH SCL 0.6 0.26 µs
Setup time for repetition
START condition
tSU, STA
SCL
SDA
0.6 0.26 µs
Data hold time tHD, DAT
SCL
SDA
0 * 0.9 0 * µs
Data setup time tSU, DAT
SCL
SDA
100 50 ns
SDA, SCL
rising time
tr
SCL
SDA
300 120 ns
SDA, SCL
falling time
tf
SCL
SDA
300 120 ns
STOP condition setup time tSU, STO
SCL
SDA
0.6 0.26 µs
Bus free time between
STOP and START
tBUF
SCL
SDA
1.3 0.5 µs
* : LC898217XH is designed for a condition with typ. 20 ns of hold time. If SDA signal is unstable around falling point of SCL
signal, please implement an appropriate treatment on board, such as inserting a resistor.
LC898217XH
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ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
LC898217XH-MH WLCSP10, 1.04x2.04x0.265
(Pb-Free / Halogen Free)
4000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF

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