TMC2130-LA Datasheet by Analog Devices Inc./Maxim Integrated

TMC2130-LA DATASHEET chtep’" . “ A? A; L; DJ max-sum cnalStep‘" ¢
POWER DRIVER FOR STEPPER MOTORS INTEGRATED CIRCUITS
TRINAMIC Motion Control GmbH & Co. KG
Hamburg, Germany
TMC2130-LA DATASHEET
FEATURES AND BENEFITS
2-phase stepper motors up to 2.0A coil current (2.5A peak)
Step/Dir Interface with microstep interpolation microPlyer™
SPI Interface
Voltage Range 4.75… 46V DC
Highest Resolution 256 microsteps per full step
stealthChop™ for extremely quiet operation and smooth
motion
spreadCycle™ highly dynamic motor control chopper
dcStep™ load dependent speed control
stallGuard2™ high precision sensorless motor load detection
coolStep™ current control for energy savings up to 75%
Integrated Current Sense Option
Passive Braking and freewheeling mode
Full Protection & Diagnostics
Small Size 5x6mm2 QFN36 package or TQFP48 package
APPLICATIONS
Textile, Sewing Machines
Factory & Lab Automation
3D printers
Liquid Handling
Medical
Office Automation
CCTV, Security
ATM, Cash recycler
POS
Pumps and Valves
DESCRIPTION
The TMC2130 is a high performance driver
IC for two phase stepper motors. Standard
SPI and STEP/DIR simplify communication.
TRINAMICs sophisticated stealthChop
chopper ensures noiseless operation
combined with maximum efficiency and
best motor torque. coolStep allows
reducing energy consumption by up to
75%. dcStep drives high loads as fast as
possible without step loss. Integrated
power MOSFETs handle motor currents up
to 1.2A RMS (QFN package) / 1.4A RMS
(TQFP) or 2.5A short time peak current per
coil. Protection and diagnostic features
support robust and reliable operation.
Industries’ most advanced stepper motor
driver enables miniaturized designs with
low external component count for cost-
effective and highly competitive solutions.
Universal high voltage driver for two-phase bipolar stepper motor. stealthChop™ for quiet
movement. Integrated MOSFETs for up to 2.0A motor current per coil. With Step/Dir Interface and SPI.
BLOCK DIAGRAM
spreadCycle
stealthChop
DRIVER
TMC2130
Programmable
256 µStep
Sequencer
Protection
& Diagnostics
SPI
stallGuard2 coolStep dcStep
Power
Supply
Motor
Step/Dir
Step Multiplyer
spreadCycle
stealthChop
DAC Reference
IREF optional current scaling
SPI Control,
Config & Diags
CLK
Control
Register
Set
Standstill Current
Reduction
CLK Oscillator /
Selector
Interrupt
INT
Charge
Pump
+5V Regulator
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 2
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APPLICATION EXAMPLES: HIGH VOLTAGE – MULTIPURPOSE USE
The TMC2130 scores with power density, integrated power MOSFETs, and a versatility that covers a
wide spectrum of applications from battery systems up to embedded applications with 2.0A motor
current per coil. Based on stallGuard2, coolStep, dcStep, spreadCycle, and stealthChop, the TMC2130
optimizes drive performance and keeps costs down. It considers velocity vs. motor load, realizes
energy savings, smoothness of the drive and noiselessness. Extensive support at the chip, board, and
software levels enables rapid design cycles and fast time-to-market with competitive products.
ORDER CODES
Order code
Description
Size [mm2]
TMC2130-LA
1-axis dcStep, coolStep, and stealthChop driver; QFN36
5 x 6
TMC2130-TA
1-axis dcStep, coolStep, and stealthChop driver; TQFP48
9 x 9
TMC2130-EVAL
Evaluation board for TMC2130 two phase stepper motor
controller/driver
85 x 55
TMC4361-EVAL
Motion controller board (part of evaluation board system)
85 x 55
STARTRAMPE
Baseboard for TMC2130-EVAL and further evaluation boards
85 x 55
ESELSBRÜCKE
Connector board for plug-in evaluation board system
61 x 38
In this application, the CPU initializes the
TMC2130 motor driver via SPI interface and
controls motor movement by sending step
and direction signals. A real time software
realizes motion control.
Here, an application with up to three stepper
motors is shown. A single CPU combined
with a TMC429 motion controller manages
the whole stepper motor driver system. This
design is highly economical and space
saving if more than one stepper motor is
needed.
The CPU initializes the TMC4361 motion
controller and the TMC2130. Thereafter, it
sends target positions to the TMC4361. Now,
the TMC4361 takes control over the TMC2130.
Combining the TMC4361 and the TMC2130
offers diverse possibilities for demanding
applications including servo drive features.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 3
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Table of Contents
1 PRINCIPLES OF OPERATION ......................... 5
1.1 KEY CONCEPTS ................................................ 7
1.2 SPI CONTROL INTERFACE ............................... 7
1.3 SOFTWARE ...................................................... 7
1.4 MOVING THE MOTOR ...................................... 7
1.5 STEALTHCHOP DRIVER ..................................... 8
1.6 STALLGUARD2 – MECHANICAL LOAD SENSING8
1.7 COOLSTEP – LOAD ADAPTIVE CURRENT
CONTROL ...................................................................... 8
1.8 DCSTEP – LOAD DEPENDENT SPEED CONTROL 9
2 PIN ASSIGNMENTS ......................................... 10
2.1 PACKAGE OUTLINE ........................................ 10
2.2 SIGNAL DESCRIPTIONS ................................. 11
3 SAMPLE CIRCUITS .......................................... 13
3.1 STANDARD APPLICATION CIRCUIT ................ 13
3.2 REDUCED NUMBER OF COMPONENTS ............. 14
3.3 INTERNAL RDSON SENSING .......................... 14
3.4 EXTERNAL 5V POWER SUPPLY ...................... 15
3.5 PRE-REGULATOR FOR REDUCED POWER
DISSIPATION .............................................................. 16
3.6 5V ONLY SUPPLY .......................................... 17
3.7 HIGH MOTOR CURRENT ................................. 18
3.8 DRIVER PROTECTION AND EME CIRCUITRY ... 20
4 SPI INTERFACE ................................................ 21
4.1 SPI DATAGRAM STRUCTURE ......................... 21
4.2 SPI SIGNALS ................................................ 22
4.3 TIMING ......................................................... 23
5 REGISTER MAPPING ....................................... 24
5.1 GENERAL CONFIGURATION REGISTERS .......... 25
5.2 VELOCITY DEPENDENT DRIVER FEATURE
CONTROL REGISTER SET ............................................. 27
5.3 SPI MODE REGISTER .................................... 29
5.4 DCSTEP MINIMUM VELOCITY REGISTER ......... 29
5.5 MOTOR DRIVER REGISTERS ........................... 30
6 STEALTHCHOP™ .............................................. 39
6.1 TWO MODES FOR CURRENT REGULATION ...... 39
6.2 AUTOMATIC SCALING .................................... 40
6.3 VELOCITY BASED SCALING ............................ 42
6.4 COMBINING STEALTHCHOP AND SPREADCYCLE
44
6.5 FLAGS IN STEALTHCHOP ................................ 45
6.6 FREEWHEELING AND PASSIVE MOTOR BRAKING
46
7 SPREADCYCLE AND CLASSIC CHOPPER ... 47
7.1 SPREADCYCLE CHOPPER ................................ 48
7.2 CLASSIC CONSTANT OFF TIME CHOPPER ....... 51
7.3 RANDOM OFF TIME ....................................... 52
7.4 CHOPSYNC2 FOR QUIET 2-PHASE MOTOR ..... 53
8 ANALOG CURRENT CONTROL AIN ............. 54
9 SELECTING SENSE RESISTORS .................... 55
10 INTERNAL SENSE RESISTORS ................. 57
11 VELOCITY BASED MODE CONTROL ....... 59
12 DRIVER DIAGNOSTIC FLAGS .................. 61
12.1 TEMPERATURE MEASUREMENT ....................... 61
12.2 SHORT TO GND PROTECTION ....................... 61
12.3 OPEN LOAD DIAGNOSTICS ........................... 61
14 STALLGUARD2 LOAD MEASUREMENT ... 62
14.1 TUNING STALLGUARD2 THRESHOLD SGT ..... 63
14.2 STALLGUARD2 UPDATE RATE AND FILTER .... 65
14.3 DETECTING A MOTOR STALL ......................... 65
14.4 LIMITS OF STALLGUARD2 OPERATION .......... 65
15 COOLSTEP OPERATION ............................. 66
15.1 USER BENEFITS ............................................. 66
15.2 SETTING UP FOR COOLSTEP .......................... 66
15.3 TUNING COOLSTEP ........................................ 68
16 STEP/DIR INTERFACE ................................ 69
16.1 TIMING ......................................................... 69
16.2 CHANGING RESOLUTION ............................... 70
16.3 MICROPLYER STEP INTERPOLATOR AND STAND
STILL DETECTION ....................................................... 71
17 DIAG OUTPUTS ........................................... 72
18 DCSTEP .......................................................... 73
18.1 USER BENEFITS ............................................. 73
18.2 DESIGNING-IN DCSTEP ................................. 73
18.3 DCSTEP WITH STEP/DIR INTERFACE ........... 74
18.4 STALL DETECTION IN DCSTEP MODE ............ 77
19 SINE-WAVE LOOK-UP TABLE................... 78
19.1 USER BENEFITS ............................................. 78
19.2 MICROSTEP TABLE ........................................ 78
20 EMERGENCY STOP ...................................... 79
21 DC MOTOR OR SOLENOID ....................... 80
21.1 SOLENOID OPERATION.................................. 80
22 QUICK CONFIGURATION GUIDE ............ 81
23 GETTING STARTED ..................................... 84
23.1 INITIALIZATION EXAMPLE ............................. 84
24 STANDALONE OPERATION ...................... 85
25 EXTERNAL RESET ........................................ 88
26 CLOCK OSCILLATOR AND INPUT ........... 88
26.1 CONSIDERATIONS ON THE FREQUENCY .......... 88
27 ABSOLUTE MAXIMUM RATINGS ............ 89
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 4
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28 ELECTRICAL CHARACTERISTICS ............. 89
28.1 OPERATIONAL RANGE ................................... 89
28.2 DC AND TIMING CHARACTERISTICS .............. 90
28.3 THERMAL CHARACTERISTICS .......................... 93
29 LAYOUT CONSIDERATIONS ..................... 94
29.1 EXPOSED DIE PAD ........................................ 94
29.2 WIRING GND ............................................... 94
29.3 SUPPLY FILTERING ........................................ 94
29.4 LAYOUT EXAMPLE (QFN36) .......................... 95
30 PACKAGE MECHANICAL DATA ................ 97
30.1 DIMENSIONAL DRAWINGS QFN36 5X6 ....... 97
30.2 DIMENSIONAL DRAWINGS TQFP-EP48 ....... 99
30.3 PACKAGE CODES ......................................... 100
31 DISCLAIMER ............................................... 101
32 ESD SENSITIVE DEVICE.......................... 101
33 TABLE OF FIGURES .................................. 102
34 REVISION HISTORY ................................. 103
35 REFERENCES ............................................... 103
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 5
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1 Principles of Operation
THE TMC2130 OFFERS THREE BASIC MODES OF OPERATION:
In Step/Direction Driver Mode, the TMC2130 is the microstep sequencer and power driver between a
motion controller and a two phase stepper motor. Configuration of the TMC2130 is done via SPI. A
dedicated motion controller IC or the CPU sends step and direction signals to the TMC2130. The
TMC2130 provides the related motor coil currents to operate the motor. In Standalone Mode, the
TMC2130 can be configured using pins. In this mode of operation CPU interaction is not necessary.
The third mode of operation is the SPI Driver Mode, which is used in combination with TRINAMICs
TMC4361 motion controller chip. This mode of operation offers several possibilities for sophisticated
applications.
OPERATION MODE 1: Step/Direction Driver Mode
An external motion controller is used or a central CPU generates step and direction signals. The
motion controller (e.g. TMC429) controls the motor position by sending pulses on the STEP signal
while indicating the direction on the DIR signal. The TMC2130 provides a microstep counter and a sine
table to convert these signals into the coil currents which control the position of the motor. The
TMC2130 automatically takes care of intelligent current and mode control and delivers feedback on the
state of the motor. The microPlyer automatically smoothens motion. To optimize power consumption
and heat dissipation, software may also adjust coolStep and stallGuard2 parameters in real-time, for
example to implement different tradeoffs between speed and power consumption.
Half Bridge 1
Half Bridge 2
+VM
VS
current
comparator
2 phase
stepper
motor
N
S
Stepper driver
Protection
& diagnostics
programmable
sine table
4*256 entry
DAC
stallGuard2™
coolStep™
x
step multiplier
microPlyer OA1
OA2
BRA
spreadCycle &
stealthChop
Chopper
VCC_IO
TMC2130
Stepper Motor Driver
SPI interface
CSN
SCK
SDO
SDI
STEP
coolStep &
stealthChop
motor driver
DIR
Half Bridge 1
Half Bridge 2
VS
current
comparator DAC
OB1
OB2
BRB
Control register
set
CLK oscillator/
selector
DIAG0
CLK_IN
Interface
DIAG1
+VIO
DIAG out
DRV_ENN
DRV_ENN
GNDP
GNDP
GNDA
F
F = 60ns spike filter
TST_MODE
dcStep™
DIE PAD
RS=0R15 allows for
maximum coil current.
Use low inductance
SMD resistor type.
Tie BRA and BRB to
GND for internal
current sensing
SPI™
opt. ext. clock
10-16MHz
3.3V or 5V
I/O voltage
100n
100n
100n
Diganostics
step & dir input
opt. driver enable
RS
RS
DCEN
DCIN
DCO
ISENSE
ISENSE
ISENSE
ISENSE
+VM
DAC Reference
AIN_IREF
IREF
IREF
IREF
SPI_MODE
PU
PU
PU
PU
PDD
PMD
PU=166K pullup resistor to VCC
PD=166k pull down resistor to GND
PDD=100k pulldown
PMD=50k to VCC/2
PU
PU
PU
PU=166K pullup to VCC
PU
optional current scaling
F
Standstill
current
reduction
leave open
dcStep control
Tie DCEN to GND if
dcStep is not used
RREF
5VOUT
Optional for internal current
sensing. RREF=9K1 allows for
maximum coil current.
5V Voltage
regulator
charge pump
CPO
CPI
VCP
22n
100n
+VM
5VOUT
VSA
4.7µ
100n
2R2
470n
2R2 and 470n are optional
filtering components for
best chopper precision
VCC
B.Dwersteg, ©
TRINAMIC 2014
Figure 1.1 TMC2130 STEP/DIR application diagram
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 6
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OPERATION MODE 2: Standalone Mode
The TMC2130 positions the motor based on step and direction signals. The microPlyer automatically
smoothens motion. No CPU interaction is required. Configuration is done by hardware pins. Basic
standby current control can be done by the TMC2130. Optional feedback signals allow error detection
and synchronization.
Status out
(open drain)
Half Bridge 1
Half Bridge 2
+VM
VS
current
comparator
2 phase
stepper
motor
N
S
Stepper driver
Protection
& diagnostics
sine table
4*256 entry
DAC
x
step multiplier
microPlyer OA1
OA2
BRA
spreadCycle &
stealthChop
Chopper
VCC_IO
TMC 2130 Standalone
Stepper Motor Driver
Configuration
interface
with TRISTATE
detection
CFG0
CFG1
CFG3
CFG2
STEP
spreadCycle &
stealthChop
motor driver
DIR
Half Bridge 1
Half Bridge 2
VS
current
comparator DAC
OB1
OB2
BRB
CLK oscillator/
selector
DIAG0
CLK_IN
Interface
DIAG1
+VIO
DRV_ENN
GNDP
GNDP
GNDA
F
F = 60ns spike filter
TST_MODE
DIE PAD
RS=0R15 allows for
maximum coil
current;
Tie BRA and BRB to
GND for internal
current sensing
TRISTATE configuration
(GND, VCC_IO or open)
opt. ext. clock
10-16MHz
3.3V or 5V
I/O voltage
100n
100n
100n
Index pulse
step & dir input
RS
RS
ISENSE
ISENSE
ISENSE
ISENSE
+VM
DAC Reference
AIN_IREF
IREF
IREF
IREF
TG
TG
TG
TG
PDD
PMD
TG= toggle with 166K resistor between VCC
and GND to detect open pin
PDD=100k pulldown
PMD=50k to VCC/2
optional current scaling
F
Standstill
current
reduction
RREF
5VOUT
Optional for internal current
sensing. RREF=9K1 allows for
maximum coil current.
5V Voltage
regulator
charge pump
CPO
CPI
VCP
22n
100n
+VM
5VOUT
VSA
4.7µ
100n
2R2
470n
2R2 and 470n are optional
filtering components for
best chopper precision
VCC
Driver error
CFG4 TG
CFG5 TG
DRV_ENN_CFG6 TG
CFG6
CFG3
Opt. driver
enable input
CFG0
CFG4
CFG5
CFG1
CFG2
CFG1
CFG2
CFG1
CFG2
B.Dwersteg, ©
TRINAMIC 2014
SPI_MODE PU
Figure 1.2 TMC2130 standalone driver application diagram
OPERATION MODE 3: SPI Driver Mode
Together with the TMC4361 high-performance S-ramp motion controller the TMC2130 stepper motor
driver offers an SPI control mode, which gives full control over the motor coil currents to the
TMC4361. Combining these two ICs offers several possibilities for demanding applications including
servo features. Please refer to Figure 1.1 for more information about the pinning, which is identical to
step/direction driver mode, except that the STEP & DIR pins are not required for operation.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 7
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1.1 Key Concepts
The TMC2130 implements advanced features which are exclusive to TRINAMIC products. These features
contribute toward greater precision, greater energy efficiency, higher reliability, smoother motion, and
cooler operation in many stepper motor applications.
stealthChop™ No-noise, high-precision chopper algorithm for inaudible motion and inaudible
standstill of the motor.
spreadCycle™ High-precision chopper algorithm for highly dynamic motion and absolutely clean
current wave.
dcStep™ Load dependent speed control. The motor moves as fast as possible and never loses
a step.
stallGuard2™ Sensorless stall detection and mechanical load measurement.
coolStep™ Load-adaptive current control reducing energy consumption by as much as 75%.
microPlyer™ Microstep interpolator for obtaining increased smoothness of microstepping when
using the STEP/DIR interface.
In addition to these performance enhancements, TRINAMIC motor drivers offer safeguards to detect
and protect against shorted outputs, output open-circuit, overtemperature, and undervoltage
conditions for enhancing safety and recovery from equipment malfunctions.
1.2 SPI Control Interface
The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus
master to the bus slave another bit is sent simultaneously from the slave to the master.
Communication between an SPI master and the TMC2130 slave always consists of sending one 40-bit
command word and receiving one 40-bit status word.
The SPI command rate typically is a single initialization after power-on.
1.3 Software
From a software point of view the TMC2130 is a peripheral with a number of control and status
registers. Most of them can either be written only or read only. Some of the registers allow both read
and write access. In case read-modify-write access is desired for a write only register, a shadow
register can be realized in master software.
1.4 Moving the Motor
1.4.1 STEP/DIR Interface
The motor can be controlled by a step and direction input. Active edges on the STEP input can be
rising edges or both rising and falling edges as controlled by a mode bit (dedge). Using both edges
cuts the toggle rate of the STEP signal in half, which is useful for communication over slow interfaces
such as optically isolated interfaces. On each active edge, the state sampled from the DIR input
determines whether to step forward or back. Each step can be a fullstep or a microstep, in which
there are 2, 4, 8, 16, 32, 64, 128, or 256 microsteps per fullstep. A step impulse with a low state on
DIR increases the microstep counter and a high decreases the counter by an amount controlled by the
microstep resolution. An internal table translates the counter value into the sine and cosine values
which control the motor current for microstepping.
1.4.2 SPI Direct Mode
The direct mode allows control of both motor coil currents and polarity via SPI. It mainly is intended
for use with a dedicated external motion controller IC with integrated sequencer. The sequencer
applies sine and cosine waves to the motor coils. This mode also allows control of DC motors, etc.
W +
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 8
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1.5 stealthChop Driver
stealthChop is a voltage chopper based principle. It guarantees absolutely quiet motor standstill and
silent slow motion, except for noise generated by ball bearings. stealthChop can be combined with
classic cycle-by-cycle chopper modes for best performance in all velocity ranges. Two additional
chopper modes are available: a traditional constant off-time mode and the spreadCycle mode. The
constant off-time mode provides high torque at highest velocity, while spreadCycle offers smooth
operation and good power efficiency over a wide range of speed and load. spreadCycle automatically
integrates a fast decay cycle and guarantees smooth zero crossing performance. The extremely
smooth motion of stealthChop is beneficial for many applications.
Programmable microstep shapes allow optimizing the motor performance for low cost motors.
Benefits of using stealthChop:
- Significantly improved microstepping with low cost motors
- Motor runs smooth and quiet
- Absolutely no standby noise
- Reduced mechanical resonances yields improved torque
1.6 stallGuard2 – Mechanical Load Sensing
stallGuard2 provides an accurate measurement of the load on the motor. It can be used for stall
detection as well as other uses at loads below those which stall the motor, such as coolStep load-
adaptive current reduction. This gives more information on the drive allowing functions like
sensorless homing and diagnostics of the drive mechanics.
1.7 coolStep – Load Adaptive Current Control
coolStep drives the motor at the optimum current. It uses the stallGuard2 load measurement
information to adjust the motor current to the minimum amount required in the actual load situation.
This saves energy and keeps the components cool.
Benefits are:
- Energy efficiency power consumption decreased up to 75%
- Motor generates less heat improved mechanical precision
- Less or no cooling improved reliability
- Use of smaller motor less torque reserve required → cheaper motor does the job
Figure 1.3 shows the efficiency gain of a 42mm stepper motor when using coolStep compared to
standard operation with 50% of torque reserve. coolStep is enabled above 60RPM in the example.
0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
0 50 100 150 200 250 300 350
Efficiency
Velocity [RPM]
Efficiency with coolStep
Efficiency with 50% torque reserve
Figure 1.3 Energy efficiency with coolStep (example)
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 9
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1.8 dcStep – Load Dependent Speed Control
dcStep allows the motor to run near its load limit and at its velocity limit without losing a step. If the
mechanical load on the motor increases to the stalling load, the motor automatically decreases
velocity so that it can still drive the load. With this feature, the motor will never stall. In addition to
the increased torque at a lower velocity, dynamic inertia will allow the motor to overcome mechanical
overloads by decelerating. dcStep feeds back status information to the external motion controller or
to the system CPU, so that the target position will be reached, even if the motor velocity needs to be
decreased due to increased mechanical load. A dynamic range of up to factor 10 or more can be
covered by dcStep without any step loss. By optimizing the motion velocity in high load situations,
this feature further enhances overall system efficiency.
Benefits are:
- Motor does not loose steps in overload conditions
- Application works as fast as possible
- Highest possible acceleration automatically
- Highest energy efficiency at speed limit
- Highest possible motor torque using fullstep drive
- Cheaper motor does the job
ECEEEECECE UUUUUUUU flflflflflflflfl 3333:3333:
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 10
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2 Pin Assignments
2.1 Package Outline
CPI
BRA
OA2
VS
TST_MODE
GNDP
OA1
VCP
STEP
CLK
OB1
GNDP
DCEN_CFG4
BRB
VS
DCO
1
DIR
VCC_IO
SDO_CFG0
SDI_CFG1
SCK_CFG2
CSN_CFG3
DIAG1
DIAG0
AIN_IREF
GNDA
CPO
-
OB2
VSA
-
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
28
27
26
25
24
23
22
21
20
19
36
35
34
33
32
31
30
29
DRV_ENN_CFG6
VCC
5VOUT
SPI_MODE DCIN_CFG5
PAD = GNDD
TMC2130-LA
QFN-36
5mm x 6mm
Figure 2.1 TMC2130-LA package and pinning QFN36 (5x6mm² body)
25
26
3724
-
-
OA2
OA1
-
VS
-
BRA
-
VCP
STEP
CLK
-
OB1
DCEN_CFG4
BRB
OB2
DCO
1
TST_MODE
DIR
VCC_IO
SDO_CFG0
SDI_CFG1
SCK_CFG2
CSN_CFG3
DIAG1
DIAG0
AIN_IREF
GNDA
CPO
-
-
-
VSA
-
2
3
4
5
6
7
8
9
10
11
14
15
16
17
18
19
20
21
22
23
36
35
34
33
32
31
30
29
28
27
48
47
46
45
44
43
42
41
40
39
DRV_ENN_CFG6
38
GNDP 13
CPI
VCC
5VOUT
PAD = GNDD
12
SPI_MODE
-
VS
-
DCIN_CFG5
-
-
GNDP
TMC2130-TA
TQFP-48
9mm x 9mm
Figure 2.2 TMC2130-TA package and pinning TQFP-EP 48-EP (7x7mm² body, 9x9mm² with leads)
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 11
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2.2 Signal Descriptions
Pin
QFN36
TQFP48
Type
Function
CLK
1
2
DI
CLK input. Tie to GND using short wire for internal clock
or supply external clock.
CSN_CFG3
2
3
DI
(tpu)
SPI chip select input (negative active) (SPI_MODE=1) or
Configuration input (SPI_MODE=0) (tristate detection).
SCK_CFG2
3
4
DI
(tpu)
SPI serial clock input (SPI_MODE=1) or
Configuration input (SPI_MODE=0) (tristate detection).
SDI_CFG1
4
5
DI
(tpu)
SPI data input (SPI_MODE=1) or
Configuration input (SPI_MODE=0) (tristate detection).
SDO_CFG0
5
7
DIO
(tpu)
SPI data output (tristate) (SPI_MODE=1) or
Configuration input (SPI_MODE=0) (tristate detection).
STEP
6
8
DI
STEP input
DIR
7
9
DI
DIR input
VCC_IO
8
10
3.3V to 5V IO supply voltage for all digital pins.
DNC
9
11, 14, 16,
18, 20, 22,
28, 41, 43,
45, 47
-
Do not connect. Leave open to ensure highest distance
for high voltage pins in TQFP package!
SPI_MODE
10
12
DI
(pu)
Mode selection input with pullup resistor. When tied low,
the chip is in standalone mode and pins have their CFG
functions. When tied high, the SPI interface is available
for control. Integrated pull-up resistor.
N.C.
11
6, 31, 36
Unused pin, connect to GND for compatibility to future
versions.
GNDP
12, 35
13, 48
Power GND. Connect to GND plane near pin.
OB1
13
15
Motor coil B output 1
BRB
14
17
Sense resistor connection for coil B. Place sense resistor
to GND near pin. An additional 100nF capacitor to GND
(GND plane) is recommended for best performance.
OB2
15
19
Motor coil B output 2
VS
16, 31
21, 40
Motor supply voltage. Provide filtering capacity near pin
with short loop to nearest GNDP pin (respectively via GND
plane).
DCO
17
23
DIO
dcStep ready output
DCEN_CFG4
18
24
DI
(tpu)
dcStep enable input (SPI_MODE=1) - tie to GND for normal
operation (no dcStep) or
Configuration input (SPI_MODE=0) (tristate detection).
DCIN_CFG5
19
25
DI
(tpu)
dcStep gating input for axis synchronization (SPI_MODE=1)
or
Configuration input (SPI_MODE=0) (tristate detection).
DIAG0
20
26
DIO
Diagnostics output DIAG0. Use external pull-up resistor
with 47k or less in open drain mode.
DIAG1
21
27
DIO
Diagnostics output DIAG1. Use external pull-up resistor
with 47k or less in open drain mode.
DRV_ENN_
CFG6
22
29
DI
(tpu)
Enable input (SPI_MODE=1) or
configuration / Enable input (SPI_MODE=0) (tristate
detection).
The power stage becomes switched off (all motor outputs
floating) when this pin becomes driven to a high level.
AIN_IREF
23
30
AI
Analog reference voltage for current scaling (optional
mode) or reference current for use of internal sense
resistors
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 12
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Pin
QFN36
TQFP48
Type
Function
GNDA
24
32
Analog GND. Tie to GND plane.
5VOUT
25
33
Output of internal 5V regulator. Attach 2.2µF or larger
ceramic capacitor to GNDA near to pin for best
performance. May be used to supply VCC of chip.
VCC
26
34
5V supply input for digital circuitry within chip and
charge pump. Attach 470nF capacitor to GND (GND plane).
May be supplied by 5VOUT. A 2.2 or 3.3 Ohm resistor is
recommended for decoupling noise from 5VOUT. When
using an external supply, make sure, that VCC comes up
before or in parallel to 5VOUT or VCC_IO, whichever
comes up later!
CPO
27
35
Charge pump capacitor output.
CPI
28
37
Charge pump capacitor input. Tie to CPO using 22nF 50V
capacitor.
VCP
29
38
Charge pump voltage. Tie to VS using 100nF capacitor.
VSA
30
39
Analog supply voltage for 5V regulator. Normally tied to
VS. Provide a 100nF filtering capacitor.
OA2
32
42
Motor coil A output 2
BRA
33
44
Sense resistor connection for coil A. Place sense resistor
to GND near pin. An additional 100nF capacitor to GND
(GND plane) is recommended for best performance.
OA1
34
46
Motor coil A output 1
TST_MODE
36
1
DI
Test mode input. Tie to GND using short wire.
Exposed
die pad
-
-
Connect the exposed die pad to a GND plane. Provide as
many as possible vias for heat transfer to GND plane.
Serves as GND pin for digital circuitry.
*(pu) denominates a pin with pullup resistor; (tpu) denominates a pin with pullup resistor or toggle
detection. Toggle detection is active in standalone mode, only (SPI_MODE=0)
* Digital Pins: All pins of type DI, DI(pu), DI(tpu), DIO and DIO(tpu) refer to VCC_IO and have intrinsic
protective clamping diodes to GND and VCC_IO and use Schmitt trigger inputs.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 13
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3 Sample Circuits
The sample circuits show the connection of external components in different operation and supply
modes. The connection of the bus interface and further digital signals is left out for clarity.
3.1 Standard Application Circuit
VCC_IO
TMC2130
SPI interface
CSN
SCK
SDO
SDI
Step & Dir input
with microPlyer
STEP
DIR
DIAG / INT out
5V Voltage
regulator charge pump
22n
63V
100n
16V
DIAG0
CLK_IN
DIAG1
+VM
5VOUT
VSA
4.7µ
+VIO
DRV_ENN
GNDP
GNDA
TST_MODE
DIE PAD
VCC
opt. ext. clock
12-16MHz
3.3V or 5V
I/O voltage
100n
100n
Sequencer
Full Bridge A
Full Bridge B
+VM
VS
stepper
motor
N
S
OA1
OA2
OB1
OB2
Driver
100n
BRB
100µF
CPI
CPO
BRA RSA
Use low inductivity SMD
type, e.g. 1206, 0.5W
RSB
100n
VCP
Optional use lower
voltage down to 6V
2R2
470n
DAC Reference
AIN_IREF
IREF
Use low inductivity SMD
type, e.g. 1206, 0.5W
dcStep Controller
Interface
DC_IN
DC_EN
DCO
opt. driver enable
SPI_MODE
leave open
B.Dwersteg, ©
TRINAMIC 2014
opt. dcStep control
Figure 3.1 Standard application circuit
The standard application circuit uses a minimum set of additional components. Two sense resistors
set the motor coil current. See chapter 9 to choose the right sense resistors. Use low ESR capacitors
for filtering the power supply. The capacitors need to cope with the current ripple cause by chopper
operation. A minimum capacity of 100µF near the driver is recommended for best performance.
Current ripple in the supply capacitors also depends on the power supply internal resistance and
cable length. VCC_IO can be supplied from 5VOUT, or from an external source, e.g. a low drop 3.3V
regulator. In order to minimize linear voltage regulator power dissipation of the internal 5V voltage
regulator in applications where VM is high, a different (lower) supply voltage can be used for VSA, if
available. For example, many applications provide a 12V supply in addition to a higher driver supply
voltage. Using the 12V supply for VSA rather than 24V will reduce the power dissipation of the
internal 5V regulator to about 37% of the dissipation caused by supply with the full motor voltage.
Basic layout hints
Place sense resistors and all filter capacitors as close as possible to the related IC pins. Use a solid
common GND for all GND connections, also for sense resistor GND. Connect 5VOUT filtering capacitor
directly to 5VOUT and GNDA pin. See layout hints for more details. Low ESR electrolytic capacitors are
recommended for VS filtering.
Attention
In case VSA is supplied by a different voltage source, make sure that VSA does not exceed VS by
more than one diode drop, especially also upon power up or power down.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 14
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3.2 Reduced Number of Components
5V Voltage
regulator
+VM
5VOUT
VSA
4.7µ
VCC
100n
Optional use lower
voltage down to 6V
Figure 3.2 Reduced number of filtering components
The standard application circuit uses RC filtering to de-couple the output of the internal linear
regulator from high frequency ripple caused by digital circuitry supplied by the VCC input. For cost
sensitive applications, the RC-Filtering on VCC can be eliminated. This leads to more noise on 5VOUT
caused by operation of the charge pump and the internal digital circuitry. There is a slight impact on
microstep vibration and chopper noise performance.
3.3 Internal RDSon Sensing
For cost critical or space limited applications, sense resistors can be omitted. For internal current
sensing, a reference current set by a tiny external resistor programs the output current. For calculation
of the reference resistor, refer chapter 10.
Full Bridge A
Full Bridge B
stepper
motor
N
S
OA1
OA2
OB1
OB2
Driver
BRB
BRA
DAC Reference
AIN_IREF
IREF
AIN_IREF
5VOUT
RREF
Figure 3.3 RDSon based sensing eliminates high current sense resistors
:f‘ fl?
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 15
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3.4 External 5V Power Supply
When an external 5V power supply is available, the power dissipation caused by the internal linear
regulator can be eliminated. This especially is beneficial in high voltage applications, and when
thermal conditions are critical. There are two options for using an external 5V source: either the
external 5V source is used to support the digital supply of the driver by supplying the VCC pin, or the
complete internal voltage regulator becomes bridged and is replaced by the external supply voltage.
3.4.1 Support for the VCC Supply
This scheme uses an external supply for all digital circuitry within the driver (Figure 3.4). As the digital
circuitry makes up for most of the power dissipation, this way the internal 5V regulator sees only low
remaining load. The precisely regulated voltage of the internal regulator is still used as the reference
for the motor current regulation as well as for supplying internal analog circuitry.
When cutting VCC from 5VOUT, make sure that the VCC supply comes up before or synchronously
with the 5VOUT supply to ensure a correct power up reset of the internal logic. A simple schematic
uses two diodes forming an OR of the internal and the external power supplies for VCC. In order to
prevent the chip from drawing part of the power from its internal regulator, a low drop 1A Schottky
diode is used for the external 5V supply path, while a silicon diode is used for the 5VOUT path. An
enhanced solution uses a dual PNP transistor as an active switch. It minimizes voltage drop and thus
gives best performance.
In certain setups, switching of VCC voltage can be eliminated. A third variant uses the VCC_IO supply
to ensure power-on reset. This is possible, if VCC_IO comes up synchronously with or delayed to VCC.
Use a linear regulator to generate a 3.3V VCC_IO from the external 5V VCC source. This 3.3V regulator
will cause a certain voltage drop. A voltage drop in the regulator of 0.9V or more (e.g. LD1117-3.3)
ensures that the 5V supply already has exceeded the lower limit of about 3.0V once the reset
conditions ends. The reset condition ends earliest, when VCC_IO exceeds the undervoltage limit of
minimum 2.1V. Make sure that the power-down sequence also is safe. Undefined states can result
when VCC drops well below 4V without safely triggering a reset condition. Triggering a reset upon
power-down can be ensured when VSA goes down synchronously with or before VCC.
5V Voltage
regulator
5VOUT
VSA
4.7µ
VCC
100n
470n
+5V LL4448
MSS1P3
+VM
5V Voltage
regulator
5VOUT
VSA
4.7µ
VCC
100n
+5V
+VM
VCC_IO
470n 100n
3.3V
regulator
3.3V
VCC supplied from external 5V. 5V or 3.3V IO voltage. VCC supplied from external 5V. 3.3V IO voltage generated from same source.
5V Voltage
regulator
5VOUT
VSA
4.7µ
VCC
100n
470n
+5V BAT54
+VM
VCC supplied from external 5V using active switch. 5V or 3.3V IO voltage.
4k7
10k
2x BC857 or
1x BC857BS
Figure 3.4 Using an external 5V supply for digital circuitry of driver (different options)
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 16
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3.4.2 Internal Regulator Bridged
In case a clean external 5V supply is available, it can be used for complete supply of analog and
digital part (Figure 3.5). The circuit will benefit from a well-regulated supply, e.g. when using a +/-1%
regulator. A precise supply guarantees increased motor current precision, because the voltage at
5VOUT directly is the reference voltage for all internal units of the driver, especially for motor current
control. For best performance, the power supply should have low ripple to give a precise and stable
supply at 5VOUT pin with remaining ripple well below 5mV. Some switching regulators have a higher
remaining ripple, or different loads on the supply may cause lower frequency ripple. In this case,
increase capacity attached to 5VOUT. In case the external supply voltage has poor stability or low
frequency ripple, this would affect the precision of the motor current regulation as well as add
chopper noise.
5V Voltage
regulator
+5V
5VOUT
VSA
4.7µ
VCC
470n
10R
Well-regulated, stable
supply, better than +-5%
Figure 3.5 Using an external 5V supply to bypass internal regulator
3.5 Pre-Regulator for Reduced Power Dissipation
When operating at supply voltages up to 46V for VS and VSA, the internal linear regulator will
contribute with up to 1W to the power dissipation of the driver. This will reduce the capability of the
chip to continuously drive high motor current, especially at high environment temperatures. When no
external power supply in the range 5V to 24V is available, an external pre-regulator can be built with
a few inexpensive components in order to dissipate most of the voltage drop in external components.
Figure 3.6 shows different examples. In case a well-defined supply voltage is available, a single 1W or
higher power Zener diode also does the job.
5V Voltage
regulator
5VOUT
VSA
4.7µ
VCC
470n
+VM
2R2
BCX56 or
similar
22k
4k7
Simple pre-regulator for 24V up to 46V
5V Voltage
regulator
5VOUT
VSA
4.7µ
VCC
470n
+VM
2R2
BCX56 or
similar
22k
Simple short circuit protected pre-regulator for 24V up to 46V
Z5.6V e.g.
MM5Z5V6 100R
470n
16V 470n
16V
Figure 3.6 Examples for simple pre-regulators
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 17
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3.6 5V Only Supply
VCC_IO
TMC2130
SPI interface
CSN
SCK
SDO
SDI
Step & Dir input
with microPlyer
STEP
DIR
DIAG / INT out
5V Voltage
regulator charge pump
22n
63V
100n
16V
DIAG0
CLK_IN
DIAG1
+VIO
DRV_ENN
GNDP
GNDA
TST_MODE
DIE PAD
opt. ext. clock
12-16MHz
3.3V or 5V
I/O voltage
100n
Sequencer
Full Bridge A
Full Bridge B
+5V
VS
stepper
motor
N
S
OA1
OA2
OB1
OB2
Driver
100n
BRB
100µF
CPI
CPO
BRA RSA
Use low inductivity SMD
type, e.g. 1206, 0.5W
RSB
100n
VCP
DAC Reference
AIN_IREF
IREF
Use low inductivity SMD
type, e.g. 1206, 0.5W
dcStep Controller
Interface
A B N
DC_IN
DC_EN
DCO
SPI_MODE
leave open opt. driver enable
+5V
5VOUT
VSA
4.7µ
VCC
470n
opt. dcStep control
Figure 3.7 5V only operation
While the standard application circuit is limited to roughly 5.5 V lower supply voltage, a 5 V only
application lets the IC run from a normal 5 V +/-5% supply. In this application, linear regulator drop
must be minimized. Therefore, the major 5 V load is removed by supplying VCC directly from the
external supply. In order to keep supply ripple away from the analog voltage reference, 5VOUT should
have an own filtering capacity and the 5VOUT pin does not become bridged to the 5V supply.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 18
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3.7 High Motor Current
When operating at a high motor current, the driver power dissipation due to MOSFET switch on-
resistance significantly heats up the driver. This power dissipation will heat up the PCB cooling
infrastructure also, if operated at an increased duty cycle. This in turn leads to a further increase of
driver temperature. An increase of temperature by about 100°C increases MOSFET resistance by
roughly 50%. This is a typical behavior of MOSFET switches. Therefore, under high duty cycle, high
load conditions, thermal characteristics have to be carefully taken into account, especially when
increased environment temperatures are to be supported. Refer the thermal characteristics and the
layout hints for more information. As a thumb rule, thermal properties of the PCB design become
critical for the QFN-36 at or above about 1000mA RMS motor current for increased periods of time.
Keep in mind that resistive power dissipation raises with the square of the motor current. On the
other hand, this means that a small reduction of motor current significantly saves heat dissipation
and energy.
An effect which might be perceived at medium motor velocities and motor sine wave peak currents
above roughly 1.2A peak is a slight sine distortion of the current wave when using spreadCycle. It
results from an increasing negative impact of parasitic internal diode conduction, which in turn
negatively influences the duration of the fast decay cycle of the spreadCycle chopper. This is, because
the current measurement does not see the full coil current during this phase of the sine wave,
because an increasing part of the current flows directly from the power MOSFETs’ drain to GND and
does not flow through the sense resistor. This effect with most motors does not negatively influence
the smoothness of operation, as it does not impact the critical current zero transition. The effect does
not occur with stealthChop.
3.7.1 Reduce Linear Regulator Power Dissipation
When operating at high supply voltages, as a first step the power dissipation of the integrated 5V
linear regulator can be reduced, e.g. by using an external 5V source for supply. This will reduce overall
heating. It is advised to reduce motor stand still current in order to decrease overall power
dissipation. If applicable, also use coolStep. A decreased clock frequency will reduce power dissipation
of the internal logic. Further a decreased chopper frequency also can reduce power dissipation.
3.7.2 Operation near to / above 2A Peak Current
The driver can deliver up to 2.5A motor peak current. Considering thermal characteristics, this only is
possible in duty cycle limited operation. When a peak current up to 2.5A is to be driven, the driver
chip temperature is to be kept at a maximum of 105°C. Linearly derate the design peak temperature
from 125°C to 105°C in the range 2A to 2.5A output current (see Figure 3.8). Exceeding this may lead
to triggering the short circuit detection.
Die
Temperature
Peak coil
current
105°C
125°C
2A
Opearation not recommended
for increased periods of time
2.5A1.75A
115°C
135°C
1.5A
Limit by lower limit of
overtemperature threshold
Specified operational
range for max. 125°C
Derating
for >2A
High temperature
range
Current
limitation
2.25A
Figure 3.8 Derating of maximum sine wave peak current at increased die temperature
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 19
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3.7.3 Reduction of Resistive Losses by Adding Schottky Diodes
Schottky Diodes can be added to the circuit to reduce driver power dissipation when driving high
motor currents (see Figure 3.9). The Schottky diodes have a conduction voltage of about 0.5V and will
take over more than half of the motor current during the negative half wave of each output in slow
decay and fast decay phases, thus leading to a cooler motor driver. This effect starts from a few
percent at 1.2A and increases with higher motor current rating up to roughly 20%. As a 30V Schottky
diode has a lower forward voltage than a 50V or 60V diode, it makes sense to use a 30V diode when
the supply voltage is below 30V. The diodes will have less effect when working with stealthChop due
to lower times of diode conduction in the chopper cycle. At current levels below 1.2A coil current, the
effect of the diodes is negligible.
Full Bridge A
Full Bridge B
stepper
motor
N
S
OA1
OA2
OB1
OB2
Driver
BRB
BRA RSA
RSB
1A Schottky Diodes like MSS1P6
or MSS1P3 (VM limited to 30V)
Figure 3.9 Schottky diodes reduce power dissipation at high peak currents up to 2A (2.5A)
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 20
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3.8 Driver Protection and EME Circuitry
Some applications have to cope with ESD events caused by motor operation or external influence.
Despite ESD circuitry within the driver chips, ESD events occurring during operation can cause a reset
or even a destruction of the motor driver, depending on their energy. Especially plastic housings and
belt drive systems tend to cause ESD events of several kV. It is best practice to avoid ESD events by
attaching all conductive parts, especially the motors themselves to PCB ground, or to apply electrically
conductive plastic parts. In addition, the driver can be protected up to a certain degree against ESD
events or live plugging / pulling the motor, which also causes high voltages and high currents into
the motor connector terminals. A simple scheme uses capacitors at the driver outputs to reduce the
dV/dt caused by ESD events. Larger capacitors will bring more benefit concerning ESD suppression,
but cause additional current flow in each chopper cycle, and thus increase driver power dissipation,
especially at high supply voltages. The values shown are example values – they might be varied
between 100pF and 1nF. The capacitors also dampen high frequency noise injected from digital parts
of the application PCB circuitry and thus reduce electromagnetic emission. A more elaborate scheme
uses LC filters to de-couple the driver outputs from the motor connector. Varistors in between of the
coil terminals eliminate coil overvoltage caused by live plugging. Optionally protect all outputs by a
varistor against ESD voltage.
Full Bridge A
Full Bridge B
stepper
motor
N
S
OA1
OA2
OB1
OB2
Driver
470pF
100V
470pF
100V
470pF
100V
470pF
100V
Full Bridge A
Full Bridge B
stepper
motor
N
S
OA1
OA2
OB1
OB2
Driver
470pF
100V
470pF
100V
50Ohm @
100MHz
50Ohm @
100MHz
50Ohm @
100MHz
50Ohm @
100MHz
V1
V2
Fit varistors to supply voltage
rating. SMD inductivities
conduct full motor coil
current.
470pF
100V
470pF
100V
Varistors V1 and V2 protect
against inductive motor coil
overvoltage.
V1A, V1B, V2A, V2B:
Optional position for varistors
in case of heavy ESD events.
BRB
RSA
BRA
100nF
16V
RSB 100nF
16V
V1A
V1B
V2A
V2B
Figure 3.10 Simple ESD enhancement and more elaborate motor output protection
.32
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 21
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4 SPI Interface
4.1 SPI Datagram Structure
The TMC2130 uses 40 bit SPI™ (Serial Peripheral Interface, SPI is Trademark of Motorola) datagrams
for communication with a microcontroller. Microcontrollers which are equipped with hardware SPI are
typically able to communicate using integer multiples of 8 bit. The NCS line of the device must be
handled in a way, that it stays active (low) for the complete duration of the datagram transmission.
Each datagram sent to the device is composed of an address byte followed by four data bytes. This
allows direct 32 bit data word communication with the register set. Each register is accessed via 32
data bits even if it uses less than 32 data bits.
For simplification, each register is specified by a one byte address:
- For a read access the most significant bit of the address byte is 0.
- For a write access the most significant bit of the address byte is 1.
Most registers are write only registers, some can be read additionally, and there are also some read
only registers.
4.1.1 Selection of Write / Read (WRITE_notREAD)
The read and write selection is controlled by the MSB of the address byte (bit 39 of the SPI
datagram). This bit is 0 for read access and 1 for write access. So, the bit named W is a
WRITE_notREAD control bit. The active high write bit is the MSB of the address byte. So, 0x80 has to
be added to the address for a write access. The SPI interface always delivers data back to the master,
independent of the W bit. The data transferred back is the data read from the address which was
transmitted with the previous datagram, if the previous access was a read access. If the previous
access was a write access, then the data read back mirrors the previously received write data. So, the
difference between a read and a write access is that the read access does not transfer data to the
addressed register but it transfers the address only and its 32 data bits are dummies, and, further the
following read or write access delivers back the data read from the address transmitted in the
preceding read cycle.
A read access request datagram uses dummy write data. Read data is transferred back to the master
with the subsequent read or write access. Hence, reading multiple registers can be done in a
pipelined fashion.
Whenever data is read from or written to the TMC2130, the MSBs delivered back contain the SPI
status, SPI_STATUS, a number of eight selected status bits.
SPI DATAGRAM STRUCTURE
MSB (transmitted first)
40 bit
LSB (transmitted last)
39 ...
... 0
→ 8 bit address
8 bit SPI status
→ 32 bit data
39 ... 32
31 ... 0
→ to TMC2130
RW + 7 bit address
from TMC2130
8 bit SPI status
8 bit data
8 bit data
8 bit data
8 bit data
39 / 38 ... 32
31 ... 24
23 ... 16
15 ... 8
7 ... 0
W
38...32
31...28
27...24
23...20
19...16
15...12
11...8
7...4
3...0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9
8
7
6
5
4
3
2
1
0
action data sent to TMC2130 data renewed from TMC2130
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 22
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Example:
For a read access to the register (DRV_STATUS) with the address 0x6F, the address byte has
to be set to 0x6F in the access preceding the read access. For a write access to the register
(CHOPCONF), the address byte has to be set to 0x80 + 0x6C = 0xEC. For read access, the data
bit might have any value (-). So, one can set them to 0.
action data sent to TMC2130 data received from TMC2130
read DRV_STATUS → 0x6F00000000 0xSS & unused data
read DRV_STATUS → 0x6F00000000 0xSS & DRV_STATUS
write CHOPCONF:= 0x00ABCDEF → 0xEC00ABCDEF 0xSS & DRV_STATUS
write CHOPCONF:= 0x00123456 → 0xEC00123456 0xSS00ABCDEF
*)S: is a placeholder for the status bits SPI_STATUS
4.1.2 SPI Status Bits Transferred with Each Datagram Read Back
New status information becomes latched at the end of each access and is available with the next SPI
transfer.
SPI_STATUS – status flags transmitted with each SPI access in bits 39 to 32
Bit
Name
Comment
7
-
unused
6
-
unused
5
-
unused
4
-
unused
3
standstill
DRV_STATUS[31] – 1: Signals motor stand still
2
sg2
DRV_STATUS[24] – 1: Signals stallguard flag active
1
driver_error
GSTAT[1] – 1: Signals driver 1 driver error (clear by reading GSTAT)
0
reset_flag
GSTAT[0] – 1: Signals, that a reset has occurred (clear by reading GSTAT)
4.1.3 Data Alignment
All data are right aligned. Some registers represent unsigned (positive) values, some represent integer
values (signed) as two’s complement numbers, single bits or groups of bits are represented as single
bits respectively as integer groups.
4.2 SPI Signals
The SPI bus on the TMC2130 has four signals:
- SCK – bus clock input
- SDI – serial data input
- SDO – serial data output
- CSN – chip select input (active low)
The slave is enabled for an SPI transaction by a low on the chip select input CSN. Bit transfer is
synchronous to the bus clock SCK, with the slave latching the data from SDI on the rising edge of SCK
and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum
of 40 SCK clock cycles is required for a bus transaction with the TMC2130.
If more than 40 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a
40-clock delay through an internal shift register. This can be used for daisy chaining multiple chips.
CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal
shift register are latched into the internal control register and recognized as a command from the
master to the slave. If more than 40 bits are sent, only the last 40 bits received before the rising edge
of CSN are recognized as the command.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 23
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4.3 Timing
The SPI interface is synchronized to the internal system clock, which limits the SPI bus clock SCK to
half of the system clock frequency. If the system clock is based on the on-chip oscillator, an additional
10% safety margin must be used to ensure reliable data transmission. All SPI inputs as well as the
ENN input are internally filtered to avoid triggering on pulses shorter than 20ns. Figure 4.1 shows the
timing parameters of an SPI bus transaction, and the table below specifies their values.
CSN
SCK
SDI
SDO
tCC tCC
tCL tCH
bit39 bit38 bit0
bit39 bit38 bit0
tDO tZC
tDU tDH
tCH
Figure 4.1 SPI timing
Hint
Usually this SPI timing is referred to as SPI MODE 3
SPI interface timing
AC-Characteristics
clock period: tCLK
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SCK valid before or after change
of CSN
tCC
10
ns
CSN high time
tCSH
*) Min time is for
synchronous CLK
with SCK high one
tCH before CSN high
only
tCLK*)
>2tCLK+10
ns
SCK low time
tCL
*) Min time is for
synchronous CLK
only
tCLK*)
>tCLK+10
ns
SCK high time
tCH
*) Min time is for
synchronous CLK
only
tCLK*)
>tCLK+10
ns
SCK frequency using internal
clock
fSCK
assumes minimum
OSC frequency
4
MHz
SCK frequency using external
16MHz clock
fSCK
assumes
synchronous CLK
8
MHz
SDI setup time before rising
edge of SCK
tDU
10
ns
SDI hold time after rising edge
of SCK
tDH
10
ns
Data out valid time after falling
SCK clock edge
tDO
no capacitive load
on SDO
tFILT+5
ns
SDI, SCK and CSN filter delay
time
tFILT
rising and falling
edge
12
20
30
ns
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 24
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5 Register Mapping
This chapter gives an overview of the complete register set. Some of the registers bundling a number
of single bits are detailed in extra tables. The functional practical application of the settings is detailed
in dedicated chapters.
Note
- All registers become reset to 0 upon power up, unless otherwise noted.
- Add 0x80 to the address Addr for write accesses!
NOTATION OF HEXADECIMAL AND BINARY NUMBERS
0x
precedes a hexadecimal number, e.g. 0x04
%
precedes a multi-bit binary number, e.g. %100
NOTATION OF R/W FIELD
R
Read only
W
Write only
R/W
Read- and writable register
R+C
Clear upon read
OVERVIEW REGISTER MAPPING
REGISTER
DESCRIPTION
General Configuration Registers
These registers contain
- global configuration
- global status flags
- interface configuration
- and I/O signal configuration
Velocity Dependent Driver Feature Control Register
Set
This register set offers registers for
- driver current control
- setting thresholds for coolStep operation
- setting thresholds for different chopper modes
- setting thresholds for dcStep operation
Motor Driver Register Set
This register set offers registers for
- setting / reading out microstep table and
counter
- chopper and driver configuration
- coolStep and stallGuard2 configuration
- dcStep configuration
- reading out stallGuard2 values and driver error
flags
dcStep Minimum Velocity
Setting for minimum dcStep velocity
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 25
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5.1 General Configuration Registers
GENERAL CONFIGURATION REGISTERS (0X00…0X0F)
R/W
Addr
n
Register
Description / bit names
RW
0x00
17
GCONF
Bit
GCONF – Global configuration flags
0
I_scale_analog
0: Normal operation, use internal reference voltage
1: Use voltage supplied to AIN as current reference
1
internal_Rsense
0: Normal operation
1: Internal sense resistors. Use current supplied into
AIN as reference for internal sense resistor
2
en_pwm_mode
1: stealthChop voltage PWM mode enabled
(depending on velocity thresholds). Switch from
off to on state while in stand still, only.
3
enc_commutation (Special mode - do not use, leave 0)
1: Enable commutation by full step encoder
(DCIN_CFG5 = ENC_A, DCEN_CFG4 = ENC_B)
4
shaft
1: Inverse motor direction
5
diag0_error
1: Enable DIAG0 active on driver errors:
Over temperature (ot), short to GND (s2g),
undervoltage chargepump (uv_cp)
DIAG0 always shows the reset-status, i.e. is active low
during reset condition.
6
diag0_otpw
1: Enable DIAG0 active on driver over temperature
prewarning (otpw)
7
diag0_stall
1: Enable DIAG0 active on motor stall (set
TCOOLTHRS before using this feature)
8
diag1_stall
1: Enable DIAG1 active on motor stall (set
TCOOLTHRS before using this feature)
9
diag1_index
1: Enable DIAG1 active on index position (microstep
look up table position 0)
10
diag1_onstate
1: Enable DIAG1 active when chopper is on (for the
coil which is in the second half of the fullstep)
11
diag1_steps_skipped
1: Enable output toggle when steps are skipped in
dcStep mode (increment of LOST_STEPS). Do not
enable in conjunction with other DIAG1 options.
12
diag0_int_pushpull
0: DIAG0 is open collector output (active low)
1: Enable DIAG0 push pull output (active high)
13
diag1_pushpull
0: DIAG1 is open collector output (active low)
1: Enable DIAG1 push pull output (active high)
14
small_hysteresis
0: Hysteresis for step frequency comparison is 1/16
1: Hysteresis for step frequency comparison is 1/32
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 26
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GENERAL CONFIGURATION REGISTERS (0X00…0X0F)
R/W
Addr
n
Register
Description / bit names
15
stop_enable
0: Normal operation
1: Emergency stop: DCIN stops the sequencer when
tied high (no steps become executed by the
sequencer, motor goes to standstill state).
16
direct_mode
0: Normal operation
1: Motor coil currents and polarity directly
programmed via serial interface: Register XDIRECT
(0x2D) specifies signed coil A current (bits 8..0)
and coil B current (bits 24..16). In this mode, the
current is scaled by IHOLD setting. Velocity based
current regulation of stealthChop is not available
in this mode. The automatic stealthChop current
regulation will work only for low stepper motor
velocities.
17
test_mode
0: Normal operation
1: Enable analog test output on pin DCO. IHOLD[1..0]
selects the function of DCO:
0…2: T120, DAC, VDDH
Attention: Not for user, set to 0 for normal operation!
R+C
0x01
3
GSTAT
Bit
GSTAT – Global status flags
0
reset
1: Indicates that the IC has been reset since the last
read access to GSTAT. All registers have been
cleared to reset values.
1
drv_err
1: Indicates, that the driver has been shut down
due to overtemperature or short circuit detection
since the last read access. Read DRV_STATUS for
details. The flag can only be reset when all error
conditions are cleared.
2
uv_cp
1: Indicates an undervoltage on the charge pump.
The driver is disabled in this case.
R
0x04
8
+
8
IOIN
Bit
INPUT
Reads the state of all input pins available
0
STEP
1
DIR
2
DCEN_CFG4
3
DCIN_CFG5
4
DRV_ENN_CFG6
5
DCO
6
This bit always shows 1.
7
Don’t care.
31..
24
VERSION: 0x11=first version of the IC
Identical numbers mean full digital compatibility.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 27
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5.2 Velocity Dependent Driver Feature Control Register Set
VELOCITY DEPENDENT DRIVER FEATURE CONTROL REGISTER SET (0X10…0X1F)
R/W
Addr
n
Register
Description / bit names
W
0x10
5
+
5
+
4
IHOLD_IRUN
Bit
IHOLD_IRUN – Driver current control
4..0
IHOLD
Standstill current (0=1/32…31=32/32)
In combination with stealthChop mode, setting
IHOLD=0 allows to choose freewheeling or coil
short circuit for motor stand still.
12..8
IRUN
Motor run current (0=1/32…31=32/32)
Hint: Choose sense resistors in a way, that normal
IRUN is 16 to 31 for best microstep performance.
19..16
IHOLDDELAY
Controls the number of clock cycles for motor
power down after a motion as soon as standstill is
detected (stst=1) and TPOWERDOWN has expired.
The smooth transition avoids a motor jerk upon
power down.
0: instant power down
1..15: Delay per current reduction step in multiple
of 2^18 clocks
W
0x11
8
TPOWER
DOWN
TPOWERDOWN sets the delay time after stand still (stst) of the
motor to motor current power down. Time range is about 0 to
4 seconds.
0…((2^8)-1) * 2^18 tCLK
R
0x12
20
TSTEP
Actual measured time between two 1/256 microsteps derived
from the step input frequency in units of 1/fCLK. Measured
value is (2^20)-1 in case of overflow or stand still.
All TSTEP related thresholds use a hysteresis of 1/16 of the
compare value to compensate for jitter in the clock or the step
frequency. The flag small_hysteresis modifies the hysteresis to
a smaller value of 1/32.
(Txxx*15/16)-1 or
(Txxx*31/32)-1 is used as a second compare value for each
comparison value.
This means, that the lower switching velocity equals the
calculated setting, but the upper switching velocity is higher as
defined by the hysteresis setting.
In dcStep mode TSTEP will not show the mean velocity of the
motor, but the velocities for each microstep, which may not be
stable and thus does not represent the real motor velocity in
case it runs slower than the target velocity.
W
0x13
20
TPWMTHRS
This is the upper velocity for stealthChop voltage PWM mode.
TSTEP ≥ TPWMTHRS
- stealthChop PWM mode is enabled, if configured
- dcStep is disabled
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 28
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VELOCITY DEPENDENT DRIVER FEATURE CONTROL REGISTER SET (0X10…0X1F)
R/W
Addr
n
Register
Description / bit names
W
0x14
20
TCOOLTHRS
This is the lower threshold velocity for switching on smart
energy coolStep and stallGuard feature. (unsigned)
Set this parameter to disable coolStep at low speeds, where it
cannot work reliably. The stall detection and stallGuard output
signal becomes enabled when exceeding this velocity. In non-
dcStep mode, it becomes disabled again once the velocity falls
below this threshold.
TCOOLTHRS ≥ TSTEP ≥ THIGH:
- coolStep is enabled, if configured
- stealthChop voltage PWM mode is disabled
TCOOLTHRS ≥ TSTEP
- stallGuard status output signal is enabled, if
configured
W
0x15
20
THIGH
This velocity setting allows velocity dependent switching into
a different chopper mode and fullstepping to maximize torque.
(unsigned)
The stall detection feature becomes switched off for 2-3
electrical periods whenever passing THIGH threshold to
compensate for the effect of switching modes.
TSTEP ≤ THIGH:
- coolStep is disabled (motor runs with normal current
scale)
- stealthChop voltage PWM mode is disabled
- If vhighchm is set, the chopper switches to chm=1
with TFD=0 (constant off time with slow decay, only).
- chopSync2 is switched off (SYNC=0)
- If vhighfs is set, the motor operates in fullstep mode
and the stall detection becomes switched over to
dcStep stall detection.
microstep velocity time reference t for velocities: TSTEP = fCLK / fSTEP
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 29
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5.3 SPI Mode Register
This register cannot be used in STEP/DIR mode.
SPI MODE REGISTER (0X2D)
R/W
Addr
n
Register
Description / bit names
Range [Unit]
RW
0x2D
32
XDIRECT
direct_mode
0: Normal operation
1: Directly SPI driven motor current
Direct mode operation:
XDIRECT specifies Motor coil currents and
polarity directly programmed via the serial
interface. Use signed, two’s complement
numbers.
Coil A current (bits 8..0) (signed)
Coil B current (bits 24..16) (signed)
Range: +-248 for normal operation, up to +-255
with stealthChop
In this mode, the current is scaled by IHOLD
setting. Velocity based current regulation of
voltage PWM is not available in this mode. The
automatic voltage PWM current regulation will
work only for low stepper motor velocities.
dcStep is not available in this mode. coolStep
and stallGuard only can be used, when
additionally supplying a STEP signal. This will
also enable automatic current scaling.
±255
for both coils
5.4 dcStep Minimum Velocity Register
DCSTEP MINIMUM VELOCITY REGISTER (0X33)
R/W
Addr
n
Register
Description / bit names
W
0x33
23
VDCMIN
The automatic commutation dcStep becomes enabled by the
external signal DCEN. VDCMIN is used as the minimum step
velocity when the motor is heavily loaded.
Hint: Also set DCCTRL parameters in order to operate dcStep.
time reference t for VDCMIN: t = 2^24 / fCLK
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 30
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5.5 Motor Driver Registers
MICROSTEPPING CONTROL REGISTER SET (0X60…0X6B)
R/W
Addr
n
Register
Description / bit names
Range [Unit]
W
0x60
32
MSLUT[0]
microstep
table entries
0…31
Each bit gives the difference between entry x
and entry x+1 when combined with the cor-
responding MSLUTSEL W bits:
0: W= %00: -1
%01: +0
%10: +1
%11: +2
1: W= %00: +0
%01: +1
%10: +2
%11: +3
This is the differential coding for the first
quarter of a wave. Start values for CUR_A and
CUR_B are stored for MSCNT position 0 in
START_SIN and START_SIN90.
ofs31, ofs30, …, ofs01, ofs00
…
ofs255, ofs254, …, ofs225, ofs224
32x 0 or 1
reset default=
sine wave
table
W
0x61
…
0x67
7
x
32
MSLUT[1...7]
microstep
table entries
32…255
7x
32x 0 or 1
reset default=
sine wave
table
W
0x68
32
MSLUTSEL
This register defines four segments within
each quarter MSLUT wave. Four 2 bit entries
determine the meaning of a 0 and a 1 bit in
the corresponding segment of MSLUT.
See separate table!
0<X1<X2<X3
reset default=
sine wave
table
W
0x69
8
+
8
MSLUTSTART
bit 7… 0: START_SIN
bit 23… 16: START_SIN90
START_SIN gives the absolute current at
microstep table entry 0.
START_SIN90 gives the absolute current for
microstep table entry at positions 256.
Start values are transferred to the microstep
registers CUR_A and CUR_B, whenever the
reference position MSCNT=0 is passed.
START_SIN
reset default
=0
START_SIN 90
reset default
=247
R
0x6A
10
MSCNT
Microstep counter. Indicates actual position
in the microstep table for CUR_A. CUR_B uses
an offset of 256 (2 phase motor).
Hint: Move to a position where MSCNT is
zero before re-initializing MSLUTSTART or
MSLUT and MSLUTSEL.
0…1023
R
0x6B
9
+
9
MSCURACT
bit 8… 0: CUR_A (signed):
Actual microstep current for
motor phase A as read from
MSLUT (not scaled by current)
bit 24… 16: CUR_B (signed):
Actual microstep current for
motor phase B as read from
MSLUT (not scaled by current)
+/-0...255
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 31
www.trinamic.com
DRIVER REGISTER SET (0X6C…0X7F)
R/W
Addr
n
Register
Description / bit names
Range [Unit]
RW
0x6C
32
CHOPCONF
chopper and driver configuration
See separate table!
W
0x6D
25
COOLCONF
coolStep smart current control register
and stallGuard2 configuration
See separate table!
W
0x6E
24
DCCTRL
dcStep (DC) automatic commutation
configuration register (enable via pin DCEN
or via VDCMIN):
bit 9… 0: DC_TIME: Upper PWM on time
limit for commutation (DC_TIME *
1/fCLK). Set slightly above effective
blank time TBL.
bit 23… 16: DC_SG: Max. PWM on time for
step loss detection using dcStep
stallGuard2 in dcStep mode.
(DC_SG * 16/fCLK)
Set slightly higher than
DC_TIME/16
0=disable
Attention: Using a higher microstep
resolution or interpolated operation, dcStep
delivers a better stallGuard signal.
DC_SG is also available above VHIGH if
vhighfs is activated. For best result also set
vhighchm.
R
0x6F
32
DRV_
STATUS
stallGuard2 value and driver error flags
See separate table!
W
0x70
22
PWMCONF
Voltage PWM mode chopper configuration
See separate table!
reset default=
0x00050480
R
0x71
8
PWM_SCALE
Actual PWM amplitude scaler
(255=max. Voltage)
In voltage mode PWM, this value allows to
detect a motor stall.
0…255
W
0x72
2
ENCM_CTRL
Encoder mode configuration for a special
mode (enc_commutation), not for normal
use.
Bit 0: inv: Invert encoder inputs
Bit 1: maxspeed: Ignore Step input. If
set, the hold current IHOLD
determines the motor current,
unless a step source is activated.
The direction in this mode is determined by
the shaft bit in GCONF or by the inv bit.
R
0x73
20
LOST_STEPS
Number of input steps skipped due to higher
load in dcStep operation, if step input does
not stop when DC_OUT is low. This counter
wraps around after 2^20 steps. Counts up or
down depending on direction. Only with
SDMODE=1.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 32
www.trinamic.com
MICROSTEP TABLE CALCULATION FOR A SINE WAVE EQUIVALENT TO THE POWER ON DEFAULT



- i:[0… 255] is the table index
- The amplitude of the wave is 248. The resulting maximum positive value is 247 and the
maximum negative value is -248.
- The round function rounds values from 0.5 to 1.4999 to 1
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 33
www.trinamic.com
5.5.1 MSLUTSEL – Look up Table Segmentation Definition
0X68: MSLUTSEL – LOOK UP TABLE SEGMENTATION DEFINITION
Bit
Name
Function
Comment
31
X3
LUT segment 3 start
The sine wave look up table can be divided into up to
four segments using an individual step width control
entry Wx. The segment borders are selected by X1, X2
and X3.
Segment 0 goes from 0 to X1-1.
Segment 1 goes from X1 to X2-1.
Segment 2 goes from X2 to X3-1.
Segment 3 goes from X3 to 255.
For defined response the values shall satisfy:
0<X1<X2<X3
30
29
28
27
26
25
24
23
X2
LUT segment 2 start
22
21
20
19
18
17
16
15
X1
LUT segment 1 start
14
13
12
11
10
9
8
7
W3
LUT width select from
ofs(X3) to ofs255
Width control bit coding W0…W3:
%00: MSLUT entry 0, 1 select: -1, +0
%01: MSLUT entry 0, 1 select: +0, +1
%10: MSLUT entry 0, 1 select: +1, +2
%11: MSLUT entry 0, 1 select: +2, +3
6
5
W2
LUT width select from
ofs(X2) to ofs(X3-1)
4
3
W1
LUT width select from
ofs(X1) to ofs(X2-1)
2
1
W0
LUT width select from
ofs00 to ofs(X1-1)
0
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 34
www.trinamic.com
5.5.2 CHOPCONF – Chopper Configuration
0X6C: CHOPCONF – CHOPPER CONFIGURATION
Bit
Name
Function
Comment
31
-
-
Reserved, set to 0
30
diss2g
short to GND
protection disable
0: Short to GND protection is on
1: Short to GND protection is disabled
29
dedge
enable double edge
step pulses
1: Enable step impulse at each step edge to reduce step
frequency requirement.
28
intpol
interpolation to 256
microsteps
1: The actual microstep resolution (MRES) becomes
extrapolated to 256 microsteps for smoothest motor
operation.
27
mres3
MRES
micro step resolution
%0000:
Native 256 microstep setting.
26
mres2
25
mres1
24
mres0
%0001 … %1000:
128, 64, 32, 16, 8, 4, 2, FULLSTEP
Reduced microstep resolution for STEP/DIR operation.
The resolution gives the number of microstep entries per
sine quarter wave.
The driver automatically uses microstep positions which
result in a symmetrical wave, when choosing a lower
microstep resolution.
step width=2^MRES [microsteps]
23
sync3
SYNC
PWM synchronization
clock
This register allows synchronization of the chopper for
both phases of a two phase motor in order to avoid the
occurrence of a beat, especially at low motor velocities. It
is automatically switched off above VHIGH.
%0000: Chopper sync function chopSync off
%0001 … %1111:
Synchronization with fSYNC = fCLK/(sync*64)
Hint: Set TOFF to a low value, so that the chopper cycle is
ended, before the next sync clock pulse occurs. Set for the
double desired chopper frequency for chm=0, for the
desired base chopper frequency for chm=1.
22
sync2
21
sync1
20
sync0
19
vhighchm
high velocity chopper
mode
This bit enables switching to chm=1 and fd=0, when VHIGH
is exceeded. This way, a higher velocity can be achieved.
Can be combined with vhighfs=1. If set, the TOFF setting
automatically becomes doubled during high velocity
operation in order to avoid doubling of the chopper
frequency.
18
vhighfs
high velocity fullstep
selection
This bit enables switching to fullstep, when VHIGH is
exceeded. Switching takes place only at 45° position.
The fullstep target current uses the current value from
the microstep table at the 45° position.
17
vsense
sense resistor voltage
based current scaling
0: Low sensitivity, high sense resistor voltage
1: High sensitivity, low sense resistor voltage
16
tbl1
TBL
blank time select
%00 … %11:
Set comparator blank time to 16, 24, 36 or 54 clocks
Hint: %01 or %10 is recommended for most applications
15
tbl0
14
chm
chopper mode
0
Standard mode (spreadCycle)
1
Constant off time with fast decay time.
Fast decay time is also terminated when the
negative nominal current is reached. Fast decay is
after on time.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 35
www.trinamic.com
0X6C: CHOPCONF – CHOPPER CONFIGURATION
Bit
Name
Function
Comment
13
rndtf
random TOFF time
0
Chopper off time is fixed as set by TOFF
1
Random mode, TOFF is random modulated by
dNCLK= -12 … +3 clocks.
12
disfdcc
fast decay mode
chm=1:
disfdcc=1 disables current comparator usage for termi-
nation of the fast decay cycle
11
fd3
TFD [3]
chm=1:
MSB of fast decay time setting TFD
10
hend3
HEND
hysteresis low value
OFFSET
sine wave offset
chm=0
%0000 … %1111:
Hysteresis is -3, -2, -1, 0, 1, …, 12
(1/512 of this setting adds to current setting)
This is the hysteresis value which becomes
used for the hysteresis chopper.
9
hend2
8
hend1
7
hend0
chm=1
%0000 … %1111:
Offset is -3, -2, -1, 0, 1, …, 12
This is the sine wave offset and 1/512 of the
value becomes added to the absolute value
of each sine wave entry.
6
hstrt2
HSTRT
hysteresis start value
added to HEND
chm=0
%000 … %111:
Add 1, 2, …, 8 to hysteresis low value HEND
(1/512 of this setting adds to current setting)
Attention: Effective HEND+HSTRT ≤ 16.
Hint: Hysteresis decrement is done each 16
clocks
5
hstrt1
4
hstrt0
TFD [2..0]
fast decay time setting
chm=1
Fast decay time setting (MSB: fd3):
%0000 … %1111:
Fast decay time setting TFD with
NCLK= 32*TFD (%0000: slow decay only)
3
toff3
TOFF off time
and driver enable
Off time setting controls duration of slow decay phase
NCLK= 12 + 32*TOFF
%0000: Driver disable, all bridges off
%0001: 1 – use only with TBL ≥ 2
%0010 … %1111: 2 … 15
2
toff2
1
toff1
0
toff0
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 36
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5.5.3 COOLCONF – Smart Energy Control coolStep and stallGuard2
0X6D: COOLCONF – SMART ENERGY CONTROL COOLSTEP AND STALLGUARD2
Bit
Name
Function
Comment
…
-
reserved
set to 0
24
sfilt
stallGuard2 filter
enable
0
Standard mode, high time resolution for
stallGuard2
1
Filtered mode, stallGuard2 signal updated for each
four fullsteps (resp. six fullsteps for 3 phase motor)
only to compensate for motor pole tolerances
23
-
reserved
set to 0
22
sgt6
stallGuard2 threshold
value
This signed value controls stallGuard2 level for stall
output and sets the optimum measurement range for
readout. A lower value gives a higher sensitivity. Zero is
the starting value working with most motors.
-64 to +63: A higher value makes stallGuard2 less
sensitive and requires more torque to
indicate a stall.
21
sgt5
20
sgt4
19
sgt3
18
sgt2
17
sgt1
16
sgt0
15
seimin
minimum current for
smart current control
0: 1/2 of current setting (IRUN)
1: 1/4 of current setting (IRUN)
14
sedn1
current down step
speed
%00: For each 32 stallGuard2 values decrease by one
%01: For each 8 stallGuard2 values decrease by one
%10: For each 2 stallGuard2 values decrease by one
%11: For each stallGuard2 value decrease by one
13
sedn0
12
-
reserved
set to 0
11
semax3
stallGuard2 hysteresis
value for smart current
control
If the stallGuard2 result is equal to or above
(SEMIN+SEMAX+1)*32, the motor current becomes
decreased to save energy.
%0000 … %1111: 0 … 15
10
semax2
9
semax1
8
semax0
7
-
reserved
set to 0
6
seup1
current up step width
Current increment steps per measured stallGuard2 value
%00 … %11: 1, 2, 4, 8
5
seup0
4
-
reserved
set to 0
3
semin3
minimum stallGuard2
value for smart current
control and
smart current enable
If the stallGuard2 result falls below SEMIN*32, the motor
current becomes increased to reduce motor load angle.
%0000: smart current control coolStep off
%0001 … %1111: 1 … 15
2
semin2
1
semin1
0
semin0
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 37
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5.5.4 PWMCONF – Voltage PWM Mode stealthChop
0X70: PWMCONF – VOLTAGE MODE PWM STEALTHCHOP
Bit
Name
Function
Comment
…
-
reserved
set to 0
21
freewheel1
Allows different
standstill modes
Stand still option when motor current setting is zero
(I_HOLD=0).
%00: Normal operation
%01: Freewheeling
%10: Coil shorted using LS drivers
%11: Coil shorted using HS drivers
20
freewheel0
19
pwm_
symmetric
Force symmetric PWM
0
The PWM value may change within each PWM cycle
(standard mode)
1
A symmetric PWM cycle is enforced
18
pwm_
autoscale
PWM automatic
amplitude scaling
0
User defined PWM amplitude. The current settings
have no influence.
1
Enable automatic current control
Attention: When using a user defined sine wave
table, the amplitude of this sine wave table should
not be less than 244. Best results are obtained with
247 to 252 as peak values.
17
pwm_freq1
PWM frequency
selection
%00: fPWM=2/1024 fCLK
%01: fPWM=2/683 fCLK
%10: fPWM=2/512 fCLK
%11: fPWM=2/410 fCLK
16
pwm_freq0
15
PWM_
GRAD
User defined amplitude
(gradient)
or regulation loop
gradient
pwm_
autoscale=0
Velocity dependent gradient for PWM
amplitude:
PWM_GRAD * 256 / TSTEP
is added to PWM_AMPL
14
13
12
11
pwm_
autoscale=1
User defined maximum PWM amplitude
change per half wave (1 to 15)
10
9
8
7
PWM_
AMPL
User defined amplitude
(offset)
pwm_
autoscale=0
User defined PWM amplitude offset (0-255)
The resulting amplitude (limited to 0…255)
is:
PWM_AMPL + PWM_GRAD * 256 / TSTEP
6
5
4
3
pwm_
autoscale=1
User defined maximum PWM amplitude
when switching back from current chopper
mode to voltage PWM mode (switch over
velocity defined by TPWMTHRS). Do not set
too low values, as the regulation cannot
measure the current when the actual PWM
value goes below a setting specific value.
Settings above 0x40 recommended.
2
1
0
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 38
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5.5.5 DRV_STATUS – stallGuard2 Value and Driver Error Flags
0X6F: DRV_STATUS – STALLGUARD2 VALUE AND DRIVER ERROR FLAGS
Bit
Name
Function
Comment
31
stst
standstill indicator
This flag indicates motor stand still in each operation mode.
This occurs 2^20 clocks after the last step pulse.
30
olb
open load indicator
phase B
1: Open load detected on phase A or B.
Hint: This is just an informative flag. The driver takes no action
upon it. False detection may occur in fast motion and
standstill. Check during slow motion, only.
29
ola
open load indicator
phase A
28
s2gb
short to ground
indicator phase B
1: Short to GND detected on phase A or B. The driver becomes
disabled. The flags stay active, until the driver is disabled by
software (TOFF=0) or by the ENN input.
27
s2ga
short to ground
indicator phase A
26
otpw
overtemperature pre-
warning flag
1: Overtemperature pre-warning threshold is exceeded.
The overtemperature pre-warning flag is common for both
bridges.
25
ot
overtemperature flag
1: Overtemperature limit has been reached. Drivers become
disabled until otpw is also cleared due to cooling down of the
IC.
The overtemperature flag is common for both bridges.
24
stallGuard
stallGuard2 status
1: Motor stall detected (SG_RESULT=0) or dcStep stall in dcStep
mode.
23
-
reserved
Ignore these bits
22
21
20
CS
ACTUAL
actual motor current /
smart energy current
Actual current control scaling, for monitoring smart energy
current scaling controlled via settings in register COOLCONF, or
for monitoring the function of the automatic current scaling.
19
18
17
16
15
fsactive
full step active
indicator
1: Indicates that the driver has switched to fullstep as defined
by chopper mode settings and velocity thresholds.
14
-
reserved
Ignore these bits
13
12
11
10
9
SG_
RESULT
stallGuard2 result
respectively PWM on
time for coil A in stand
still for motor
temperature detection
Mechanical load measurement:
The stallGuard2 result gives a means to measure mechanical
motor load. A higher value means lower mechanical load. A
value of 0 signals highest load. With optimum SGT setting,
this is an indicator for a motor stall. The stall detection
compares SG_RESULT to 0 in order to detect a stall. SG_RESULT
is used as a base for coolStep operation, by comparing it to a
programmable upper and a lower limit. It is not applicable in
stealthChop mode.
SG_RESULT is ALSO applicable when dcStep is active.
stallGuard2 works best with microstep operation.
Temperature measurement:
In standstill, no stallGuard2 result can be obtained. SG_RESULT
shows the chopper on-time for motor coil A instead. If the
motor is moved to a determined microstep position at a
certain current setting, a comparison of the chopper on-time
can help to get a rough estimation of motor temperature. As
the motor heats up, its coil resistance rises and the chopper
on-time increases.
8
7
6
5
4
3
2
1
0
Farr! n
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 39
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6 stealthChop™
stealthChop is an extremely quiet mode of operation for stepper motors. It is based on a
voltage mode PWM. In case of standstill and at low velocities, the motor is absolutely
noiseless. Thus, stealthChop operated stepper motor applications are very suitable for
indoor or home use. The motor operates absolutely free of vibration at low velocities.
With stealthChop, the motor current is applied by driving a certain effective voltage into
the coil, using a voltage mode PWM. There are no more configurations required except for the PWM
voltage regulator response to a change of motor current. Two algorithms are provided, a manual and
an automatic mode.
Figure 6.1 Motor coil sine wave current with stealthChop (measured with current probe)
6.1 Two Modes for Current Regulation
In order to match the motor current to a certain level, the stealthChop PWM voltage must be scaled
depending on the actual motor velocity. Several additional factors influence the required voltage level
to drive the motor at the target current: The motor resistance, its back EMF (i.e. directly proportional
to its velocity) as well as actual level of the supply voltage. For the ease of use, two modes of PWM
regulation are provided: An automatic mode using current feedback (pwm_autoscale = 1) and a feed
forward velocity controlled mode (pwm_autoscale = 0). The feed forward velocity controlled mode will
not react to a change of the supply voltage or to events like a motor stall, but it provides very stable
amplitude. It does not use nor require any means of current measurement. This is perfect when
motor type and supply voltage are well known. Since this mode does not measure the actual current,
it will not respond to modification of the current setting, like stand still current reduction. Therefore
we recommend the automatic mode, unless current regulation is not satisfying in the given operating
conditions.
The PWM frequency can be chosen in a range in four steps in order to adapt the frequency divider to
the frequency of the clock source. A setting in the range of 30-50kHz is good for many applications. It
balances low current ripple and good higher velocity performance vs. dynamic power dissipation.
CHOICE OF PWM FREQUENCY FOR STEALTHCHOP
Clock frequency
fCLK
PWM_FREQ=%00
fPWM=2/1024 fCLK
PWM_FREQ=%01
fPWM=2/683 fCLK
PWM_FREQ=%10
fPWM=2/512 fCLK
PWM_FREQ=%11
fPWM=2/410 fCLK
18MHz
35.2kHz
52.7kHz
70.3kHz
87.8kHz
16MHz
31.3kHz
46.9kHz
62.5kHz
78.0kHz
(internal)
26kHz
38kHz
52kHz
64kHz
12MHz
23.4kHz
35.1kHz
46.9kHz
58.5kHz
10MHz
19.5kHz
29.3kHz
39.1kHz
48.8kHz
8MHz
15.6kHz
23.4kHz
31.2kHz
39.0kHz
Table 6.1 Choice of PWM frequency – green: recommended
WWWWW WlW WWWWWW WWWW’W MW WWWWW WWWWWWWWWWWW WW 7 WWW WWWWWWWW WWW W WWWW WWWWWW WWWWWW WWWWW WWWWWWWWWWW . .WWWWWWWWWW WWWWW WWWWW WWWWWW WWWWWW W WWW WWWWWWWWWWWWWWWW WWWWW WWWWWWWWWWWW WWW WW WWWWWW WWWWWWWWWWWWW’ WWW . WWW WW W W WWWWW WWWWWW W
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 40
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6.2 Automatic Scaling
In stealthChop voltage PWM mode, the autoscaling function (pwm_autoscale = 1) regulates the motor
current to the desired current setting. The driver measures the motor current during the chopper on
time and uses a proportional regulator to regulate the PWM_SCALE in order match the motor current
to the target current. PWM_GRAD is the proportionality coefficient for this regulator. Basically, the
proportionality coefficient should be as small as possible in order to get a stable and soft regulation
behavior, but it must be large enough to allow the driver to quickly react to changes caused by
variation of the motor target current, the motor velocity or effects resulting from changes of the
supply voltage. As the supply voltage level and motor temperature normally change only slowly, a
minimum setting of the regulation gradient often is sufficient (PWM_GRAD=1). If stealthChop
operation is desired for a higher velocity range, variations of the motor back EMF caused by motor
acceleration and deceleration may require a quicker regulation. Therefore, PWM_GRAD setting should
be optimized for the fastest required acceleration and deceleration ramp (see Figure 6.4). The quality
of a given setting can be examined when monitoring PWM_SCALE and motor velocity. Just as in the
acceleration phase, during a deceleration phase the voltage PWM amplitude must be adapted in order
to keep the motor coil current constant. When the upper acceleration and the upper deceleration used
in the application are identical, the value determined for the acceleration phase will already be
optimum for both.
Figure 6.2 Scope shot: good setting for PWM_GRAD
Figure 6.3 Scope shot: too small setting for PWM_GRAD
m m n m
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 41
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Velocity
Time
Stand still
PWM scale
PWM reaches
max. amplitude
255
0
Motor current
Nominal current
(sine wave RMS)
RMS current
constant
0
PWM scale
Current may drop due
to high velocity
Velocity
Time
Stand still
PWM scale
255
0
Motor current
Nominal current
(sine wave RMS)
0
PWM scale
PWM_GRAD too small
PWM_GRAD ok
Current drops due to
too small PWM_GRAD
Current overshoots
due to too small
PWM_GRAD
PWM_GRAD ok
Setting for PWM_GRAD ok.
Setting for PWM_GRAD slightly too small.
Figure 6.4 Good and too small setting for PWM_GRAD
Be sure to use a symmetrical sense resistor layout and sense resistor traces of identical length and
well matching sense resistors for best performance.
Quick Start
For a quick start, see the Quick Configuration Guide in chapter 22.
6.2.1 Lower Current Limit
The stealthChop current regulator imposes a lower limit for motor current regulation. As the coil
current can be measured in the shunt resistor during chopper on phase only, a minimum chopper
duty cycle allowing coil current regulation is given by the blank time as set by TBL and by the
chopper frequency setting. Therefore, the motor specific minimum coil current in stealthChop
autoscaling mode rises with the supply voltage and with the chopper frequency. A lower blanking
time allows a lower current limit. Extremely low currents (e.g. for standstill power down) can be
realized with the non-automatic current scaling or with the freewheeling option, only. The run current
setting needs to be kept above the lower limit: In case the PWM_SCALE drops to a too low value, e.g.
because the current scale was too low, the regulator may not be able to recover. The regulator will
recover once the motor is in standstill. The freewheeling option allows going to zero motor current.
The lower motor coil current limit can be calculated from motor parameters and chopper settings:
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 42
www.trinamic.com
 

With VM the motor supply voltage and RCOIL the motor coil resistance.
ILower Limit can be treated as a thumb value for the minimum possible motor current setting.
EXAMPLE:
A motor has a coil resistance of 5Ω, the supply voltage is 24V. With TBL=%01 and PWM_FREQ=%00,
tBLANK is 24 clock cycles, fPWM is 2/(1024 clock cycles):
 

 

 
This means, the motor target current must be 225mA or more, taking into account all relevant
settings. This lower current limit also applies for modification of the motor current via the analog
input VREF.
For pwm_autoscale mode, a lower coil current limit applies. This limit can be calculated or measured
using a current probe. Keep the motor run-current setting IRUN well above this lower current limit.
6.2.2 Acceleration
In automatic current regulation mode (pwm_autoscale = 1), the PWM_GRAD setting should be
optimized for the fastest required acceleration ramp. Use a current probe and check the motor current
during (quick) acceleration. A setting of 1 may result in a too slow regulation, while a setting of 15
responds quickly to velocity changes, but might produce regulation instabilities in some
constellations. A setting of 4 is a good starting value.
Hint
Operate the motor within your application when exploring stealthChop. Motor performance often is
better with a mechanical load, because it prevents the motor from stalling due mechanical oscillations
which can occur without load.
6.3 Velocity Based Scaling
Velocity based scaling scales the stealthChop amplitude based on the time between each two steps,
i.e. based on TSTEP, measured in clock cycles. This concept basically does not require a current
measurement, because no regulation loop is necessary. The idea is a linear approximation of the
voltage required to drive the target current into the motor. The stepper motor has a certain coil
resistance and thus needs a certain voltage amplitude to yield a target current based on the basic
formula I=U/R. With R being the coil resistance, U the supply voltage scaled by the PWM value, the
current I results. The initial value for PWM_AMPL can be calculated:

With VM the motor supply voltage and ICOIL the target RMS current
The effective PWM voltage UPWM (1/SQRT(2) x peak value) results considering the 8 bit resolution and
248 sine wave peak for the actual PWM amplitude shown as PWM_SCALE:
 
 



TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 43
www.trinamic.com
With rising motor velocity, the motor generates an increasing back EMF voltage. The back EMF voltage
is proportional to the motor velocity. It reduces the PWM voltage effective at the coil resistance and
thus current decreases. The TMC2130 provides a second velocity dependent factor (PWM_GRAD) to
compensate for this. The overall effective PWM amplitude (PWM_SCALE) in this mode automatically is
calculated in dependence of the microstep frequency as:


With fSTEP being the microstep frequency for 256 microstep resolution equivalent
and fCLK the clock frequency supplied to the driver or the actual internal frequency
As a first approximation, the back EMF subtracts from the supply voltage and thus the effective current
amplitude decreases. This way, a first approximation for PWM_GRAD setting can be calculated:




CBEMF is the back EMF constant of the motor in Volts per radian/second
MSPR is the number of microsteps per rotation, e.g. 51200 = 256µsteps multiplied by 200 fullsteps for
a 1.8° motor.
PWM scaling
(PWM_STATUS)
Velocity
PWM_AMPL
PWM reaches
max. amplitude
255
0
PWM_GRAD
Motor current
Nominal current
(e.g. sine wave RMS)
Current drops
(depends on
motor load)
Constant motor
RMS current
0
VPWMMAX
Figure 6.5 Velocity based PWM scaling (pwm_autoscale=0)
Hint
The values for PWM_AMPL and PWM_GRAD can easily be optimized by tracing the motor current with
a current probe on the oscilloscope. It is not even necessary to calculate the formulas if you carefully
start with a low setting for both.
UNDERSTANDING THE BACK EMF CONSTANT OF A MOTOR
The back EMF constant is the voltage a motor generates when turned with a certain velocity. Often
motor datasheets do not specify this value, as it can be deducted from motor torque and coil current
rating. Within SI units, the numeric value of the back EMF constant CBEMF has the same numeric value
as the numeric value of the torque constant. For example, a motor with a torque constant of 1 Nm/A
would have a CBEMF of 1V/rad/s. Turning such a motor with 1 rps (1 rps = 1 revolution per second =
6.28 rad/s) generates a back EMF voltage of 6.28V. Thus, the back EMF constant can be calculated as:
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 44
www.trinamic.com



ICOILNOM is the motor’s rated phase current for the specified holding torque
HoldingTorque is the motor specific holding torque, i.e. the torque reached at ICOILNOM on both coils.
The torque unit is [Nm] where 1Nm = 100Ncm = 1000mNm.
The voltage is valid as RMS voltage per coil, thus the nominal current is multiplied by 2 in this
formula, since the nominal current assumes a full step position, with two coils operating.
6.4 Combining stealthChop and spreadCycle
For applications requiring high velocity motion, spreadCycle may bring more stable operation in the
upper velocity range. To combine no-noise operation with highest dynamic performance, combine
stealthChop and spreadCycle based on a velocity threshold (TPWMTHRS). With this, stealthChop is only
active at low velocities.
As a first step, both chopper principles should be parameterized and optimized individually. In a next
step, a transfer velocity has to be fixed. For example, stealthChop operation is used for precise low
speed positioning, while spreadCycle shall be used for highly dynamic motion. TPWMTHRS determines
the transition velocity. Use a low transfer velocity to avoid a jerk at the switching point.
A jerk occurs when switching at higher velocities, because the back-EMF of the motor (which rises
with the velocity) causes a phase shift of up to 90° between motor voltage and motor current. So
when switching at higher velocities between voltage PWM and current PWM mode, this jerk will occur
with increased intensity. A high jerk may even produce a temporary overcurrent condition (depending
on the motor coil resistance). At low velocities (e.g. 1 to a few 10 RPM), it can be completely
neglected for most motors. Therefore, consider the switching jerk when choosing TPWMTHRS. Set
TPWMTHRS zero if you want to work with stealthChop only.
When enabling the stealthChop mode the first time using automatic current regulation, the motor
must be at stand still in order to allow a proper current regulation. When the drive switches to a
different chopper mode at a higher velocity, stealthChop logic stores the last current regulation
setting until the motor returns to a lower velocity again. This way, the regulation has a known
starting point when returning to a lower velocity, where stealthChop becomes re-enabled. Therefore,
neither the velocity threshold nor the supply voltage must be considerably changed during the phase
while the chopper is switched to a different mode, because otherwise the motor might lose steps or
the instantaneous current might be too high or too low.
A motor stall or a sudden change in the motor velocity may lead to the driver detecting a short
circuit or to a state of automatic current regulation, from which it cannot recover. Clear the error flags
and restart the motor from zero velocity to recover from this situation.
Hint
Start the motor from standstill when switching on stealthChop the first time and keep it stopped for
at least 128 chopper periods to allow stealthChop to do initial standstill current control.
6.4.1 PWM_AMPL limits Jerk
When combining stealthChop with spreadCycle or constant off time classic PWM, a switching velocity
can be chosen using TPWMTHRS. With this, stealthChop is only active at low velocities. Often, a very
low velocity in the range of 1 to a few 10 RPM fits best. In case a high switching velocity is chosen,
special care should be taken for switching back to stealthChop during deceleration, because the phase
jerk can produce a short time overcurrent.
To avoid a short time overcurrent and to minimize the jerk, the initial amplitude for switching back to
stealthChop at sinking velocity can be determined using the setting PWM_AMPL. Tune PWM_AMPL to a
value which gives a smooth and safe transition back to stealthChop within the application. As a
thumb rule, ½ to ¾ of the last PWM_SCALE value which was valid after the switching event at rising
velocity can be used. For high resistive steppers as well as for low transfer velocities (as set by
TPWMTHRS), set PWM_AMPL to 255 as most universal setting.
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 45
www.trinamic.com
Hint
In case the automatic scaling regulation is instable at your desired motion velocity, try modifying the
chopper frequency divider PWM_FREQ. Also adapt the blank time TBL and motor current for best
result.
6.5 Flags in stealthChop
As stealthChop uses voltage mode driving, status flags based on current measurement respond
slower, respectively the driver reacts delayed to sudden changes of back EMF, like on a motor stall.
A motor stall can lead to an overcurrent condition. Depending on the previous motor velocity, and on
the coil resistance of the motor, it may trigger the overcurrent detection. With low velocities, where
the back EMF is just a fraction of the supply voltage, there is no danger of triggering the short
detection.
6.5.1 Open Load Flags
In stealthChop mode, status information is different from the cycle-by-cycle regulated chopper modes.
OLA and OLB show if the current regulation sees that the nominal current can be reached on both
coils.
- A flickering OLA or OLB can result from asymmetries in the sense resistors or in the motor
coils.
- An interrupted motor coil leads to a continuously active open load flag for the coil.
- One or both flags are active, if the current regulation did not succeed in scaling up to the full
target current within the last few fullsteps (because no motor is attached or a high velocity
exceeds the PWM limit).
If desired, do an on-demand open load test using the spreadCycle chopper, as it delivers the safest
result. With stealthChop, PWM_SCALE can be checked to detect the correct coil resistance.
6.5.2 PWM_SCALE Informs about the Motor State
Information about the motor state is available with automatic scaling by reading out PWM_SCALE. As
this parameter reflects the actual voltage required to drive the target current into the motor, it
depends on several factors: motor load, coil resistance, supply voltage, and current setting. Therefore,
an evaluation of the PWM_SCALE value allows seeing the motor load (similar to stallGuard2) and
finding out if the target current can be reached. It even gives an idea on the motor temperature
(evaluate at a well-known state of operation).
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 46
www.trinamic.com
6.6 Freewheeling and Passive Motor Braking
stealthChop provides different options for motor standstill. These options can be enabled by setting
the standstill current IHOLD to zero and choosing the desired option using the FREEWHEEL setting.
The desired option becomes enabled after a time period specified by TPOWERDOWN and
IHOLD_DELAY. The PWM_SCALE regulation becomes frozen once the motor target current is at zero
current in order to ensure a quick startup.
Parameter
Description
Setting
Comment
en_pwm_
mode
General enable for use of stealthChop (register
GCONF)
0
Do not use stealthChop
1
stealthChop enabled
TPWMTHRS
Specifies the upper velocity for operation in
stealthChop voltage PWM mode. Entry the TSTEP
reading (time between two microsteps) when
operating at the desired threshold velocity.
0 …
1048575
stealthChop also is
disabled if TSTEP falls
below TCOOLTHRS or
THIGH
pwm_
autoscale
Enable automatic current scaling using current
measurement or use forward controlled velocity
based mode.
0
Forward controlled mode
1
Automatic scaling with
current regulator
PWM_FREQ
PWM frequency selection. Use the lowest setting
giving good results. The frequency measured at
each of the chopper outputs is half of the
effective chopper frequency fPWM.
0
fPWM=2/1024 fCLK
1
fPWM=2/683 fCLK
2
fPWM=2/512 fCLK
3
fPWM=2/410 fCLK
PWM_GRAD
User defined PWM amplitude (gradient) for
velocity based scaling or regulation loop gradient
when pwm_autoscale=1.
1 … 15
With pwm_autoscale=1
0 … 255
With pwm_autoscale=0
PWM_AMPL
User defined PWM amplitude (offset) for velocity
based scaling or amplitude limit for re-entry into
stealthChop mode when pwm_autoscale=1.
0 … 255
pwm_
symmetric
Activate to force a symmetric PWM for each cycle.
Reduces the number of updates to the PWM cycle.
Special use only.
0
Normal operation
1
A symmetric PWM cycle
is enforced
FREEWHEEL
Stand still option when motor current setting is
zero (I_HOLD=0). Only available with stealthChop
enabled. The freewheeling option makes the
motor easy movable, while both coil short options
realize a passive brake. Mode 2 will brake more
intensely than mode 3, because low side drivers
(LS) have lower resistance than high side drivers.
0
Normal operation
1
Freewheeling
2
Coil shorted using LS
drivers
3
Coil shorted using HS
drivers
PWM_SCALE
Read back of the actual stealthChop voltage PWM
scaling as determined by the current regulation.
Can be used to detect motor load and stall when
autoscale=1.
0 … 255
(read
only)
The scaling value
becomes frozen when
operating in a different
chopper mode
TOFF
General enable for the motor driver, the actual
value does not influence stealthChop
0
Driver off
1 … 15
Driver enabled
TBL
Comparator blank time. This time needs to safely
cover the switching event and the duration of the
ringing on the sense resistor. Choose a setting of
1 or 2 for typical applications. For higher
capacitive loads, 3 may be required. Lower
settings allow stealthChop to regulate down to
lower coil current values.
0
16 tCLK
1
24 tCLK
2
36 tCLK
3
54 tCLK
IRUN
IHOLD
Run and hold current setting for stealth Chop
operation – only used with pwm_autoscale=1
See chapter on current
setting for details
TMC2130 DATASHEET (Rev. 1.10 / 2018-MAY-09) 47
www.trinamic.com
7 spreadCycle and Classic Chopper
While stealthChop is a voltage mode PWM controlled chopper, spreadCycle is a cycle-by-cycle current
control. Therefore, it can react extremely fast to changes in motor velocity or motor load. The currents
through both motor coils are controlled using choppers. The choppers work independently of each
other. In Figure 7.1 the different chopper phases are shown.
RSENSE
ICOIL
On Phase:
current flows in
direction of target
current
RSENSE
ICOIL
Fast Decay Phase:
current flows in
opposite direction
of target current
RSENSE
ICOIL
Slow Decay Phase:
current re-circulation
+VM+VM+VM
Figure 7.1 Chopper phases
Although the current could be regulated using only on phases and fast decay phases, insertion of the
slow decay phase is important to reduce electrical losses and current ripple in the motor. The
duration of the slow decay phase is specified in a control parameter and sets an upper limit on the
chopper frequency. The current comparator can measure coil current during phases when the current
flows through the sense resistor, but not during the slow decay phase, so the slow decay phase is
terminated by a timer. The on phase is terminated by the comparator when the current through the
coil reaches the target current. The fast decay phase may be terminated by either the comparator or
another timer.
When the coil current is switched, spikes at the sense resistors occur due to charging and discharging
parasitic capacitances. During this time, typically one or two microseconds, the current cannot be
measured. Blanking is the time when the input to the comparator is masked to block these spikes.
There are two cycle-by-cycle chopper modes available: a new high-performance chopper algorithm
called spreadCycle and a proven constant off-time chopper mode. The constant off-time mode cycles
through three phases: on, fast decay, and slow decay. The spreadCycle mode cycles through four
phases: on, slow decay, fast decay, and a second slow decay.
The chopper frequency is an important parameter for a chopped motor driver. A too low frequency
might generate audible noise. A higher frequency reduces current ripple in the motor, but with a too
high frequency magnetic losses may rise. Also power dissipation in the driver rises with increasing
frequency due to the increased influence of switching slopes causing dynamic dissipation. Therefore, a
compromise needs to be found. Most motors are optimally working in a frequency range of 16 kHz to
30 kHz. The chopper frequency is influenced by a number of parameter settings as well as by the
motor inductivity and supply voltage.
Hint
A chopper frequency in the range of 16 kHz to 30 kHz gives a good result for most motors