DSC1101/21 Datasheet by Microchip Technology

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MICROCHIP DSC1101/21 Pin 1 Ename Pm 2 Pm 3 GND Temp Sensor & Cumvensahon 0mm J MtM: Oscmator 7 PLL 7 Ulwder Drwer
2017 Microchip Technology Inc. DS20005613B-page 1
DSC1101/21
Features
Low RMS Phase Jitter: <1 ps (typ.)
High Stability: ±10 ppm, ±20 ppm, ±25 ppm,
±50 ppm
Wide Temperature Range:
- Automotive: –55°C to +125°C
- Ext. Industrial: –40°C to +105°C
- Industrial: –40°C to +85°C
- Commercial: –20°C to +70°C
High Supply Noise Rejection: –50 dBc
Wide Freq. Range: 2.3 MHz to 170 MHz
Small Industry Standard Footprints
- 2.5 mm x 2.0 mm, 3.2 mm x 2.5 mm, 5.0 mm
x 3.2 mm, and 7.0 mm x 5.0 mm
Excellent Shock and Vibration Immunity
- Qualified to MIL-STD-883
High Reliability
- 20x Better MTF than Quartz Oscillators
Low Current Consumption
Supply Range of 2.25 to 3.6V
Standby and Output Enable Function
Lead-Free and RoHS Compliant
Applications
Storage Area Networks
- SATA, SAS, Fibre Channel
Passive Optical Networks
- EPON, 10G-EPON,V GPON, 10G-PON
• Ethernet
- 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video and Surveillance
PCI Express
Display Port
General Description
The DSC1101 and DSC1121 series of high
performance oscillators utilize a proven silicon MEMS
technology to provide excellent jitter and stability over
a wide range of supply voltages and temperatures. By
eliminating the need for quartz or SAW technology,
MEMS oscillators significantly enhance reliability and
accelerate product development, while meeting
stringent clock performance criteria for a variety of
communications, storage, and networking applications.
DSC1101 has a standby feature that allows it to
completely power-down when EN pin is pulled low;
whereas for DSC1121, only the outputs are disabled
when EN is low. Both oscillators are available in
industry standard packages, including the small
2.5 mm x 2.0 mm, and are “drop-in” replacements for
standard 4-pin CMOS quartz crystal oscillators.
Functional Block Diagram
Low-Jitter Precision CMOS Oscillator
A ‘su V‘H SXVDD VOH 0 ngDD
DSC1101/21
DS20005613B-page 2 2017 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Input Voltage, VIN ..............................................................................................................................–0.3V to VDD + 0.3V
Supply Voltage .......................................................................................................................................... –0.3V to +4.0V
ESD Protection On All Pins ...........................................................................................4000V HBM, 1500V CDM (max.)
Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Note: 1000+ years of data retention on internal memory.
TABLE 1-1: DC CHARACTERISTICS
Electrical Characteristics
Parameters Sym. Min. Typ. Max. Units Conditions
Supply Voltage (Note 1)V
DD 2.25 3.6 V —
Supply Current IDD
— 0.095
mA
DSC1101, EN pin low, output
is disabled
—2022 DSC1121, EN pin low, output
is disabled
—3135 Output enabled, CL = 15 pF,
F0 = 100 MHz
Frequency Stability
(Including frequency
variations due to initial
tolerance, temp. and
power supply voltage.)
f
——±10
ppm
Ext Comm. & Ind. only
±20 All temp ranges
±25 All temp ranges
±50 All temp ranges
Aging f ±5 ppm 1 year @ 25°C
Startup Time (Note 2)t
SU 5 ms T = 25°C
Input Logic Levels
Input Logic High
Input Logic Low
VIH 0.75VDD ——
V—
VIL ——0.1VDD
Output Disable Time
(Note 3)tDS ——5 ns
Output Enable Time tEN
5 ms DSC1101
20 ns DSC1121
Enable Pull-up Resistor
(Note 4)——40kPull-up Resistor Exist
CMOS Output
Output Logic Levels
Output Logic High
Output Logic Low
VOH 0.9VDD ——
VI = ±6 mA
VOL ——0.1VDD
Note 1: Pin 6 VDD should be filtered with 0.1 µF capacitor.
2: tSU is time to 100 ppm of output frequency after VDD is applied and outputs are enabled.
3: Output Waveform and Test Circuit figures define the parameters.
4: Output is enabled if pad is floated or not connected.
PER RMS OUT
2017 Microchip Technology Inc. DS20005613B-page 3
DSC1101/21
Output Transition Time
Rise Time
Fall Time
tR—1.12
ns 20% to 80%
CL = 15 pF
tF—1.32
Frequency f0
2.3 — 170
MHz
CL = 15 pF, –20°C to +70°C
and –40°C to +85°C
3.3 — 170 CL = 15 pF, –40°C to +105°C
and –55°C to +125°C
Output Duty Cycle SYM 45 55 %
Period Jitter JPER —3ps
RMS FOUT = 125 MHz
Integrated Phase Noise JPH
—0.3
psRMS
200 kHz to 20 MHz @ 125 MHz
0.38 100 kHz to 20 MHz @ 125 MHz
1.7 2 12 kHz to 20 MHz @ 125 MHz
TABLE 1-1: DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: Pin 6 VDD should be filtered with 0.1 µF capacitor.
2: tSU is time to 100 ppm of output frequency after VDD is applied and outputs are enabled.
3: Output Waveform and Test Circuit figures define the parameters.
4: Output is enabled if pad is floated or not connected.
DSC1101/21
DS20005613B-page 4 2017 Microchip Technology Inc.
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Operating Temperature Range (T)
TA–20 +70 °C Ordering Option E
TA–40 +85 °C Ordering Option I
TA–40 +105 °C Ordering Option L
TA–55 +125 °C Ordering Option M
Junction Operating Temperature TJ +150 °C —
Storage Temperature Range TA–40 +150 °C —
Soldering Temperature Range TS +260 °C 40 sec. max
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
Pm. er (p. RMS) 2m m m um um Lmadafiinjaim BW kazIn 20 m1 RIJ-cflan (dac)
2017 Microchip Technology Inc. DS20005613B-page 5
DSC1101/21
2.0 NOMINAL PERFORMANCE CURVES
FIGURE 2-1: Phase Jitter (Integrated
Phase Noise).
FIGURE 2-2: Power Supply Rejection
Ratio.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
DSC1101/21
DS20005613B-page 6 2017 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1. Pin order and descriptions apply across all package types.
TABLE 3-1: PIN FUNCTION TABLE
Pin Number
7x5 w/ Pad Pin Number
7x5 w/o Pad Pin Number
5x3.2 Pin Number
3.2x2.5 Pin Number
2x2.5 Pin Name Description
11111ENEnable.
22222NCDo not connect.
33333GNDGround.
44444OUTOutput.
55555NCDo not connect.
66666V
DD Supply voltage.
PAD————PADTie to ground.
TABLE 3-2: OUTPUT ENABLE MODES
EN Pin DSC1101 DSC1121
High Output Active Output Active
NC Output Active Output Active
Low Standby Output Disabled
ML ‘H T?
2017 Microchip Technology Inc. DS20005613B-page 7
DSC1101/21
4.0 OUTPUT WAVEFORM
FIGURE 4-1: DSC1101/21 Output Waveform.
VOH
VOL
VIL
1/fo
OUTPUT
ENABLE
tDA
tEN
tF
tR
VIH
$01UF EFT 31 mm TL CL CMOS load i capacnance
DSC1101/21
DS20005613B-page 8 2017 Microchip Technology Inc.
5.0 TYPICAL TERMINATION SCHEME
FIGURE 5-1: Typical Termination Scheme for DSC1101/21.
2017 Microchip Technology Inc. DS20005613B-page 9
DSC1101/21
6.0 BOARD LAYOUT (RECOMMENDED)
FIGURE 6-1: DSC1101/21 Recommended Board Layout.
1
34
6
5
2
4
5
2
3
6
Via to GND layer
Via to GND layer
Supply bypass
capacitor
Temperature [‘C) 260°C 217°C 2m°C 150°C Time
DSC1101/21
DS20005613B-page 10 2017 Microchip Technology Inc.
7.0 SOLDER REFLOW PROFILE
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec. Max.
Preheat Time 150°C to 200°C 60-180 Sec.
Time Maintained Above 217°C 60-150 Sec.
Peak Temperature 255-260°C
Time within 5°C of Actual Peak 20-40 Sec.
Ramp-Down Rate 6°C/Sec. Max.
Time 25°C to Peak Temperature 8 minute Max.
SSS
2017 Microchip Technology Inc. DS20005613B-page 11
DSC1101/21
8.0 PACKAGING INFORMATION
8.1 Package Marking Information
Example
6-Pin CDFN/VDFN*
XXXXXXX
0SSS
DCPYYWW
0750000
0421
DCP1723
Legend: XX...X Product code, customer-specific information, or frequency in MHz
without printed decimal point
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
SSS Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
, , Pin one index is identified by a dot, delta up, or delta down (triangle
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar () symbol may not be to scale.
3
e
3
e
//o¢oc E-l o.10® c A‘E‘ 005@ c SIDE VIEW E-C
DSC1101/21
DS20005613B-page 12 2017 Microchip Technology Inc.
6-Lead VDFN 2.5 mm x 2.0 mm Package Outline and Recommended Land Pattern
B
A
0.05 C
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
1
N
2X TOP VIEW
SIDE VIEW
NOTE 1
0.10 C
0.08 C
Microchip Technology Drawing C04-1005A Sheet 1 of 2
2X
6X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
D
E
A
A1
0.10 C A B
0.05 C
BOTTOM VIEW
12
N
2X b2
4X b1
5X L1
L2
e
2
Termmal Len «h L1 0 50 0 70 u as Termmal Len «h L2 0 655 u 755 0 865
2017 Microchip Technology Inc. DS20005613B-page 13
DSC1101/21
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Microchip Technology Drawing C04-1005A Sheet 2 of 2
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Pitch
Standoff
Units
Dimension Limits
A1
A
b1
e
L2
E
N
0.825 BSC
0.665
0.60
0.80
0.00
0.65
0.765
0.85
0.02
2.00 BSC
MILLIMETERS
MIN NOM
6
0.865
0.70
0.90
0.05
MAX
Overall Length D 2.50 BSC
Terminal Length L1 0.60 0.70 0.80
Terminal Width b2 0.20 0.25 0.30
Contacl Push Contacl Pad Wuum x4 Contacl Pad Wuum x2 Between Contacts X3 M o 825 ESC
DSC1101/21
DS20005613B-page 14 2017 Microchip Technology Inc.
RECOMMENDED LAND PATTERN
Dimension Limits
Units
C
Contact Pad Width (X4)
Contact Pad Spacing
Contact Pad Width (X2)
Contact Pitch
X2
X1
0.25
0.65
MILLIMETERS
0.825 BSC
MIN
E
MAX
1.45
Space Between Contacts (X3)
Space Between Contacts (X4)
G2
G1
0.60
0.38
Microchip Technology Drawing C04-3005A
NOM
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
12
6
YContact Pad Length (X6) 0.85
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M
For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
1.
2.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
C
E
X1
X2
Y
G1
G2
SILK SCREEN
El [3 fizz/ff " E Q 0.05 c //////‘ E0115 0 $ W F * cos c 1 SIDEVIEW 5’ I 1—. f ‘— N0151\;g\§$\§] L ,g,¥L\ ,i,,, im 61 C U ”1 L « LEM 0.0709 c A‘Bl 6’ o.o5® c BOTTOM VIEW
2017 Microchip Technology Inc. DS20005613B-page 15
DSC1101/21
6-Lead VDFN 3.2 mm x 2.5 mm Package Outline and Recommended Land Pattern
B
A
0.05 C
0.05 C
0.07 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C
0.08 C
Microchip Technology Drawing C04-1007A Sheet 1 of 2
2X
6X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
D
E
e
2X b2
4X b1
L
L1
A
A1
m m m e T
DSC1101/21
DS20005613B-page 16 2017 Microchip Technology Inc.
Microchip Technology Drawing C04-1007A Sheet 2 of 2
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Terminal Width
Pitch
Standoff
Units
Dimension Limits
A1
A
b2
b1
e
L
E
N
1.05 BSC
0.85
0.65
0.45
0.80
0.00
0.50
0.70
0.90
0.85
0.02
2.50 BSC
MILLIMETERS
MIN NOM
6
0.95
0.75
0.55
0.90
0.05
MAX
L1 0.10 REFTerminal Pullback
Overall Length D 3.20 BSC
0|— .IEIJ‘» *\ Camacl Push 1 05 550 Conlacl Pad L
2017 Microchip Technology Inc. DS20005613B-page 17
DSC1101/21
RECOMMENDED LAND PATTERN
Dimension Limits
Units
X1Contact Pad Width (X4)
Contact Pitch
MILLIMETERS
1.05 BSC
MIN
E
MAX
1.00
Contact Pad Length (X6)
Contact Pad Width (X2)
Y
X2
0.85
Microchip Technology Drawing C04-3007A
NOM
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
SILK SCREEN
12
6
CContact Pad Spacing 1.60
Space Between Contacts (X4) G1 0.25
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M1.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
C
E
X1
Y
X2
G
0.60
TITLE 6 LEAD CDFN S.Dx3.2mm COL PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING h \ CDENSDBQaELDaPLrl UNIT | MM 3.204 as a some; m "\ \. (no. 3 if a g E j ._ é * e g i z - mum an In To}; Vlew Bottom View an L—Jmaaxns r M E Recommended Land Pattern rm NOTE: 1. " Pawn Supply Beam-plug Capamm 15 xequued m Rammd Land Panem. 2 Grcen shadcd ruchnglcs m R
DSC1101/21
DS20005613B-page 18 2017 Microchip Technology Inc.
6-Lead CDFN 5.0 mm x 3.2 mm Package Outline and Recommended Land Pattern
I O 044 C /E* » [WEI Camad Push 2 54 550 quona‘ Cemer Pad wmm quona‘ Cemer Pad Lengm ContadPad Le m X6
2017 Microchip Technology Inc. DS20005613B-page 19
DSC1101/21
6-Lead VDFN 7.0 mm x 5.0 mm Package Outline and Recommended Land Pattern
RECOMMENDED LAND PATTERN
Dimension Limits
Units
Optional Center Pad Width
Optional Center Pad Length
Contact Pitch
Y2
X2
1.90
2.90
MILLIMETERS
2.54 BSC
MIN
E
MAX
Contact Pad Length (X6)
Contact Pad Width (X6)
Y1
X1
1.35
1.50
Microchip Technology Drawing C04-3010A
NOM
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
12
6
CContact Pad Spacing 3.70
Contact Pad to Center Pad (X2) G 0.20
Thermal Via Diameter (X6) V
Thermal Via Pitch EV
0.33
1.20
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M
For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
1.
2.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
With 2.8x1.8 mm Exposed Pad
C
E
X1
Y1
X2
Y2
EV
EV ØV G
SILK SCREEN
-—I:I—>rfl \///// I Q 0.20 c /// i @020 c I “In F I Elana I SIDE VIEW ' «D2 +$-IE I 2‘ \ 1 e} o.10® C A a I I NOTEI/§E,iIi,i,7, $ I I I SXL I I J I ”I _ E _ o o® c A a I I $ 035® C I I BOTTOM VIEW Mmrocmp Tech
DSC1101/21
DS20005613B-page 20 2017 Microchip Technology Inc.
B
A
0.20 C
0.20 C
0.10 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C A B
0.10 C A B
0.10 C
Microchip Technology Drawing C04-1010A Sheet 1 of 2
2X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
D
E
e
6X b
D2
E2
6X L (K)
A
A1
0.08 C
6X
2017 Microchip Technology Inc. DS20005613B-page 21
DSC1101/21
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Exposed Pad Width
Pitch
Standoff
Units
Dimension Limits
A1
A
b
E2
e
L
E
N
2.54
1.70
1.00
1.35
0.80
0.00
1.40
1.10
1.80
0.85
0.02
5.00 BSC
MILLIMETERS
MIN NOM
6
1.90
1.20
1.45
0.90
0.05
MAX
K0.20 REF
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
Terminal-to-Exposed-Pad
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Overall Length
Exposed Pad Length
D
D2 2.70
7.00 BSC
2.80 2.90
Microchip Technology Drawing C04-1010A Sheet 2 of 2
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
TITLE 6 LEAD CDFN 7.0x5.0mm COL PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING H I CDE‘N75i6LDiPLil WIT MM m "\ 2 ., a ' j g j I g W. M Top View Bottom View Hum Recommended Land Pattern NOTE: 1. " Pow: Supply Dmnphng Capncllm is required in 11:de Land Palm. 2' 51m shxdod mnglcs in Recommnnkd Land Pamm m soltkr «mil uptning _ V Rul circks in Rxnmmcndsd Land Pam“ m thrmul VIA Note Forme most cunem package arawmgs p‘ease see the Mlcrochlp Packaging Specuncanon located at mu; hwwwmlcrccmp cam/packagmg.
DSC1101/21
DS20005613B-page 22 2017 Microchip Technology Inc.
6-Lead CDFN 7.0 mm x 5.0 mm Package Outline and Recommended Land Pattern
2017 Microchip Technology Inc. DS20005613B-page 23
DSC1101/21
NOTES:
DSC1101/21
DS20005613B-page 24 2017 Microchip Technology Inc.
2017 Microchip Technology Inc. DS20005613B-page 25
DSC1101/1121
APPENDIX A: REVISION HISTORY
Revision A (August 2017)
Initial creation of document DSC1101/21 to Micro-
chip data sheet template DS20005613A.
Minor text changes throughout.
Revision B (December 2017)
Military temperature range changed to Automotive
in Features and Product Identification System.
Supply Current values updated in Ta ble 1 - 1.
Test Circuit section removed.
Updated Figure 6-1, Recommended Board Lay-
out.
DSC1101/21
DS20005613B-page 26 2017 Microchip Technology Inc.
NOTES:
PART NO. Ax X T -XXX.XXXX f X
2017 Microchip Technology Inc. DS20005613B-page 27
DSC1101/21
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
a) DSC1101AM1-010.0000T:
Low-Power Precision
CMOS Oscillator with
Standby, 6-LD 7.0X5.0
VDFN, Automotive Tem-
perature Range, ±50 ppm,
10 MHz Output Fre-
quency, 1,000/Reel
b) DSC1101BL2-030.0000:
Low-Power Precision
CMOS Oscillator with
Standby, 6-LD 5.0X3.2
CDFN, Extended Indus-
trial Temperature Range,
±25 ppm, 30 MHz Output
Frequency, 110/Tube
c) DSC1101DE5-150.0000:
Low-Power Precision
CMOS Oscillator with
Standby, 6-LD 2.5X2.0
VDFN, Extended Commer-
cial Temperature Range,
±10 ppm, 150 MHz Output
Frequency, 110/Tube
d) DSC1101AI2-075.0000T:
Low-Power Precision
CMOS Oscillator with
Standby, 6-LD 7.0X5.0
VDFN, Industrial Tempera-
ture Range, ±25 ppm,
75 MHz Output Fre-
quency, 1,000/Reel
PART NO.
X
X
Packaging
Stability
Device
Device: DSC1101: Low-Power Precision CMOS Oscillator with
Standby
DSC1121: Low-Power Precision CMOS Oscillator
Package: A = 6-Lead 7.0 mm x 5.0 mm VDFN
B = 6-Lead 5.0 mm x 3.2 mm CDFN
C = 6-Lead 3.2 mm x 2.5 mm VDFN
D = 6-Lead 2.5 mm x 2.0 mm VDFN
N = 6-Lead 7.0 mm x 5.0 mm CDFN (no center pad)
Temperature
Range: E=20C to +70C (Extended Commercial)
I=40C to +85C (Industrial)
L=40C to +105C (Extended Industrial)
M=55C to +125C (Automotive)
Stability: 1 = ±50 ppm
2 = ±25 ppm
3=±20ppm
5 = ±10 ppm
Frequency: xxx.xxxx = 2.3 MHz to 170 MHz (user-defined)
Packing Option: <blank>= 110/Tube
T = 1,000/Reel
X
Package
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
X
Temperature
Range
-XXX.XXXX
Frequency
Option
DSC1101/21
DS20005613B-page 28 2017 Microchip Technology Inc.
NOTES:
YSTEM
2017 Microchip Technology Inc. DS20005613B-page 29
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2480-2
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
6‘ ‘MICRDCHIP
DS20005613B-page 30 2017 Microchip Technology Inc.
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10/25/17

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