RT9285C Datasheet by Richtek USA Inc.

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RICHTEK Cl Cl Cl - _ 6 5 4 Marking Information k 2 3 For marking informatiun, contact our sales representative III I] III directly or through a Richtek distributcr located in yuur Lx 6ND FE area. TSOT—23-6 DSS2BEC-03 March 2011
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Features
zz
zz
zVIN Operating Range : 2.7V to 5.5V
zz
zz
zUp to 85% Efficiency
zz
zz
z22V Internal Power NMOS
zz
zz
z1MHz Switching Frequency
zz
zz
zBuilt-in Diode
zz
zz
zDigital Dimming with Zero-Inrush
zz
zz
zInput UVLO Protection
zz
zz
zOutput Over Voltage Protection
zz
zz
zInternal Soft Start and Compensation
zz
zz
zTSOT-23-6, 8-Lead XDFN and WDFN Package
zz
zz
zRoHS Compliant and 100% Lead (Pb)-Free
Applications
zCellular Phones
zDigital Cameras
zPDAs and Smart Phones
zPorbable Instruments
zMP3 Player
zOLED Power
Ordering Information
General Description
The RT9285C is a high frequency asynchronous boost
converter with internal diode, which can support 2 to 5
White LEDs for backlighting and OLED power supply. The
Internal soft start function can reduce the inrush current.
The device operates with 1MHz fixed switching frequency
to allow small external components and to simplify possible
EMI problems. The device comes with 20V over voltage
protection to allow inexpensive and small-output capacitors
with lower voltage rating. The LED current is initially set
with the external sense resistor RSET, and the feedback
voltage is 250mV. Tiny package type TSOT-23-6,
XDFN-8L 2x2 and WDFN-8L 2x2 packages provide the best
solution for PCB space saving and total BOM cost.
Tiny Package, High Performance, Diode Embedded White
LED Driver
Pin Configurations
(TOP VIEW)
TSOT-23-6
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
GND
LX FB
EN
VOUT
NC 7
6
5
1
2
3
4
8
PGND VDD
GND
9
XDFN/WDFN-8L 2x2
LX GND FB
ENVOUTVDD
4
23
56
RT9285C
Package Type
QW : WDFN-8L 2x2 (W-Type)
QX : XDFN-8L 2x2 (X-Type)
J6 : TSOT-23-6
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
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Function Pin Description
Pin No. Pin Name Pin Function
XDFN/WDFN-8L TSOT-23-6
1,
9 (Exposed Pad) 2 GND
Ground Pin. The exposed pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
2 1 LX
LX Pin. Connect this Pin to an inductor. Minimize the track area to
reduce EMI.
3 -- NC No Internal Connection.
4 -- PGND Power Ground Pin.
5 6 VDD
Supply Input Voltage Pin. Bypass 1μF capacitor to GND to reduce the
input ripple.
6 5 VOUT
Output Voltage pin. The pin internally connects to OVP diode to limit
output voltage while LEDs are disconnected.
7 4 EN
Chip Enable (Active High). Note that this pin has an internal pull-dow n
resistance around 300kΩ.
8 3 FB
Feedback Pin. Series connecting a resistor between WLED and
ground as a current sense. Sense the current feedback voltage to set
the current rating.
Typical Application Circuit
Figure 1. Operation of Digital Pulse Dimming Control
LX
GND
VDD
FB
VOUT
RT9285C
EN
C1
1µF
RSET
L1
10µH to 22µH
12.5
C2
0.22µF to 1µF
Chip Enable
VIN
2.7V to 5.5V
PGND
PGND pin for XDFN/WDFN-8L Packages
IWLED
0.5µs < tLO < 300µs 0.5µs < tHI
15/16 14/16 13/16 12/16 3/16 1/16
2/16
100%
100% 15/16
0 1234514 1501
EN
Shutdown Shutdown
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Function Block Diagram
Operation
Soft-Start
The Soft-Start function is made by clamping the output
voltage of error amplifier with another voltage source that
is increased slowly from zero to near VIN in the Soft-Start
period. Therefore, the duty cycle of the PWM will be
increased from zero to maximum in this period. The soft-
start time is decided by a timer of 1.5ms. The charging
time of the inductor will be limited as the smaller duty so
that the inrush current can be reduced to an acceptable
value.
Over Voltage Protection
The Over Voltage Protection is detected by a junction
breakdown detecting circuit. Once VOUT goes over the
detecting voltage, LX pin stops switching and the power
NMOS is turned off. Then, the VOUT is clamped to be near
VOVP.
LED Current Setting
The RT9285C regulates the LED current by setting the
current sense resistor (RSET) connecting to feedback and
ground. The internal feedback reference voltage is 0.25V.
The LED current can be set from following equation easily.
ILED (mA) = 0.25/RSET
Digital Pulse Dimming Control
RT9285C implements the pulse dimming method being
used to control the brightness of white LEDs. There are
16 steps to set the current of white LEDs. The maximum
LED current is up to 20mA that is sufficient for most
application in backlight. The detail operation of brightness
dimming is showed in the Figure 1.
Current Limiting
The current flow through the inductor as charging period is
detected by a current sensing circuit. As the value over
the current limiting, the NMOS will be turned-off so that
the inductor will be forced to leave charging stage and
enter discharging stage. Therefore, the inductor current
will not increase over the current limiting.
PWM
Logic
OCP
Current
Sense
1.0MHz OSC
Slope
Compensation
+
-
+
-
Soft Start/
Clamping
Timer
Dimming
Controller
UVLO/P
GOOD
OVP LX
PGND
FB
EN
VOUT
VDD
VREF
GND
Table 1. RSET Value Selection
ILED (mA) RSET (Ω)
5 49.9
10 24.9
12 21
15 16.5
20 12.4
In order to have an accurate LED current, precision resistors
are preferred (1% is recommended). The table for RSET
selection is shown below.
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Electrical Characteristics
(VIN = 3.7V, FREQ left floating, TA = 25°C, Unless Otherwise specification)
To be continued
Recommended Operating Conditions (Note 3)
zJunction Temperature Range ---------------------------------------------------------------------------------------- 40°C to 125°C
zAmbient Temperature Range ---------------------------------------------------------------------------------------- 40°C to 85°C
Absolute Maximum Ratings (Note 1)
zSupply Voltage, VIN --------------------------------------------------------------------------------------------------- 0.3 to 6V
zLX Input Voltage ------------------------------------------------------------------------------------------------------- 0.3V to 22V
zOutput Voltage --------------------------------------------------------------------------------------------------------- 0.3V to 21V
zThe other pins ---------------------------------------------------------------------------------------------------------- 0.3V to 6V
zPower Dissipation, PD @ TA = 25°C
TSOT23-6 --------------------------------------------------------------------------------------------------------------- 0.392W
XDFN/WDFN-8L 2x2 -------------------------------------------------------------------------------------------------- 0.606W
zPackage Thermal Resistance (Note 2)
TSOT23-6, θJA ---------------------------------------------------------------------------------------------------------- 255°C/W
XDFN/WDFN-8L 2x2, θJA --------------------------------------------------------------------------------------------- 165°C/W
XDFN/WDFN-8L 2x2, θJC -------------------------------------------------------------------------------------------- 20°C/W
zJunction Temperature ------------------------------------------------------------------------------------------------- 150°C
zLead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
zStorage Temperature Range ---------------------------------------------------------------------------------------- 65°C to 150°C
Parameter Symbol Test Conditions Min Typ Max Unit
System Supply Input
Operation voltage Range VIN 2.7 -- 5.5 V
Under Voltage Lock Out VUVLO 1.7 2 2.3 V
Quiescent Current IQ FB = 1.5V, No switch -- 300 450 μA
Supply Current IIN FB = 0V, Switch -- -- 2 mA
Shut Down Current ISHDN V
EN < 0.4V -- 2 5 μA
Output
Line Regulation VIN = 3V to 4.3V -- -- 3 %
Oscillator
Operation Frequency fOSC -- 1 -- MHz
Maximum Duty Cycle 85 90 -- %
Reference Voltage
Feedback Reference Voltage VREF 0.237 0.25 0.263 V
Diode
Forward Voltage VFW I
FW = 100mA -- 0.9 -- V
MOSFET
On Resistance of MOSFET RDS(ON) 0.5 0.75 1 Ω
Protection
OVP Threshold VOVP -- 20 -- V
OCP -- 400 -- mA
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Parameter Symbol Test Conditions Min Typ Max Unit
Control Interface
Logic-Low Voltage VIL -- -- 0.4
EN Threshold Logic-High Voltage VIH 1.4 -- -- V
EN Low Time for Dimming TLO
Refer to Figure 1 0.5 -- 300 μs
Delay Between Steps Time THI Refer to Figure 1 0.5 -- -- μs
EN Low Time for Shut Down TSHDN Refer to Figure 1 1 -- -- ms
Note 1.Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 3. The device is not guaranteed to function outside its operating conditions.
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Typical Operating Characteristics
Output Voltage vs. Output Current
10
11
12
13
14
15
16
17
5 15253545556575
Output Current (mA)
Output Voltage (V)
Efficiency vs. Input Voltage
50
55
60
65
70
75
80
85
90
2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Efficiency (%)
4W-LED
OVP vs. Input Voltage
18
18.4
18.8
19.2
19.6
20
20.4
20.8
2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
OVP (V)
Quiescent Current vs. Input Voltage
100
150
200
250
300
350
400
450
2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Quiescent Current (uA
)
-40°C
25°C
85°C
Enable Voltage vs. Input Voltage
0.74
0.75
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Enable Voltage (V)
Shutdown Voltage
Enable Voltage
Frequency vs. Input Voltage
0.88
0.90
0.92
0.94
0.96
0.98
1.00
1.02
2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Frequency (MHz
)
RICHTEK ”rm.i,_.AaV—M74 l w (2V/Div)
RT9285C
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Feedback Reference Voltage vs. Input Voltage
249.0
249.5
250.0
250.5
251.0
251.5
252.0
252.5
253.0
253.5
2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Feedback Reference Voltage (mV)
VIN = 3.7V
Inrush Current Response
VIN
(2V/Div)
Time (500μs/Div)
VOUT
(5V/Div)
EN
(2V/Div)
IIN
(100mA/Div)
VIN = 3.7V
Dimming Operation @ Decreace
VIN
(2V/Div)
Time (500μs/Div)
VOUT
(5V/Div)
EN
(2V/Div)
ILED
(10mA/Div)
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Application Information
LED Current Control
The RT9285C regulates the LED current by setting the
current sense resistor (RSET) connecting to feedback and
ground. The RT9284A/B feedback voltage (VFB) is 0.25V.
The LED current (ILED) can be set by a resistor RSET.
ILED = 0.25/RSET
In order to have an accurate LED current, a precision resistor
is preferred (1% is recommended).
Inductor Selection
The recommended value of inductor for 4 to 5WLEDs
applications are 10µH to 22µH. For 3WLEDs, the
recommended value of inductor is 4.7µH to 22µH. Small
size and better efficiency are the major concerns for portable
device, such as RT9285C used for mobile phone. The
inductor should have low core loss at 1MHz and low DCR
for better efficiency.
The inductor saturation current rating should be considered
to cover the inductor peak current.
Figure 2. Application for Driving 4 Series WLEDs
Figure 3. Application for Driving 5 Series WLEDs
Capacitor Selection
Input and output ceramic capacitors of 1µF are recommend-
ed for RT9285C applications. For better voltage filtering,
ceramic capacitors with low ESR are recommended. X5R
and X7R types are suitable because of their wider voltage
and temperature ranges.
Output Voltage Control
The output voltage of R9285C can be adjusted by the divider
circuit on FB pin. Figure 5 shows a 2-level voltage control
circuit for OLED application. The output voltage can be
calculated by the following equations in Figure 5.
Figure 4. Application for Constant Output Voltage
OUT R1R2
V 0.25; R210k
R2
+
=×>
Figure 5. Application Circuit for Output Voltage Control
and Related Equations
VOUT = RA x {(FB/RB) + (FB-GPIO)/RGPIO} + FB (1)
As GPIO = 0V,
VOUT = RA x {(0.25/RB) + (0.25/RGPIO)} + 0.25 (2)
As GPIO = 2.8V,
VOUT = R
A
x {(0.25/RB) + (0.25-2.8)/RGPIO)} + 0.25
(3)
LX
GND
VDD
FB
VOUT
RT9285C
EN
C1
1µF
RSET
L1
C2
Chip Enable
VIN
10µH to 22µH2.7V to 5.5V
0.22µF to 1µF
12.5
LX
GND
VDD
FB
VOUT
RT9285C
EN
C1
1µF
RSET
L1
C2
Chip Enable
VIN
10µH to 22µH2.7V to 5.5V
0.22µF to 1µF
12.5
LX
GND
VDD
FB
VOUT
RT9285C
EN
C1
1µF
R2
L1
C2
Chip Enable
VIN
10µH to 22µH2.7V to 5.5V
0.22µF to 1µF
10k
R1
590k
VOUT
15V
VDD
EN
VOUT
GND
FB
RT9285C
LX RGPIO
VIN GPIO
OLED
RA
RB
VEN
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As GPIO = 1.8V, VOUT = RA
x {(0.25/RB) + (0.25-1.8)/
RGPIO)} + 0.25 (4)
For Efficiency Consideration :
Set RA = 990k,
If 2 levels are 16V (GPIO = 0V) and 14V (GPIO = 1.8V)
Get RB = 16k, RGPIO = 890k
Table 2. Suggested Resistance for Output Voltage
Control
Conditions RA
(k)
RB
(k)
RGPIO
(k)
Case A :
Normal Voltage = 16V
(GPIO = 0V)
Dimming Voltage = 12V
(GPIO = 1.8V)
1100 18 495
Case B :
Normal Voltage = 16V
(GPIO = 0V)
Dimming Voltage = 12V
(GPIO = 2.8V)
1200 19.5 840
Considering the output voltage deviation from the GPIO
voltage tolerance, as GPIO voltage vibrated by 0 ± 50mV
and 1.8(2.8) ±5% ,the output voltage could be kept within
±2.5%.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula:
PD(MAX) = ( TJ(MAX) - TA ) / θJA
Where T
J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9285C, where TJ (MAX) is the maximum junction
temperature of the die (125°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance θJA is layout dependent. For XDFN/WDFN 2x2
packages, the thermal resistance θJA is 165°C/W on the
standard JEDEC 51-3 single layer thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by following formula:
PD(MAX) = (125°C 25°C) / (165°C/W) = 0.606 W for WDFN/
XDFN 2x2 packages
PD(MAX) = (125°C 25°C) / (255°C/W) = 0.392 W for TSOT-
23-6 packages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ (MAX) and thermal
resistance θJA. For RT9285C packages, the Figure 6 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Figure 6. Derating Curves for RT9285C Packages
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
025 50 75 100 125
Ambient Temperature (°C)
Maximum Power Dissipation (W)
TSOT-23-6
XDFN/WDFN-8L 2x2
Layout guide
}A full GND plane without gap break.
}Traces in bold need to be routed first and should be
kept as short as possible.
}VDD to GND noise bypass : Short and wide connection
for the 1µF MLCC capacitor between Pin 6 and Pin 2.
}LX node copper area should be minimized for reducing
EMI. (*1)
}The input capacitor C1 should be placed as closed as
possible to Pin 6. (*2)
RICHTEK Figure 7. T Figure 3. B www.richlek.com 1 0
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`The output capacitor C2 should be connected directly
from the Pin 5 to ground rather than across the LEDs.
(*3)
`FB node copper area should be minimized and keep far
away from noise sources (Pin 1, Pin 5, Pin 6). (*4)
`The Inductor is far away receiver and microphone.
`The voice trace is far away RT9285C.
`The embedded antenna is far away and different side
RT9285C.
`R1 should be placed as close as RT9285C.
`The through hole of RT9285C's GND pin is recommended
as large and many as possible.
Figure 8. Bottom
Figure 7. TOP
LX
GND
FB EN
VOUT
VDD
4
2
3
5
61
EN
C1
L1
WLEDs
GND
C2
VIN
*1 *2
*3
*4
RSET
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Outline Dimension
TSOT-23-6 Surface Mount Package
Dimensions In Millimeters
Dimensions In Inches
Symbol Min Max Min Max
A 0.700 1.000 0.028 0.039
A1 0.000 0.100 0.000 0.004
B 1.397 1.803 0.055 0.071
b 0.300 0.559 0.012 0.022
C 2.591 3.000 0.102 0.118
D 2.692 3.099 0.106 0.122
e 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
L 0.300 0.610 0.012 0.024
AA1
e
b
B
D
C
H
L
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W-Type 8L DFN 2x2 Package
Dimensions In Millimeters
Dimensions In Inches
Symbol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.200 0.300 0.008 0.012
D 1.950 2.050 0.077 0.081
D2 1.000 1.250 0.039 0.049
E 1.950 2.050 0.077 0.081
E2 0.400 0.650 0.016 0.026
e 0.500 0.020
L 0.300 0.400 0.012 0.016
1 1
2
2
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID and Tie Bar Mark Options
D
1
E
A3
A
A1
D2
E2
L
b
e
SEE DETAIL A
RICHTEK . i J JJJ;— J , 2 E J JJ m — fl DETAILA
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Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
X-Type 8L DFN 2x2 Package
Dimensions In Millimeters
Dimensions In Inches
Symbol Min Max Min Max
A 0.400 0.500 0.016 0.020
A1 0.000 0.050 0.000 0.002
A3 0.102 0.152 0.004 0.006
b 0.200 0.300 0.008 0.012
D 1.950 2.050 0.077 0.081
D2 1.000 1.250 0.039 0.049
E 1.950 2.050 0.077 0.081
E2 0.400 0.650 0.016 0.026
e 0.500 0.020
L 0.300 0.400 0.012 0.016
1 1
2
2
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID and Tie Bar Mark Options
D
1
E
A3
A
A1
D2
E2
L
b
e
SEE DETAIL A

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