RT8288A Datasheet

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®
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Pin Configurations
(TOP VIEW)
4A, 21V 500kHz Synchronous Step-Down Converter
General Description
The RT8288A is a synchronous step-down regulator with
an internal power MOSFET. It achieves 4A of continuous
output current over a wide input supply range with excellent
load and line regulation. Current mode operation provides
fast transient response and eases loop stabilization.
Fault condition protection includes cycle-by-cycle current
limiting and thermal shutdown. An internal soft-start
minimizes external parts count and internal compensation
circuitry.
The RT8288A requires a minimal number of readily
available external components, providing a compact
solution.
Features
zz
zz
z4A Output Current
zz
zz
zInternal Soft-Start
zz
zz
z120mΩΩ
ΩΩ
Ω/40mΩΩ
ΩΩ
Ω Internal Power MOSFET Switch
zz
zz
zInternal Compensation Minimizes External Parts
Count
zz
zz
zFixed 500kHz Frequency
zz
zz
zThermal Shutdown Protection
zz
zz
zCycle-by-Cycle Over Current Protection
zz
zz
zWide 4.5V to 21V Operating Input Range
zz
zz
zAdjustable Output from 0.808V to 15V
zz
zz
zAvailable in an SOP-8 (Exposed Pad) Package
zz
zz
zRoHS Compliant and Halogen Free
Ordering Information
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
SOP-8 (Exposed Pad)
Marking Information
Applications
zDistributive Power Systems
zBattery Charger
zDSL Modems
zPre-Regulator for Linear Regulators
RT8288AZSP : Product Number
YMDNN : Date Code
VIN
SW
SW
BOOT
GND
VCC
EN
FB
GND
2
3
45
6
7
8
9
RT8288A
ZSPYMDNN
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
RT8288A
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
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Function Pin Description
Pin No. Pin Name Pin Function
1 VIN Supply Input. VIN supplies the power to the IC, as well as the step-down converter
switches. Drive VIN with a 4.5V to 21V power source. Bypass VIN to GND with a
suitably large capacitor to eliminate noise on the input to the IC.
2, 3 SW Switch Node. SW is the switching node that supplies power to the output. Connect
the output LC filter from SW to the output load. Note that a capacitor is required
from SW to BOOT to power the high side switch.
4 BOOT
High Side Gate Drive Boost Input. BOOT supplies the drive for the high side
N-MOSFET switch. Connect a 100nF or greater capacitor from SW to BOOT to
power the high side switch.
5 EN Chip Enable (Active High). For automatic start-up, connect the EN pin to VIN with a
100kΩ resistor.
6 FB Feedback Input. FB senses the output voltage to regulate said voltage. Drive FB
with a resistive voltage divider from the output voltage. The feedback threshold is
0.808V.
7 VCC Bias Supply. Decouple with 0.1μF to 0.22μF capacitor. The capacitance should be
no more than 0.22μF.
8,
9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
Table 1. Recommended Components Selection
Typical Application Circuit
VOUT (V) R1 (kΩ) R2 (kΩ) RT (kΩ) L (μH) COU T (μF)
5 75 14.46 0 4.7 22 x 2
3.3 75 24.32 0 3.6 22 x 2
2.5 75 35.82 0 3.6 22 x 2
1.8 5 4.07 30 2 22 x 2
1.5 5 5.84 39 2 22 x 2
1.2 5 10.31 47 2 22 x 2
1.05 5 16.69 47 1.5 22 x 2
VIN
EN
GND
BOOT
FB
SW
56
1
2, 3
4
L
100nF
R2
22µF RT8288A
8, 9 (Exposed Pad)
CBOOT
RT
CIN
COUT
R1
VCC
0.1µF
CC
7
VIN
VOUT
Chip Enable
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Function Block Diagram
S
Q
R
Driver
-
+
Current Sense
Amplifier
PWM
Comparator
Oscillator
500kHz
Ramp
Generator
Regulator
Reference
+
-
Error
Amplifier
SW
BOOT
FB
EN
VIN
+
-
GND
VCC
+
-
1.2V
+
-
1.7V
1µA
3V
5k
Lockout
Comparator
Shutdown
Comparator
400k
30pF
1pF
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Absolute Maximum Ratings (Note 1)
zSupply Input Voltage, VIN ---------------------------------------------------------------------------------- 0.3V to 26V
zSwitch Voltage, SW ----------------------------------------------------------------------------------------- 0.3V to (VIN + 0.3V)
zBoot Voltage, BOOT ----------------------------------------------------------------------------------------- (SW 0.3V) to (SW + 6V)
zOther Pins------------------------------------------------------------------------------------------------------ 0.3V to 6V
zPower Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------- 1.333W
zPackage Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------- 75°C/W
SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------- 15°C/W
zJunction Temperature ---------------------------------------------------------------------------------------- 150°C
zLead Temperature (Soldering, 10 sec.)------------------------------------------------------------------ 260°C
zStorage Temperature Range ------------------------------------------------------------------------------- 65°C to 150°C
zESD Susceptibility (Note 3)
HBM (Human Body Model)--------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions (Note 4)
zSupply Input Voltage, VIN ---------------------------------------------------------------------------------- 4.5V to 21V
zJunction Temperature Range ------------------------------------------------------------------------------- 40°C to 125°C
zAmbient Temperature Range------------------------------------------------------------------------------- 40°C to 85°C
Electrical Characteristics
Parameter Symbol Test Conditions Min Typ Max Unit
Shutdown Current ISHDN V
EN = 0 -- 0 1 μA
Quiescent Current IQ V
EN = 2V, VFB = 1V -- 0.7 -- mA
Upper Switch On Resistance RDS(ON)1 -- 120 -- mΩ
Lower Switch On Resistance RDS(ON)2 -- 40 -- mΩ
Switch Leakage ILEAK V
EN = 0V, VSW = 0V or 12V -- 0 10 μA
Current Limit ILIMIT V
BOOT VSW = 4.8V 5.9 7 -- A
Oscillator Frequency fSW V
FB = 0.75V 425 500 575 kHz
Short Circuit Frequency VFB = 0V -- 150 -- kHz
Maximum Duty Cycle DMAX V
FB = 0.8V -- 90 -- %
Minimum On Time tON -- 100 -- ns
Feedback Voltage VFB 4.5V VIN 21V 0.796 0.808 0.82 V
Feedback Current IFB -- 10 50 nA
Logic-High VIH 2 -- 5.5
EN Input Threshold
Voltage Logic-Low VIL -- -- 0.4
V
V
EN = 2V -- 1 --
Enable Current V
EN = 0V -- 0 -- μA
(VIN = 12V, TA = 25°C unless otherwise specified)
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Parameter Symbol Test Conditions Min Typ Max Unit
Under Voltage Lockout
Threshold VUVLO V
IN Rising 3.8 4 4.2 V
Under Voltage Lockout
Threshold Hysteresis ΔVUVLO -- 400 -- mV
VCC Regulator -- 5 -- V
VCC Load Regulation ICC = 5mA -- 5 -- %
Soft-Start Period tSS -- 2 -- ms
Thermal Shutdown TSD -- 150 -- °C
Thermal Shutdown Hysteresis ΔTSD -- 30 -- °C
Note 1. Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.bsolute maximum rating conditions for extended periods may remain possibility to affect device
reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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Output Voltage vs. Output Current
1.200
1.205
1.210
1.215
1.220
1.225
1.230
1.235
1.240
00.511.522.533.54
Output Current (A)
Output Voltage (V)
VIN = 12V, VOUT = 1.22V, IOUT = 0A to 4A
Reference Voltage vs. Input Voltage
0.790
0.795
0.800
0.805
0.810
0.815
0.820
0.825
0.830
4 6 8 10 12 14 16 18 20 22
Input Voltage (V)
Reference Voltage (V)
Reference Voltage vs. Temperature
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
-50 -25 0 25 50 75 100 125
TemperatureC)
Reference Voltage (V)
Typical Operating Characteristics
Switching Frequency vs. Temperature
350
375
400
425
450
475
500
525
550
-50-25 0 25 50 75100125
Temperature (°C)
Switching Frequency (kHz) 1
VIN = 12V, VOUT = 1.22V, IOUT = 1A
Switching Frequency vs. Input Voltage
350
375
400
425
450
475
500
525
550
4 6 8 10 12 14 16 18 20 22
Input Voltage (V)
Switching Frequency (kHz) 1
VOUT = 1.22V, IOUT = 0.8A
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
00.511.522.533.54
Output Current (A)
Efficiency (%)
VIN = 12V
VIN = 21V
VOUT = 1.22V, IOUT = 0A to 4A
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Current Limit vs. Input Voltage
0
2
4
6
8
10
12
4 6 8 10 12 14 16 18 20 22
Input Voltage (V)
Current Limit (A)
Current Limit vs. Temperature
3
4
5
6
7
8
9
10
11
-50-25 0 25 50 75100125
TemperatureC)
Current Limit (A)
VIN = 12V, VOUT = 1.22V
Output Voltage Ripple
Time (1μs/Div)
IL
(2A/Div)
VOUT
(50mV/Div)
VSW
(10V/Div)
VIN = 12V, IOUT = 4A
Output Voltage Ripple
Time (1μs/Div)
IL
(2A/Div)
VOUT
(50mV/Div)
VSW
(10V/Div)
VIN = 12V, IOUT = 1A
VIN = 12V, VOUT = 1.22V, IOUT = 1A to 4A
Load Transient Response
Time (100μs/Div)
IOUT
(2A/Div)
VOUT
(200mV/Div)
VIN = 12V, VOUT = 1.22V, IOUT = 0A to 4A
Load Transient Response
Time (100μs/Div)
IOUT
(2A/Div)
VOUT
(200mV/Div)
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Power On from VIN
Time (5ms/Div)
IL
(5A/Div)
VOUT
(1V/Div)
VIN
(10V/Div)
VIN = 12V, VOUT = 1.22V, IOUT = 4A
Power Off from VIN
Time (50ms/Div)
IL
(5A/Div)
VOUT
(1V/Div)
VIN
(10V/Div)
VIN = 12V, VOUT = 1.22V, IOUT = 4A
Power On from EN
Time (2.5ms/Div)
VOUT
(1V/Div)
IL
(5A/Div)
VEN
(5V/Div)
VIN = 12V, VOUT = 1.22V, IOUT = 4A
VSW
(10V/Div)
Power Off from EN
Time (50μs/Div)
VIN = 12V, VOUT = 1.22V, IOUT = 4A
VOUT
(1V/Div)
IL
(5A/Div)
VEN
(5V/Div)
VSW
(10V/Div)
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Application Information
The IC is a synchronous high voltage buck converter that
can support the input voltage range from 4.5V to 21V and
the output current can be up to 4A.
Output Voltage Setting
The output voltage is set by an external resistive divider
according to the following equation :
⎛⎞
+
⎜⎟
⎝⎠
OUT FB R1
V = V1
R2
Figure 1. Output Voltage Setting
where VFB is the feedback reference voltage 0.808V
(typical).
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
RT8288A
GND
FB
R1
R2
VOUT
External Bootstrap Diode
Connect a 100nF low ESR ceramic capacitor between
the BOOT pin and SW pin as shown in Figure 2. This
capacitor provides the gate driver voltage for the high side
MOSFET. It is recommended to add an external bootstrap
diode between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
IC. Note that the external boot voltage must be lower than
5.5V.
Figure 2. External Bootstrap Diode
Soft-Start
The IC contains an internal soft-start function to prevent
large inrush current and output voltage overshoot when
the converter starts up. Soft-Start automatically begins
once the chip is enabled. During soft-start, the internal
soft-start capacitor becomes charged and generates a
linear ramping up voltage across the capacitor. This voltage
clamps the voltage at the internal reference, causing the
duty pulse width to increase slowly and in turn reduce the
output surge current. Finally, the internal 1V reference
takes over the loop control once the internal ramping-up
voltage becomes higher than 1V. The typical soft-start
time for this IC is set at 2ms.
Under Voltage Lockout Threshold
The IC includes an input Under Voltage Lockout Protection
(UVLO). If the input voltage exceeds the UVLO rising
threshold voltage (4.2V), the converter resets and prepares
the PWM for operation. If the input voltage falls below the
UVLO falling threshold voltage (3.8V) during normal
operation, the device stops switching. The UVLO rising
and falling threshold voltage includes a hysteresis to
prevent noise caused reset.
Chip Enable Operation
The EN pin is the chip enable input. Pulling the EN pin
low (<0.4V) will shut down the device. During shutdown
mode, the IC quiescent current drops to lower than 1μA.
Driving the EN pin high (>2V, <5.5V) will turn on the device
again. For external timing control (e.g.RC), the EN pin
can also be externally pulled high by adding a REN* resistor
and CEN* capacitor from the VIN pin, as can be seen from
the Figure 5.
An external MOSFET can be added to implement digital
control on the EN pin when front age system voltage below
2.5V is available, as shown in Figure 3. In this case, a
100kΩ pull-up resistor, REN, is connected between VIN
and the EN pin. MOSFET Q1 will be under logic control to
pull down the EN pin.
To prevent enabling circuit when VIN is smaller than the
VOUT target value, a resistive voltage divider can be placed
between the input voltage and ground and connected to
the EN pin to adjust IC lockout threshold, as shown in
Figure 4. For example, if an 8V output voltage is regulated
from a 12V input voltage, the resistor REN2 can be selected
to set input lockout threshold larger than 8V.
RT8288A
SW
BOOT
5V
100nF
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Figure 3. Enable Control Circuit for Logic Control with Low Voltage
Figure 4. The Resistors can be Selected to Set IC Lockout Threshold
Under Output Voltage Protection-Hiccup Mode
For the IC, Hiccup Mode of Under Voltage Protection (UVP)
is provided. When the FB voltage drops below half of the
feedback reference voltage, VFB, the UVP function will be
triggered and the IC will shut down for a period of time and
then recover automatically. The Hiccup Mode of UVP can
reduce input current in short circuit conditions.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
OUT OUT
LIN
VV
I = 1
fL V
⎡⎤⎡ ⎤
Δ×
⎢⎥⎢ ⎥
×
⎣⎦⎣ ⎦
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. Highest efficiency operation is achieved by reducing
ripple current at low frequency, but it requires a large
inductor to attain this goal.
For the ripple current selection, the value of ΔIL = 0.24
(IMAX) will be a reasonable starting point. The largest ripple
current occurs at the highest VIN. To guarantee that the
ripple current stays below a specified maximum, the
inductor value should be chosen according to the following
equation :
OUT OUT
L(MAX) IN(MAX)
VV
L = 1
fI V
⎡⎤⎡ ⎤
×−
⎢⎥⎢ ⎥
×Δ
⎣⎦⎣ ⎦
The inductor's current rating (caused a 40°C temperature
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
see Table 2 for the inductor selection reference and it is
highly recommended to keep inductor value as close as
possible to the recommended inductor values for each
VOUT as shown in Table 1.
Component Supplier Series Dimensions (mm)
TDK VLF10045 10 x 9.7 x 4.5
TDK SLF12565 12.5 x 12.5 x 6.5
TAIYO YUDEN NR8040 8 x 8 x 4
Table 2. Suggested Inductors for Typical
Application Circuit
Input and Output Capacitors Selection
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
VIN
VCC
BOOT
FB
SW
6
1
2, 3
4
L
R1
R2
VOUT
VIN
RT8288A
7
CBOOT
COUT
CIN
RT
GND 8, 9 (Exposed Pad)
EN
CC
5
Q1
REN
100k
Chip Enable
VIN
VCC
BOOT
FB
SW
6
1
2, 3
4
L
R1
R2
VOUT
VIN
RT8288A
7
CBOOT
COUT
CIN
RT
GND 8, 9 (Exposed Pad)
EN
CC
5
REN
100k
REN2
OUT IN
RMS OUT(MAX) IN OUT
VV
I = I 1
VV
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This formula has a maximum at VIN = 2VOUT, where IRMS =
IOUT / 2. This simple worst case condition is commonly
used for design because even significant deviations do
not offer much relief.
Table 3. Suggested Capacitors for CIN and COUT
Location Component Supplier Part No. Capacitance (μF) Case Size
CIN MURATA GRM32ER71C226M 22 1210
CIN TDK C3225X5R1C226M 22 1210
COUT MURATA GRM31CR60J476M 47 1206
COUT TDK C3225X5R0J476M 47 1210
COUT MURATA GRM32ER71C226M 22 1210
COUT TDK C3225X5R1C226M 22 1210
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response.
The output ripple, ΔVOUT, is determined by :
OUT L OUT
1
VIESR
8fC
⎡⎤
Δ≤Δ +
⎢⎥
⎣⎦
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Thermal Shutdown
Thermal shutdown is implemented to prevent the chip from
operating at excessively high temperatures. When the
junction temperature is higher than 150°C, the chip will
shut down the switching operation. The chip will
automatically resume switching, once the junction
temperature cools down by approximately 30°C.
EMI Consideration
Since parasitic inductance and capacitance effects in PCB
circuitry would cause a spike voltage on SW pin when
high side MOSFET is turned-on/off, this spike voltage on
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One way is by placing an
R-C snubber (RS*, CS*) between SW and GND and locating
them as close as possible to the SW pin, as shown in
Figure 5. Another method is by adding a resistor in series
with the bootstrap capacitor, CBOOT, but this method will
decrease the driving capability to the high side MOSFET.
It is strongly recommended to reserve the R-C snubber
during PCB layout for EMI improvement. Moreover,
reducing the SW trace area and keeping the main power
in a small loop will be helpful on EMI performance. For
detailed PCB layout guide, please refer to the section
Layout Considerations.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor, one 22μF low ESR ceramic
capacitors are recommended. For the recommended
capacitor, please refer to Table 3 for more detail.
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Figure 5. Reference Circuit with Snubber and Enable Timing Control
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) package, the thermal resistance,
θJA, is 75°C/W on a standard JEDEC 51-7 four-layer
thermal test board. The maximum power dissipation at TA
= 25°C can be calculated by the following formula :
PD(MAX) = (125°C 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. The derating curve in Figure 6 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the IC.
`Keep the traces of the main current paths as short and
wide as possible.
`Put the input capacitor as close as possible to the device
pins (VIN and GND).
`SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive noise
pickup.
`Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the IC.
Figure 6. Derating Curve of Maximum Power Dissipation
VIN
VCC
BOOT
FB
SW
6
1
2, 3
4
L
R1
R2
VOUT
VIN
RT8288A
7
CBOOT
COUT
CIN
RT
GND 8, 9 (Exposed Pad)
EN
CC
5CS*
RS*
REN*
CEN*
* : Optional
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0 25 50 75 100 125
Ambient Temperature (°C)
Maximum Power Dissipation (W) 1
Four-Layer PCB
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Figure 7. PCB Layout Guide
CIN
CBOOT
VOUT
COUT GND
VOUT
RTR2
R1
L
GND
Place the input and
output capacitors
as close to the IC
as possible.
SW should be connected
to inductor by wide and
short trace and keep
sensitive components
away from this trace.
Place the feedback
as close to the IC as
possible.
VIN
SW
SW
BOOT
GND
VCC
EN
FB
GND
2
3
45
6
7
8
9
`Connect all analog grounds to a common node and then
connect the common node to the power ground behind
the output capacitors.
`An example of PCB layout guide is shown in Figure 7
for reference.
RICHTEK Richtek Technology Corporation SF, No. 20, Taiyuan Streel, Chupex ()in Hsinchu, Taiwan, R 0.0. Tel. (8863)5526789 Hrcmex prbdums are sum by descnmlun bnly Hrcmex reseryes me Mg?“ m change me crrcuury and’or specmcaubns w omam me \ales\ re‘evanl mmrmanbn and dala sheels bevbre placmg orders and shown verwy that such mmrmaub assume respbnsrbrluy Ibr use at any crrcuury omer man crrcuury enme‘y embobreu m a Hrcmek produd warma| accura|e and rehable However. no responsrbrluy rs assumed by Warner br us subsrmarres (or us use nbr my any mm bames wmch may resuu 1mm “5 use No hcense .s gramed by rmphcamn or bmerwrse under any pa|en| br pa|en| www.mchtek.com 14
RT8288A
14
DS8288A-03 June 2012www.richtek.com
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
Outline Dimension
A
B
J
F
H
M
C
D
I
Y
X
EXPOSED THERMAL PAD
(Bottom of Package)
8-Lead SOP (Exposed Pad) Plastic Package
Dimensions In Millimeters Dimensions In Inches
Symbol Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1 Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2 Y 3.000 3.500 0.118 0.138