NCS, NCV2001 Datasheet by onsemi

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© Semiconductor Components Industries, LLC, 2017
January, 2017 − Rev. 18 1Publication Order Number:
NCS2001/D
NCS2001, NCV2001
0.9 V, Rail-to-Rail, Single
Operational Amplifier
The NCS2001 is an industry first sub−one voltage operational
amplifier that features a rail−to−rail common mode input voltage range,
along with rail−to−rail output drive capability. This amplifier is
guaranteed to be fully operational down to 0.9 V, providing an ideal
solution for powering applications from a single cell Nickel Cadmium
(NiCd) or Nickel Metal Hydride (NiMH) battery. Additional features
include no output phase reversal with overdriven inputs, trimmed input
offset voltage of 0.5 mV, extremely low input bias current of 40 pA, and
a unity gain bandwidth of 1.4 MHz at 5.0 V. The tiny NCS2001 is the
ideal solution for small portable electronic applications and is available
in the space saving SOT23−5 and SC70−5 packages with two industry
standard pinouts.
Features
0.9 V Guaranteed Operation
Rail−to−Rail Common Mode Input Voltage Range
Rail−to−Rail Output Drive Capability
No Output Phase Reversal for Over−Driven Input Signals
0.5 mV Trimmed Input Offset
10 pA Input Bias Current
1.4 MHz Unity Gain Bandwidth at "2.5 V, 1.1 MHz at "0.5 V
Tiny SC70−5 and SOT23−5 Packages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Single Cell NiCd/NiMH Battery Powered Applications
Cellular Telephones
Pagers
Personal Digital Assistants
Electronic Games
Digital Cameras
Camcorders
Hand−Held Instruments
Figure 1. Typical Application
This device contains 63 active transistors.
-
+
0.8 V
to
7.0 V
Rail to Rail Input Rail to Rail Output
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ORDERING INFORMATION
SOT23−5
SN SUFFIX
CASE 483
PIN CONNECTIONS
1
VOUT
VCC
Non−Inverting
Input
2
3
5
4
VEE
Inverting
Input
Style 1 Pinout (SN1T1, SQ1T2)
+−
1
VOUT
VEE
Non−Inverting
Input
2
3
5
4
VCC
Inverting
Input
Style 2 Pinout (SN2T1, SQ2T2)
+−
MARKING DIAGRAMS
x = G for SN1
H for SN2
I for SQ1
J for SQ2
A = Assembly Location
Y = Year
W = Work Week
M = Date Code
G= Pb−Free Package
123
4
5SC70−5
SQ SUFFIX
CASE 419A
M
1
5
See detailed ordering and shipping information in the
p
dimensions section on page 14 of this data sheet.
AAx
|
(Note: Microdot may be in either location)
1
5
MBB AYWG
G
1
5
AAx AYWG
G
NCV2001SN2
1
5
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MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (VCC to VEE) VS7.0 V
Input Differential Voltage Range (Note 1) VIDR VEE −300 mV to 7.0 V V
Input Common Mode Voltage Range (Note 1) VICR VEE −300 mV to 7.0 V V
Output Short Circuit Duration (Note 2) tSc Indefinite sec
Junction Temperature TJ150 °C
Power Dissipation and Thermal Characteristics
SOT23−5 Package
Thermal Resistance, Junction−to−Air
Power Dissipation @ TA = 70°C
SC70−5 Package
Thermal Resistance, Junction−to−Air
Power Dissipation @ TA = 70°C
RqJA
PD
RqJA
PD
235
340
280
286
°C/W
mW
°C/W
mW
Operating Ambient Temperature Range
NCS2001
NCV2001 (Note 3)
TA−40 to +105
−40 to +125
°C
Storage Temperature Range Tstg −65 to 150 °C
ESD Protection at any Pin Human Body Model (Note 4) VESD 1500 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Either or both inputs should not exceed the range of VEE −300 mV to VEE +7.0 V.
2. Maximum package power dissipation limits must be observed to ensure that the maximum junction temperature is not exceeded.
TJ = TA + (PD RqJA).
3. NCV prefix is qualified for automotive usage.
4. ESD data available upon request.
DC ELECTRICAL CHARACTERISTICS
(VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Input Offset Voltage
VCC = 0.45 V, VEE = −0.45 V
TA = 25°C
TA = 0°C to 70°C
TA = −40°C to 125°C
VCC = 1.5 V, VEE = −1.5 V
TA = 25°C
TA = 0°C to 70°C
TA = −40°C to 125°C
VCC = 2.5 V, VEE = −2.5 V
TA = 25°C
TA = 0°C to 70°C
TA = −40°C to 125°C
VIO
−6.0
−8.5
−9.5
−6.0
−7.0
−7.5
−6.0
−7.5
−7.5
0.5
0.5
0.5
6.0
8.5
9.5
6.0
7.0
7.5
6.0
7.5
7.5
mV
Input Offset Voltage Temperature Coefficient (RS = 50)
TA = −40°C to 125°C
DVIO/DT 8.0 mV/°C
Input Bias Current (VCC = 1.0 V to 5.0 V) IIB 10 − pA
Input Common Mode Voltage Range VICR − VEE to VCC − V
Large Signal Voltage Gain
VCC = 0.45 V, VEE = −0.45 V
RL = 10 k
RL = 2.0 k
VCC = 1.5 V, VEE = −1.5 V
RL = 10 k
RL = 2.0 k
VCC = 2.5 V, VEE = −2.5 V
RL = 10 k
RL = 2.0 k
AVOL
20
15
40
20
40
40
40
40
kV/V
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DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.)
Characteristics UnitMaxTypMinSymbol
Output Voltage Swing, High State Output (VID = +0.5 V)
VCC = 0.45 V, VEE = −0.45 V
TA = 25°C
RL = 10 k
RL = 2.0 k
TA = 0°C to 70°C
RL = 10 k
RL = 2.0 k
TA = −40°C to 125°C
RL = 10 k
RL = 2.0 k
VCC = 1.5 V, VEE = −1.5 V
TA = 25°C
RL = 10 k
RL = 2.0 k
TA = 0°C to 70°C
RL = 10 k
RL = 2.0 k
TA = −40°C to 125°C
RL = 10 k
RL = 2.0 k
VCC = 2.5 V, VEE = −2.5 V
TA = 25°C
RL = 10 k
RL = 2.0 k
TA = 0°C to 70°C
RL = 10 k
RL = 2.0 k
TA = −40°C to 125°C
RL = 10 k
RL = 2.0 k
VOH
0.40
0.35
0.40
0.35
0.40
0.35
1.45
1.40
1.45
1.40
1.45
1.40
2.45
2.40
2.45
2.40
2.45
2.40
0.494
0.466
1.498
1.480
2.498
2.475
V
Output Voltage Swing, Low State Output (VID = −0.5 V)
VCC = 0.45 V, VEE = −0.45 V
TA = 25°C
RL = 10 k
RL = 2.0 k
TA = 0°C to 70°C
RL = 10 k
RL = 2.0 k
TA = −40°C to 125°C
RL = 10 k
RL = 2.0 k
VCC = 1.5 V, VEE = −1.5 V
TA = 25°C
RL = 10 k
RL = 2.0 k
TA = 0°C to 70°C
RL = 10 k
RL = 2.0 k
TA = −40°C to 125°C
RL = 10 k
RL = 2.0 k
VCC = 2.5 V, VEE = −2.5 V
TA = 25°C
RL = 10 k
RL = 2.0 k
TA = 0°C to 70°C
RL = 10 k
RL = 2.0 k
TA = −40°C to 125°C
RL = 10 k
RL = 2.0 k
VOL
−0.494
−0.480
−1.493
−1.480
−2.492
−2.479
−0.40
−0.35
−0.40
−0.35
−0.40
−0.35
−1.45
−1.40
−1.45
−1.40
−1.45
−1.40
−2.45
−2.40
−2.45
−2.40
−2.45
−2.40
V
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DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.)
Characteristics UnitMaxTypMinSymbol
Common Mode Rejection Ratio (Vin = 0 to 5.0 V) CMRR 60 70 dB
Power Supply Rejection Ratio (VCC = 0.5 V to 2.5 V, VEE = −2.5 V) PSRR 55 65 dB
Output Short Circuit Current
VCC = 0.45 V, VEE = −0.45 V, VID = "0.4 V
Source Current High Output State
Sink Current Low Output State
VCC = 1.5 V, VEE = −1.5 V, VID = "0.5 V
Source Current High Output State
Sink Current Low Output State
VCC = 2.5 V, VEE = −2.5 V, VID = "0.5 V
Source Current High Output State
Sink Current Low Output State
ISC
0.5
15
40
1.2
−3.0
29
−40
76
−96
−1.5
−20
−50
mA
Power Supply Current (Per Amplifier, VO = 0 V)
VCC = 0.45 V, VEE = −0.45 V
TA = 25°C
TA = 0°C to 70°C
TA = −40°C to 125°C
VCC = 1.5 V, VEE = −1.5 V
TA = 25°C
TA = 0°C to 70°C
TA = −40°C to 125°C
VCC = 2.5 V, VEE = −2.5 V
TA = 25°C
TA = 0°C to 70°C
TA = −40°C to 125°C
ID
0.51
0.72
0.82
1.10
1.10
1.10
1.40
1.40
1.40
1.50
1.50
1.50
mA
AC ELECTRICAL CHARACTERISTICS
(VCC = 2.5 V, VEE = −2.5 V, VCM = VO = 0 V, RL to GND, TA = 25°C unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Differential Input Resistance (VCM = 0 V) Rin u1.0 − tera W
Differential Input Capacitance (VCM = 0 V) Cin − 3.0 − pF
Equivalent Input Noise Voltage (f = 1.0 kHz) en 100 − nV/Hz
Gain Bandwidth Product (f = 100 kHz)
VCC = 0.45 V, VEE = −0.45 V
VCC = 1.5 V, VEE = −1.5 V
VCC = 2.5 V, VEE = −2.5 V
GBW
0.5
1.1
1.3
1.4
MHz
Gain Margin (RL = 10 k, CL = 5.0 pf) Am − 6.5 − dB
Phase Margin (RL = 10 k, CL = 5.0 pf) fm− 60 − °
Power Bandwidth (VO = 4.0 Vpp, RL = 2.0 k, THD = 1.0%, AV = 1.0) BWP− 80 − kHz
Total Harmonic Distortion (VO = 4.0 Vpp, RL = 2.0 k, AV = 1.0)
f = 1.0 kHz
f = 10 kHz
THD
0.008
0.08
%
Slew Rate (VS = "2.5 V, VO = −2.0 V to 2.0 V, RL = 2.0 k, AV = 1.0)
Positive Slope
Negative Slope
SR 1.0
1.0
1.6
1.6
6.0
6.0
V/ms
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V+
2 V/div
1 ms/div)
VCC = 2.5 V
VEE = −2.5 V
RL = 10 k to GND
TA = 25°C
Phase
Margin = 60°
Gain
Phase
−40
−20
0
20
40
60
80
1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
−225
−180
−135
−90
−45
0
45
00 2.0 8.0 10 12
IL, Load Current (mA)
0.1
0.2
0.3
−0.3
−0.2
−0.1
0VCC
VEE
High State Output
Sourcing Current
Low State Output
Sinking Current
VCC = 2.5 V
VEE = −2.5 V
IL to GND
TA = 25°C
4.0 6.0
Vsat, Output Saturation Voltage (V)
V
sat
, Output Saturation Voltage (V)
TA, Ambient Temperature (°C)
Figure 2. Split Supply Output Saturation vs.
Load Resistance Figure 3. Split Supply Output Saturation vs.
Load Current
Figure 4. Input Bias Current vs. Temperature Figure 5. Gain and Phase vs. Frequency
Figure 6. Transient Response Figure 7. Slew Rate
0100 1.0 k 10 k 100 k 1.0 M
RL, Load Resistance (W)
0.2
0.4
0.6
−0.6
−0.4
−0.2
0VCC
VEE
High State Output
Sourcing Current
Low State Output
Sinking Current
VCC = 2.5 V
VEE = −2.5 V
RL to GND
TA = 25°C
AVOL, Gain (dB)
I
IB
, Input Current (pA)
f, Frequency (Hz)
Fm, Excess Phase (°)
1000
100
1.0
00 25 50 75 100 125
10
VCC = 2.5 V
VEE = −2.5 V
−2 V
−2 V
−2 V
−2 V
2 V
2 V
VOUT
2 V/div
V+
0.1 V/di
v
VOUT
0.1 V/di
v
1 ms/div)
0 V
0.2 V
0 V
0.2 V
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0.0
0.2
0.4
0.6
0.8
1.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VS, Supply Voltage (V)
−40°C
25°C85°C
Output Pulsed Test
at 3% Duty Cycle
II
SC
I, Output Short Circuit Current (mA)
0
50
100
150
200
250
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
0
50
100
150
200
250
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
0
10
20
30
40
50
60
70
80
90
1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
0
10
20
30
40
50
60
70
80
90
1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E
+0
1
0
f, Frequency (Hz)
2
3
4
5
6
VS = ±1.5 V
VS = ±2.5 V
VS = ±0.5 V
AV = 1.0
RL = 10 k
TA = 25°C
V
O,
Output Voltage (V
pp
)
ID, Supply Current (mA)
f, Frequency (Hz)
f, Frequency (Hz)
Figure 8. Output Voltage vs. Frequency Figure 9. Common Mode Rejection
vs. Frequency
Figure 10. Power Supply Rejection
vs. Frequency Figure 11. Output Short Circuit Sinking
Current vs. Supply Voltage
VCC = 2.5 V
VEE = −2.5 V
TA = 25°C
PSR, Power Supply Rejection (dB)
VS, Supply Voltage (V)
85°C
Figure 12. Output Short Circuit Sourcing
Current vs. Supply Voltage Figure 13. Supply Current vs. Supply Voltage
PSR +
PSR VCC = 2.5 V
VEE = −2.5 V
TA = 25°C
VS, Supply Voltage (V)
−40°C
25°C
85°C
Output Pulsed Test
at 3% Duty Cycle
CMR, Common Mode Rejection (dB)
IISCI, Output Short Circuit Current (mA)
1.E+03 1.E+04 1.E+05 1.E+06
PSR −
PSR +
25°C
−40°C
: 12.5 V /:/¢// /( F/H __,— +S\ew Rate V : :0.45 V
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TA, Ambient Temperature (°C)
2.0
−50 −25 0 25 50 75 100
1.5
1.0
0.5
0125
RL = 10 k
CL = 10 pF
TA = 25°C+Slew Rate, VS = ±0.45 V
−Slew Rate, VS = ±2.5 V
−Slew Rate, VS = ±0.45 V
+Slew Rate, VS = ±2.5 V
SR, Slew Rate (V/
m
s)
2.5
10
1.0
0.1
0.01
−50 −25 0 25 50 75 100 12
5
TA, Ambient Temperature (°C)
VCC = 2.5 V
VEE = −2.5 V
RL = 10 k
CL = 10 pF
10
1.0
0.01
0.1
f, Frequency (Hz)
10 1.0 k100 100 k10 k
VS = ±2.5 V
Vout = 4.0 Vpp
RL = 2.0 k
TA = 25°C
Figure 14. Total Harmonic Distortion vs.
Frequency with 1.0 V Supply Figure 15. Total Harmonic Distortion vs.
Frequency with 1.0 V Supply
Figure 16. Total Harmonic Distortion vs.
Frequency with 5.0 V Supply Figure 17. Total Harmonic Distortion vs.
Frequency with 5.0 V Supply
f, Frequency (Hz)
f, Frequency (Hz)
f, Frequency (Hz)
10
10
1.0
1.0 k100
0.1
0.001 10 k 100 k
RL = 2.0 k
TA = 25°C
AV = 1.0
AV = 10
AV = 100
AV = 1000
10 1.0 k 10 k100 100
k
0.01
0.1
1.0
10
10 1.0 k100 100 k10 k
VS = ±2.5 V
Vout = 4.0 Vpp
RL = 10 k
TA = 25°C
Figure 18. Slew Rate vs. Temperature Figure 19. Gain Bandwidth Product vs.
Temperature
THD, Total Harmonic Distortion (%)
THD, Total Harmonic Distortion (%)
THD, Total Harmonic Distortion (%)
THD, Total Harmonic Distortion (%)
GBW, Gain Bandwidth Product (MHz)
VS = ±0.5 V
Vout = 0.4 Vpp
RL = 10 k
TA = 25°C
VS = ±0.5 V
Vout = 0.4 Vpp
AV = 1.0
AV = 10
AV = 100
AV = 1000
AV = 1.0
AV = 10
AV = 100
AV = 1000
0.01
AV = 1.0
AV = 10
AV = 100
AV = 1000
0.001
0.9
1.0
1.1
1.2
1.3
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0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
80
0
60
40
20
VS, Supply Voltage (V)
Phase Margin
100
0
60
40
20
Gain Margin
RL = 10 k
CL = 10 pF
TA = 25°C
Fm, Phase Margin (°)
Am, Gain Margin (dB)
100
80
Phase Margin
Gain Margin
80
0
60
40
20
CL, Output Load Capacitance (pF)
AV = 100
VCC = 2.5 V
VEE = −2.5 V
RL = 10 k to GND
TA = 25°C
80
0
60
40
20
1.0 100 100010
Am, Gain Margin (dB)
Fm, Phase Margin (°)
100 100
100
0
60
40
20
80
0
60
40
20
Phase Margin
Gain Margin
−50 −25 0 25 50 75 100 125
VCC = 2.5 V
VEE = −2.5 V
RL = 10 k
CL = 10 pF
TA, Ambient Temperature (°C)
Am, Gain Margin (dB)
Fm, Phase Margin (°)
80
100
VS = ±0.5 V
−20
0
20
40
60
80
−180
−135
−90
−45
RL = 10 k
TA = 25°C
10 k 100 k 1.0 M 10 M 100 M
−225
VS = ±2.5 V
−40
Fm, Phase Margin (°)
10 100 1.0 k 100 k
Phase Margin
Gain Margin
10 k
0
10
20
30
40
60
50
70
VCC = 2.5 V
VEE = −2.5 V
RL = 10 k
CL = 10 pF
TA = 25°C
0
10
20
30
40
60
50
70
Rt, Differential Source Resistance (W)
Figure 20. Voltage Gain and Phase vs.
Frequency Figure 21. Gain and Phase Margin vs.
Temperature
Figure 22. Gain and Phase Margin vs.
Differential Source Resistance Figure 23. Gain and Phase Margin vs.
Output Load Capacitance
f, Frequency (Hz)
Figure 24. Output Voltage Swing vs.
Supply Voltage
0 0.5
VS, Supply Voltage (V)
8.0
0
6.0
4.0
2.0 RL = 10 k
TA = 25°C
Split Supplies
Fm, Excess Phase (°)
A
VOL
, Gain (dB)
A
V
, Gain Margin (dB)
V
OUT
, Output Volltage (V
pp
)
1.0 1.5 2.0 2.5 3.0 3.5
VS = ±2.5 V
Figure 25. Gain and Phase Margin vs.
Supply Voltage
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−3.5
−2.5
−1.5
−0.5
0.5
1.5
2.5
3.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3
.5
VS, Supply Voltage (V)
D Vio = 5.0 mV
RL =
CL = 0
AV = 1.0
TA = 25°C
10
0
15
−5
5
−20
20
VCM, Common Mode Input Voltage Range (V)
VIO, Input Offset Voltage (mV)
−3.0 1.0 2.00−1.0 3.0−2.0
−10
VS = ±2.5 V
RL =
CL = 0
AV = 1.0
TA = 25°C
−15
0
10
20
30
40
50
60
0.0 0.5 1.0 1.5 2.0 2.5
VS, Supply Voltage (V)
Figure 26. Open Loop Voltage Gain vs.
Supply Voltage
TA = 25°C
RL = 10 k
RL = 2.0 k
Figure 27. Input Offset Voltage vs. Common
Mode Input Voltage Range VS = +2.5 V
Figure 28. Input Offset Voltage vs. Common
Mode Input Voltage Range, VS = +0.45 V Figure 29. Common−Mode Input Voltage Range
vs. Power Supply Voltage
A
VOL
, Open Loop Gain (dB)
VCM, Common Mode Input Voltage Range (V)
10
0
15
−5
5
−20
20
VCM, Common Mode Input Voltage Range (V)
V
IO
, Input Offset Voltage (mV)
−10
−15
−0.5 −0.4 −0.3 −0.2 −0.1 0 0.1 0.2 0.3 0.4 0.5
VS = ±2.5 V
RL =
CL = 0
AV = 1.0
TA = 25°C
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APPLICATION INFORMATION AND OPERATING DESCRIPTION
GENERAL INFORMATION
The NCS2001 is an industry first rail−to−rail input,
rail−to−rail output amplifier that features guaranteed
sub−one voltage operation. This unique feature set is
achieved with the use of a modified analog CMOS process
that allows the implementation of depletion MOSFET
devices. The amplifier has a 1.0 MHz gain bandwidth
product, 2.2 V/ms slew rate and is operational over a power
supply range less than 0.9 V to as high as 7.0 V.
Inputs
The input topology chosen for this device series is
unconventional when compared to most low voltage
operational amplifiers. It consists of an N−Channel
depletion mode differential transistor pair that drives a
folded cascade stage and current mirror. This configuration
extends the input common mode voltage range to
encompass the VEE and VCC power supply rails, even when
powered from a combined total of less than 0.9 V. Figures 27
and 28 show the input common mode voltage range versus
power supply voltage.
The differential input stage is laser trimmed in order to
minimize offset voltage. The N−Channel depletion mode
MOSFET input stage exhibits an extremely low input bias
current of less than 10 pA. The input bias current versus
temperature is shown in Figure 4. Either one or both inputs
can be biased as low as VEE minus 300 mV to as high as
7.0 V without causing damage to the device. If the input
common mode voltage range is exceeded, the output will not
display a phase reversal. If the maximum input positive or
negative voltage ratings are to be exceeded, a series resistor
must be used to limit the input current to less than 2.0 mA.
The ultra low input bias current of the NCS2001 allows
the use of extremely high value source and feedback resistor
without reducing the amplifiers gain accuracy. These high
value resistors, in conjunction with the device input and
printed circuit board parasitic capacitances Cin, will add an
additional pole to the single pole amplifier in Figure 30. If
low enough in frequency, this additional pole can reduce the
phase margin and significantly increase the output settling
time. The effects of Cin, can be canceled by placing a zero
into the feedback loop. This is accomplished with the
addition of capacitor Cfb. An approximate value for Cfb can
be calculated by:
Cfb +Rin Cin
Rfb
Figure 30. Input Capacitance Pole Cancellation
+
-Output
Rfb
Cin
Rin
Cfb
Cin = Input and printed circuit board capacitance
Input
Output
The output stage consists of complementary P and
N−Channel devices connected to provide rail−to−rail output
drive. With a 2.0 k load, the output can swing within 50 mV
of either rail. It is also capable of supplying over 75 mA
when powered from 5.0 V and 1.0 mA when powered from
0.9 V.
When connected as a unity gain follower, the NCS2001 can
directly drive capacitive loads in excess of 820 pF at room
temperature without oscillating but with significantly
reduced phase margin. The unity gain follower configuration
exhibits the highest bandwidth and is most prone to
oscillations when driving a high value capacitive load. The
capacitive load in combination with the amplifiers output
impedance, creates a phase lag that can result in an
under−damped pulse response or a continuous oscillation.
Figure 32 shows the effect of driving a large capacitive load
in a voltage follower type of setup. When driving capacitive
loads exceeding 820 pF, it is recommended to place a low
value isolation resistor between the output of the op amp and
the load, as shown in Figure 31. The series resistor isolates the
capacitive load from the output and enhances the phase
margin. Refer to Figure 33. Larger values of R will result in
a cleaner output waveform but excessively large values will
degrade the large signal rise and fall time and reduce the
output amplitude. Depending upon the capacitor
characteristics, the isolation resistor value will typically be
between 50 to 500 W. The output drive capability for resistive
and capacitive loads is shown in Figures 2, 3, and 23.
Figure 31. Capacitance Load Isolation
+
-
Output
R
Isolation resistor R = 50 to 500
CL
Input
Note that the lowest phase margin is observed at cold
temperature and low supply voltage.
www.0nsem om
NCS2001, NCV2001
www.onsemi.com
11
Figure 32. Small Signal Transient Response with Large Capacitive Load
Figure 33. Small Signal Transient Response with Large
Capacitive Load and Isolation Resistor
VS = ±0.45 V
Vin = 0.8 Vpp
R = 0
CL = 820 pF
AV = 1.0
TA = 25°C
Vin
Vout
Vin
Vout
VS = ±0.45 V
Vin = 0.8 Vpp
R = 51
CL = 820 pF
AV = 1.0
TA = 25°C
H H w Li L: Vcc
NCS2001, NCV2001
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12
The non−inverting input threshold levels are set so that
the capacitor voltage oscillates between 1/3 and 2/3 of
VCC. This requires the resistors R1a, R1b and R2 to be of
equal value. The following formula can be used to ap-
proximate the output frequency.
RT
470 k
R2
470 k
R1b
470 k
R1a
470 k
CT
1.0 nF
0.9 V
fO = 1.5 kHz
0.67 VCC
R1b
470 k
VCC
D2
1N4148
fO
-
+
-
+
0.9 V
fO+1
1.39 RTCT
VCC
0.33 VCC
0
Output Voltage
Timing Capacitor
Voltage
VCC R2
470 k
D1
1N4148
10 k
10 k
1.0 M
cw
R1a
470 k
CT
1.0 nF
0.67 VCC
VCC
0.33 VCC
0
Output Voltage
Timing Capacitor
Voltage
0.67 VCC
VCC
0.33 VCC
0
Output Voltage
Timing Capacitor
Voltage
The timing capacitor CT will charge through diode D2 and discharge
through diode D1, allowing a variable duty cycle. The pulse width of the
signal can be programmed by adjusting the value of the trimpot. The ca-
pacitor voltage will oscillate between 1/3 and 2/3 of VCC, since all the
resistors at the non−inverting input are of equal value.
Clock−wise, Low Duty Cycle
Counter−Clock−wise, High Duty Cycle
Figure 34. 0.9 V Square Wave Oscillator
Figure 35. Variable Duty Cycle Pulse Generator
cww
WH>7 0;? www.cnsem iiii ‘HfiW—o
NCS2001, NCV2001
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13
R1
1.0 M
R2
1.0 M
R3
1.0 k
Cin
10 mF
2.5 V
10,000 mF
+
-
Ceff. +R1
R3Cin
−2.5 V
fL+1
2pR1C1[200 Hz
fH+1
2pRfCf[4.0 kHz
Af+1)
Rf
R2+11
Af
fLfH
R1
10 k
Rf
100 k
R2
10 k
Cf
400 pF
0.5 V
−0.5 V
C1
80 nF
VO
+
-
Vin
Figure 36. Positive Capacitance Multiplier
Figure 37. 1.0 V Voiceband Filter
NCS2001, NCV2001
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14
IsVO
435 mA 34.7 mV
212 mA 36.9 mV
3.3 k
R3
1.0 k
RL
Is1.0 V
R4
2.4 k
VL
VO
For best performance, use low
tolerance resistors.
+
-
Rsense
R5
1.0 k
R1
1.0 k
R6
Rsense
VCC
+
-
V
supply
Vin
Isink+
Vin
Rsense
Figure 38. High Compliance Current Sink
Figure 39. High Side Current Sense
R2
75
ORDERING INFORMATION
Device Package Shipping
NCS2001SN1T1G
SOT23−5
(Pb−Free)
3000 / Tape & 7” Reel
NCS2001SN2T1G
NCV2001SN2T1G*
NCS2001SQ1T2G
SC70−5
(Pb−Free)
NCS2001SQ2T2G
NCV2001SQ2T2G*
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
20 an M 0* m" s 250 sun SOLDEHING FOOTPRINT" fl 0,074 g 0 037 \ \ \ \ \ \ \ \ \ J, ‘ ‘ fl ,, L W ,, L ,, 0.039 \ \ 7 f ‘ ‘ a k L 0-025 SCALE um (MEL) ‘For addmona‘ mmrmallon on our PbiFree strategy and so‘denng detafls, please aowmoad me ON Semwconducmr Smdenng and Mounnng Techniques Relerence ManuaL SOLDERRM/D,
NCS2001, NCV2001
www.onsemi.com
15
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE M
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
DIM MIN MAX
MILLIMETERS
A
B
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
M0 10
S2.50 3.00
123
54 S
A
G
B
D
H
CJ
__
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
CSEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
TOP VIEW
SIDE VIEW
A
B
END VIEW
1.35 1.65
2.85 3.15
y—Te
NCS2001, NCV2001
www.onsemi.com
16
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
SQ SUFFIX
CASE 419A−02
ISSUE L
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
B0.2 (0.008) MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
ǒmm
inchesǓ
SCALE 20:1
0.65
0.025
0.65
0.025
0.50
0.0197
0.40
0.0157
1.9
0.0748
SOLDER FOOTPRINT
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NCS2001/D
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