LTC4368 Datasheet

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Datasheet

LTC4368
1
Rev A
For more information www.analog.com
TYPICAL APPLICATION
FEATURES DESCRIPTION
100V UV/OV and Reverse Protection
Controller with Bidirectional Circuit Breaker
24V Application with 10A Circuit Breaker
APPLICATIONS
n Wide Operating Voltage Range: 2.5V to 60V
n Overvoltage Protection to 100V
n Reverse Supply Protection to –40V
n Bidirectional Electronic Circuit Breaker:
n +50mV Forward Sense Threshold
n –50mV Reverse (LTC4368-1)
n –3mV Reverse (LTC4368-2)
n Adjustable ±1.5% Undervoltage and Overvoltage
Thresholds
n Low Operating Current: 80µA
n Low Shutdown Current: 5µA
n Controls Back-to-Back N-Channel MOSFETs
n Blocks 50Hz and 60Hz AC Power
n Hot Swappable Supply Input
n Pin-Selectable Overcurrent Auto-Retry Timer or Latchoff
n 10-Pin MSOP and 3mm × 3mm DFN Packages
n Reverse Battery Protection
n Portable Instrumentation
n Automotive and Industrial Surge Protection
n Energy Storage Systems
Load Protected from Reverse and Overvoltage at VIN
The LT C
®
4368 protects applications from power supply
voltages that may be too high, too low, or even negative
and from overcurrent faults in both forward and reverse
directions. The LTC4368 controls the gate voltage of a pair
of external N-channel MOSFETs to ensure that the load
is connected to the input supply only when there are no
voltage or current faults.
Two comparator inputs allow configuration of the over-
voltage (OV) and undervoltage (UV) set points using an
external resistive divider. A current sense resistor sets the
forward and reverse circuit breaker current thresholds.
After a forward current fault, the LTC4368 will either latch-
off power, or retry after a user adjustable delay. After a
reverse current fault, the LTC4368 waits for the output to
fall 100mV below the input to reconnect power to the load.
The LTC4368 has a 32ms turn-on delay that debounces
live supply input connections and blocks 50Hz and 60Hz
AC power. UV/OV faults also trigger the 32ms recovery
delay before the external MOSFETs are turned back on.
VALID WINDOW
V
IN
V
IN
V
OUT
V
OUT
OV = 36V
UV = 7V
200ms/DIV
–40V
20V/DIV
4368 TA01b
+70V
20V/DIV
+
+50mV
–3mV
VIN
UV
OV RETRY
SHDN
4368 TA01a
FAULT
GATE
VIN
24V
100µF
VOUT
7V TO 36V
SiR870 SiR870
GND
LTC4368-2
464k
1500k
121k
29.4k
3.3nF
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
0.005Ω–40V TO 100V
INRUSH
CONTROL
22k
0.22µF
OV = 36V
UV = 7V
IOUT
–0.6A TO 10A
VOUT
SENSE
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LTC4368
2
Rev A
For more information www.analog.com
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4368CDD-1#PBF LTC4368CDD-1#TRPBF LGTH 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C
LTC4368CDD-2#PBF LTC4368CDD-2#TRPBF LGTK 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C
LTC4368IDD-1#PBF LTC4368IDD-1#TRPBF LGTH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4368IDD-2#PBF LTC4368IDD-2#TRPBF LGTK 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC4368HDD-1#PBF LTC4368HDD-1#TRPBF LGTH 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC4368HDD-2#PBF LTC4368HDD-2#TRPBF LGTK 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC4368CMS-1#PBF LTC4368CMS-1#TRPBF LTGTG 10-Lead Plastic MSOP 0°C to 70°C
LTC4368CMS-2#PBF LTC4368CMS-2#TRPBF LTGTJ 10-Lead Plastic MSOP 0°C to 70°C
LTC4368IMS-1#PBF LTC4368IMS-1#TRPBF LTGTG 10-Lead Plastic MSOP –40°C to 85°C
LTC4368IMS-2#PBF LTC4368IMS-2#TRPBF LTGTJ 10-Lead Plastic MSOP –40°C to 85°C
LTC4368HMS-1#PBF LTC4368HMS-1#TRPBF LTGTG 10-Lead Plastic MSOP –40°C to 125°C
LTC4368HMS-2#PBF LTC4368HMS-2#TRPBF LTGTJ 10-Lead Plastic MSOP –40°C to 125°C
*Temperature grades are identified by a label on the shipping container. Consult ADI Marketing for parts specified with wider operating temperature ranges.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VIN ........................................................ 40V to 100V
Input Voltages
UV, SHDN (Note 3) ........................…….–0.3V to 80V
OV (Note 3) ............................................ 0.3V to 20V
RETRY (Note 3) ....................................... 0.3V to 5V
VOUT, SENSE ............................................10V to 80V
VOUT to SENSE .........................................10V to 10V
VIN to VOUT ........................................... 60V to 100V
TOP VIEW
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
10
9
6
7
8
4
5
3
2
1GATE
SENSE
VOUT
FAULT
SHDN
VIN
UV
OV
RETRY
GND
EXPOSED PAD (PIN 11) PCB GROUND CONNECTION OPTIONAL
TJMAX = 150°C, θJA = 43°C/W
1
2
3
4
5
VIN
UV
OV
RETRY
GND
10
9
8
7
6
GATE
SENSE
VOUT
FAULT
SHDN
TOP VIEW
MS10 PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 160°C/W
ORDER INFORMATION
Output Voltages
FA U LT (Note 3) ....................................... 0.3V to 80V
GATE .............................................. 40V to VIN + 14V
Input Currents
RETRY, UV, OV ,SHDN, FA U LT ...........................1mA
Operating Ambient Temperature Range
LTC4368C ............................................... 0°C to 70°C
LTC4368I ............................................40°C to 85°C
LTC4368H ........................................ . –40°C to 125°C
Storage Temperature Range ................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP Package ................................................. 300°C
(Note 1, Note 2)
LTC4368
3
Rev A
For more information www.analog.com
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN, VOUT, SENSE
VIN Input Voltage: Operating Range
Protection Range
l
l
2.5
–40
60
100
V
V
VIN(UVLO) Input Supply Undervoltage Lockout VIN Rising l 1.8 2.2 2.4 V
IVIN Input Supply Current: On
Off
SHDN=2.5V, SENSE=VOUT=VIN
SHDN=0V, SENSE=VOUT=VIN
l
l
30
5
100
25
µA
µA
IVIN(R) Reverse Input Supply Current VIN=–40V, SENSE=VOUT=0V l –1.5 –2.5 mA
VOUT(UVLO) VOUT Undervoltage Lockout VOUT Rising, VOUT – SENSE=100mV, VIN = 12V l 1.8 2.2 2.4 V
tVOUT(UVLO) VOUT Undervoltage Lockout Delay VIN=12V, VOUT:0V12V, VOUT – SENSE=100mV l40 120 280 µs
IVOUT VOUT Input Current: On
Off
Reverse
SHDN=2.5V, SENSE=VOUT=VIN
SHDN=0V, SENSE=VOUT=VIN
VIN=–40V, SENSE=VOUT=0V
l
l
l
50
3
20
125
20
50
µA
µA
µA
Current Sense
ISENSE SENSE Input Current: On
Off
Reverse
SHDN=2.5V, SENSE=VOUT=VIN
SHDN=0V, SENSE=VOUT=VIN
VIN=–40V, SENSE=VOUT=0V
l
l
l
1.2
0.1
1
2
2
10
µA
µA
µA
ΔVSENSE,F Overcurrent Fault Threshold, Forward
(SENSE – VOUT)
VOUT=VIN
VIN=12V, VOUT=0.5V
VIN=12V, VOUT=0V
l
l
l
40
40
30
50
50
50
60
60
70
mV
mV
mV
ΔVSENSE,R Overcurrent Fault Threshold, Reverse
(SENSE – VOUT)
LTC4368-1 VOUT=VIN
LTC4368-2 VOUT=VIN
l
l
–42
–1
–50
–3
–58
–5
mV
mV
ΔVRR Reverse Overcurrent Re-Enable
Turn-On Threshold (VIN – VOUT)
VIN=SENSE=6V to 60V
VIN=SENSE=2.5V to <6V
l
l
75
20
100
50
125
125
mV
mV
GATE
ΔVGATE Gate Drive (GATE – VOUT) VIN=2.5V, IGATE=0µA, –1µA
VIN=5V, IGATE=0µA, –1µA
VIN=12V to 60V, IGATE=0µA, –1µA
l
l
l
3
7.2
10
4
8.7
11
5.5
10.8
13.1
V
V
V
IGATE(UP) Gate Pull Up Current GATE = 15V, VIN=12V l –20 –35 –60 µA
IGATE(SLOW)
Gate Slow Pull Down Current GATE=20V, VIN=12V l 40 90 160 µA
IGATE(FAST) Gate Fast Pull Down Current GATE=20V, SENSE=VIN=12V l 30 60 90 mA
tD(FAST) Gate Fast Turn Off Delay CGATE=2.2nF: UV, OV Fault l2 6 µs
tD(SLOW) Gate Slow Turn Off Delay CGATE=2.2nF, SHDN Falling, VIN=12V l150 275 575 µs
tD(ON) Gate Turn-On Delay Time VIN=12V, Power Good to ΔVGATE>0V l 22 32 45 ms
tp(GATE) Overcurrent Fault Propagation Delay CGATE=2.2nF, Overcurrent Fault to ΔVGATE = 0V
SENSE VOUT: 0 to +100mV, or
SENSE VOUT: 0 to 100mV (LTC4368-1)
SENSE VOUT: 0 to 10mV (LTC4368-2)
l3 8 18 µs
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 60V, unless otherwise noted (Note 2). UV = 2.5V, OV=0V,
SHDN=2.5V, SENSE=VOUT=VIN unless otherwise specified.
LTC4368
4
Rev A
For more information www.analog.com
Note 1. Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into pins are positive; all voltages are referenced to
GND unless otherwise noted.
Note 3. These pins can be tied to voltages below –0.3V through a resistor
that limits the current below 1mA.
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 2.5V to 60V, unless otherwise noted (Note 2). UV = 2.5V, OV=0V,
SHDN=2.5V, SENSE=VOUT=VIN unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
UV, OV
VUV UV Input Threshold Voltage UV Falling l492.5 500 507.5 mV
VOV OV Input Threshold Voltage OV Rising l492.5 500 507.5 mV
VUVHYST UV Input Hysteresis l20 25 32 mV
VOVHYST OV Input Hysteresis l20 25 32 mV
ILEAK UV, OV Leakage Current V=0.5V, VIN=60V l ±10 nA
tFAULT UV, OV Fault Propagation Delay Overdrive=50mV, VIN=12V l1 2 µs
SHDN
VSHDN SHDN Input Threshold SHDN Falling l0.4 0.75 1.2 V
ISHDN SHDN Input Current SHDN=10V, VIN=60V l±15 nA
tSTART Delay Coming Out of Shutdown Mode SHDN Rising to FAULT, VIN = 12V l400 800 1400 µs
tSHDN(F) SHDN To FAULT Asserted VIN=12V l1.5 3 µs
tLOWPWR Delay From Turn Off to Low Power
Operation
VIN=12V l20 32 48 ms
FAULT
VOL FAULT Output Voltage Low IFAULT=500µA, VIN=12V l0.15 0.4 V
IFAULT FAULT Leakage Current FAULT=5V, VIN=60V l±20 nA
RETRY
VRETRY Configuration Threshold for GATE
Latch-Off
RETRY Falling to ΔIRETRY>2µA
VIN=12V
l0.5 1 1.5 V
IRETRY Output Current for RETRY Timer RETRY=2V, VIN = 12V
RETRY=0V, VIN = 12V
l
l
2.5
–10
3.5
–17
4.5
–25
µA
µA
tCLEAR Minimum SHDN Pulse to Clear Forward
Overcurrent RETRY Latch
RETRY=0V, VIN = 12V l15 µs
tRETRY Forward Overcurrent Cool-Down Delay FAULT Asserted to FAULT Released, CRETRY=22nF
SENSE=VOUT=VIN=12V
l80 120 150 ms
ELECTRICAL CHARACTERISTICS
LTC4368
5
Rev A
For more information www.analog.com
VOUT Operating Current vs
Temperature
VOUT Shutdown Current vs
Temperature VOUT Current vs Reverse VIN
GATE Drive vs GATE Current
GATE Drive vs VIN Supply Voltage
V
OUT
= 12V
V
OUT
= 2.5V
V
OUT
= 60V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
0
15
30
45
60
75
I
VOUT
(µA)
4368 G04
SHDN
= 2.5V
V
IN
= V
OUT
V
OUT
= 12V
V
OUT
= 2.5V
V
OUT
= 60V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
0
1
2
3
4
5
6
I
VOUT
(µA)
4368 G05
SHDN = 0V
VIN = VOUT
25°C
125°C
–45°C
V
OUT
= 0V
V
IN
(V)
0
–10
–20
–30
–40
0
5
10
15
20
I
VOUT
(µA)
4368 G06
V
OUT
= V
IN
V
OUT
= 0V
V
IN
(V)
0
4
8
12
16
20
0
2
4
6
8
10
12
14
∆V
GATE
(V)
4368 G07
TA = 25°C
IGATE = –1µA
V
IN
= V
OUT
= 12V
IGATE(UP) (µA)
0
–10
–20
–30
–40
–50
–60
0
2
4
6
8
10
12
∆VGATE (V)
4368 G08
TA = 125°C
TA = 25°C
TA = –45°C
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Operating Current vs
Temperature VIN Shutdown Current vs Voltage
VIN Supply Current vs Voltage
(–40V to 100V)
V
IN
= 12V
V
IN
= 2.5V
V
IN
= 60V
SHDN
= 2.5V
V
IN
= V
OUT
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
0
10
20
30
40
50
I
VIN
(µA)
4368 G01
V
IN
(V)
0
10
20
30
40
50
60
0
2
4
6
8
I
VIN
(µA)
4368 G02
TA = 125°C
TA = 70°C
TA = 25°C
TA = –45°C
SHDN = 0V
VIN = VOUT
UV = SHDN = 0V
VOUT = 0V
V
IN
(V)
–50
–25
0
25
50
75
100
–2000
–1500
–1000
–500
0
500
I
VIN
(µA)
4368 G03
TA = 125°C
TA = 25°C
TA = –45°C
LTC4368
6
Rev A
For more information www.analog.com
FAULT Output Current vs Voltage
UV/OV Propagation Delay vs
Overdrive GATE Turn-On Delay Time vs VIN
∆VRR Threshold vs VOUT FAULT Leakage vs Temperature
UV, OV Thresholds vs
Temperature
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN
= V
OUT
= 12V
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
492
496
500
504
508
V
UV
(mV)
4368 G09
125°C
25°C
–45°C
V
IN
= 12V
V
OUT
(V)
0
10
20
30
40
50
60
30
48
66
84
102
120
∆V
RR
(mV)
4368 G10
TEMPERATURE (°C)
–50
–25
0
25
50
75
100
125
–2
0
2
4
6
8
10
I
FAULT
(nA)
4368 G11
VIN = 12V
FAULT = 5V
125°C
25°C
–45°C
VIN = 12V
UV = SHDN = 0V
V
OL
(V)
0
2
4
6
8
10
12
0
6
12
18
24
30
I
FAULT
(mA)
4368 G12
VIN = VOUT = 12V
TA = 25°C
OVERDRIVE (mV)
1
10
100
1k
0
10
20
30
40
50
tFAULT (µs)
4368 G13
TA = 125°C
TA = 25°C
TA = –45°C
V
IN
(V)
0
10
20
30
40
50
60
0
10
20
30
40
50
4368 G14
tD(ON) (ms)
V
OUT
V
IN
GATE
DUAL Si7942
1k, 10µF LOAD ON VOUT
5ms/DIV
20V/DIV
1V/DIV
4368 G15
GND
GND
GATE
V
OUT
SHDN
400µs/DIV
3V/DIV
GND
5V/DIV
4368 G16
VIN = 12V
DUAL Si7942 MOSFET
100µF, 12Ω LOAD
SHDN
GATE
V
OUT
DUAL Si7942 MOSFET
100µF, 12Ω LOAD
VIN = 12V
400µs/DIV
5V/DIV
3V/DIV
4368 G17
AC Blocking Turn-On Timing Turn-Off Timing
LTC4368
7
Rev A
For more information www.analog.com
PIN FUNCTIONS
Exposed Pad: The exposed pad may be left open or con-
nected to device ground.
FAULT: Fault Indication Output. Connect to a pull-up resis-
tor. This high voltage open drain output is pulled low if
there is a voltage or current fault, if SHDN is low, or if
VIN has not risen above VIN(UVLO). Leave unconnected if
unused.
GATE: Gate Drive Output for External N-channel MOSFETs.
An internal charge pump provides 35µA of pull-up current
and up to 13.1V of enhancement to the gate of an external
MOSFET. When turned off, GATE is pulled just below the
lower of VIN or VOUT. When VIN goes negative, GATE is
automatically connected to VIN.
GND: Device Ground.
OV: Overvoltage Comparator Input. Connect this pin to an
external resistive divider to set the desired VIN overvolt-
age fault threshold. This input connects an accurate, fast
(1µs) comparator with a 0.5V rising threshold and 25mV
of hysteresis. When OV rises above its threshold, a 60mA
current sink pulls down on the GATE output. When OV
falls back below 0.475V, and after a 32ms GATE turn-on
delay waiting period, the GATE charge pump is enabled.
The low leakage current on this input allows the use of
large valued resistors for the external resistive divider.
Connect to GND if unused.
RETRY: Retry or Latch-Off Selection Input. Connect to
ground to latch off the MOSFETs after a forward over-
current fault. To turn the external MOSFETs back on, the
SHDN pin must be toggled low then high. Connect RETRY
to an external capacitor to configure a 5.5ms/nF delay
before the MOSFETs automatically turn on again. Leave
unconnected if unused.
SENSE: Overcurrent Sense Input. Connect a current
sense resistor between SENSE and VOUT. This input
detects overcurrent faults in both directions: forward
at ΔVSENSE=50mV, and reverse at ΔVSENSE=50mV
(LTC4368-1 option) or ΔVSENSE = –3mV (LTC4368-2
option). When an overcurrent fault is detected, a 60mA
current sink pulls down on the GATE output, thus quickly
disconnecting the load from the input. After a reverse cur-
rent fault, when V
OUT
falls 100mV below V
IN
, the LTC4368
automatically turns on the external MOSFETs. A forward
overcurrent fault uses the RETRY pin to set the conditions
for reconnecting power to the load. Connect to VOUT if
unused.
SHDN: Shutdown Control Input. Assuming no voltage or
current faults, SHDN high enables the GATE charge pump
which in turn enhances the gate of the external N-channel
MOSFETs. A low on SHDN generates a pull down on the
GATE output with a 90µA current sink and places the
LTC4368 in low current mode (5µA). If a forward overcur-
rent condition latches off the external MOSFETs (RETRY
grounded), the SHDN pin must be toggled low then high
to re-enable the charge pump that enhances the external
MOSFETs. If VIN goes above 80V, the SHDN pin voltage
must be kept below 80V.
UV: Undervoltage Comparator Input. Connect this pin to
an external resistive divider to set the desired VIN under-
voltage fault threshold. This input connects to an accu-
rate, fast (1µs) comparator with a 0.5V falling threshold
and 25mV of hysteresis. When UV falls below its thresh-
old, a 60mA current sink pulls down on the GATE output.
When UV rises back above 0.525V, and after a 32ms GATE
turn-on delay waiting period, the GATE charge pump is
enabled. The low leakage current on this input allows the
use of large valued resistors for the external resistive
divider. If unused and VIN is less than 80V, connect to
VIN with a 510k resistor.
VIN: Power Supply Input. Maximum protection range:
40V to 100V. Operating range: 2.5V to 60V. This pin
can be hot swapped and has a 2.2V UVLO.
VOUT: Output Voltage Sense Input. Connect a current
sense resistor between VOUT and SENSE. The GATE
charge pump voltage is referenced to VOUT. It is used as
the charge pump input when V
OUT
is greater than approxi-
mately 5V. The reverse current fault comparators require
that VOUT rise above its 2.2V UVLO. VOUT cannot be hot
swapped with supplies above 24V. Place at least 1µF from
VOUT to GND.
LTC4368
8
Rev A
For more information www.analog.com
BLOCK DIAGRAM
4368 BD
VIN
2.2V
UVLO
0.5V
0.5V
25mV
HYSTERESIS
UV
OV
+
+
SHDN
VIN
–40V TO 100V
5V
LDO IGATE
35µA
REVERSE
PROTECTION
CLOSES SWITCH
WHEN VIN IS NEGATIVE
ENABLE
VOUT
+
GATE
CHARGE
PUMP
f = 400kHz
GATE
SLOW
OFF
FAST
OFF FWD_RESET
REV_RESET
OC_REV OC_FWD
START TIMER
GATE PULLDOWN
FORWARD OVERCURRENT
TIMER
OVERCURRENT
COMPARATORS
9A 60mA
+
+
+
DELAY TIMERS
LOGIC
FAULT
RETRY
+
+
50mV (4368-1)
3mV (4368-2)
+
100mV
50mV
GND
17µA
3.5µA
31 CYCLES
SENSE VOUT
VOUT
VIN
LOGIC
LTC4368
9
Rev A
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OPERATION
Many of todays electronic systems get their power from
external sources such as wall adapters, batteries and cus-
tom power supplies. Figure1 shows a supply arrange-
ment using a DC barrel connector. Power is supplied by
an AC adapter or, if the plug is withdrawn, by a removable
battery. Note that the polarity of the AC adapter and barrel
connector varies by manufacturer. Trouble arises when
any of the following occurs:
The battery is installed backwards
A wall adapter of opposite polarity is attached
A wall adapter of excessive voltage is attached
A wall adapter with an AC output is attached
The battery is discharged below a safe level
The load or the input is shorted to ground or to
another supply
Excessive current flows from the supply to the load
or from the load to the supply
These conditions, if unchecked, can damage electronic
systems and their connectors. Damage can take the form
Figure1. Polarity Protection for DC Barrel Connectors
of a single catastrophic event, or over time as devices
degrade from repeated overstress.
The LTC4368 limits these errant overvoltage and overcur-
rent conditions and helps extend the life of the electronic
systems it protects. When the part detects an overcurrent
or overvoltage fault, it isolates the input supply from the
load by turning off the external back-to-back MOSFETs.
The LTC4368 provides accurate overvoltage and under-
voltage comparators to ensure that power is applied to
the load only if the input supply meets the user selectable
voltage window. Additionally, two accurate overcurrent
comparators disconnect the load from the supply when
excessive current flows in either the forward (+50mV/
RSENSE) or reverse (–50mV or –3mV/RSENSE) direction.
Reverse supply voltage protection circuits automatically
isolate the load from negative input voltages. During nor-
mal operation, a high voltage charge pump enhances the
gate of dual external N-channel power MOSFETs, thus
providing a low loss path for qualified power. Power con-
sumption is 5µA during shutdown and 80µA while operat-
ing. The LTC4368 integrates all these functions in small
10-lead 3mm × 3mm DFN and MSOP packages.
+50mV
–3mV
BATTERY
–40V TO 100V PROTECTION RANGE
AC
ADAPTER
INPUT
OV, UV PROTECTION
THRESHOLDS SET TO
SATISFY LOAD CIRCUIT
+
2.5V TO 60V
OPERATING RANGE LOAD
CIRCUIT
VIN
UV
OV RETRY
SHDN
4368 F01
VOUT
FAULT
GATE
BI-DIRECTIONAL
OVERCURRENT PROTECTION
GND
LTC4368-2
R4
R3
R2
R1
CGATE
SENSE
M1 M2
INRUSH
CONTROL
RGATE
CRETRY
LTC4368
10
Rev A
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VOUT (V)
0
0
∆VGATE (V)
2
4
6
10
8
14
12
15
4365 F03
10
VIN = 12V, 60V
VIN = 5V
VIN = 2.5V
VIN = 3.3V
5
TA = 25°C
IGATE = –1µA
APPLICATIONS INFORMATION
The LTC4368 is an N-channel MOSFET controller that pro-
tects a load from overvoltage faults (both positive and
negative) and from overcurrent faults (both forward and
reverse). A typical application circuit using the LTC4368-2
is shown in Figure2. The circuit provides a low loss con-
nection from VIN to VOUT as long as there are no voltage
or current faults.
Voltages at VIN outside of the 7V to 36V range are
prevented from getting to the load and can be as high as
100V and as negative as –40V. Load currents (including
inrush currents) above 12.5A (forward from VIN to VOUT)
and below 0.75A (reverse from VOUT to VIN) will cause the
load to be disconnected from VIN. The circuit of Figure2
protects against negative voltages at VIN as shown. Note
that the SOA and voltage requirements are not the same
for the two external MOSFETs. During power-up, the input
MOSFET (M1) will stand off more voltage (up to VIN) than
the output MOSFET (M2). The body diode of M2 will limit
its drain to source voltage. This allows the use of smaller
MOSFETs at the output.
During normal operation, the LTC4368 provides up to
13.1V of gate enhancement to the external back-to-back
N-channel MOSFETs. This turns on the MOSFETs, thus
connecting the load at VOUT to the supply at VIN.
GATE Drive
The LTC4368 turns on the external N-channel MOSFETs
by driving the GATE pin above VOUT. The voltage differ-
ence between the GATE and VOUT pins (gate drive) is a
function of VIN and VOUT.
Figure3 highlights the dependence of the gate drive on
VIN and VOUT. When system power is first turned on
(SHDN low to high, SENSE = V
OUT
= 0V), gate drive is
at a maximum for all values of V
IN
. This helps prevent
startup problems into heavy loads by ensuring that there
is enough gate drive to support the load.
VIN
24V
M1
PSMN4R8-100BSE
R4
464k
R3
1500k
R2
121k
R1
29.4k
RETRY
4368 F02
VOUT
FAULT
LTC4368-2
SENSE
0.22µF
VIN
UV
OV
SHDN
GATE
GND
+50mV
–3mV
VOUT
7V TO 36V
–0.75A TO 12.5A
0.004Ω
2.2nF
INRUSH
CONTROL
22k
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
OV = 36V
UV = 7V
M2
SiR662
Figure2. LTC4368-2 Protects Load from Voltage (–40V to 100V) and Current (–0.75A to 12.5A) Faults
Figure3. Gate Drive (GATE – VOUT) vs VOUT
LTC4368
11
Rev A
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The external resistive divider allows the user to select
an input supply range that is compatible with the load
at VOUT. Furthermore, the UV and OV inputs have very
low leakage currents (typically < 1nA at 100°C), allow-
ing for large values in the external resistive divider. In
the application of Figure4, the load is connected to the
supply only if VIN lies between 3.5V and 18V. In the event
that VIN goes above 18V or below 3.5V, the gate of the
external N-channel MOSFET is immediately discharged
with a 60mA current sink, thus isolating the load from
the supply.
Figure5 shows the timing associated with the UV pin.
Once a UV fault propagates through the UV comparator
(tFAULT), the FAULT output is asserted low and a 60mA
current sink discharges the GATE pin. As VOUT falls, the
GATE pin tracks VOUT.
Figure6 shows the timing associated with the OV pin.
Once an OV fault propagates through the OV comparator
(tFAULT), the FAULT output is asserted low and a 60mA
current sink discharges the GATE pin. As VOUT falls, the
GATE pin tracks VOUT.
APPLICATIONS INFORMATION
VIN
12V
UVTH = 3.5V
OVTH = 18V
4368 F04
DISCHARGE GATE
WITH 60mA SINK
LTC4368
OV
COMPARATOR
UV
COMPARATOR
R3
1820k
UV
0.5V
0.5V
OV
R2
243k
R1
59k
+
25mV
+
25mV
Figure4. UV, OV Comparators Monitor 12V Supply
As V
OUT
ramps up from 0V, the absolute value of the GATE
voltage remains fixed until VOUT is greater than the lower
of (VIN 1V) or 5V. Once VOUT crosses this threshold,
gate drive begins to increase up to a maximum of 13.1V.
The curves of Figure3 were taken with a GATE load of
–1µA. If there were no DC load on GATE, the gate drive
for each VIN would be slightly higher.
Note that when VIN is at the lower end of the operating
range, the external N-channel MOSFET must be selected
with a correspondingly lower threshold voltage.
Overvoltage and Undervoltage Protection
The LTC4368 provides two accurate comparators to moni-
tor for overvoltage (OV) and undervoltage (UV) conditions
at V
IN
. If the input supply rises above the user adjust-
able OV threshold, the gates of the external MOSFETs
are quickly turned off, thus disconnecting the load from
the input. Similarly, if the input supply falls below the
user adjustable UV threshold, the gates of the external
MOSFETs are quickly turned off. Figure4 shows a UV/OV
application for an input supply of 12V.
4368 F05
FAULT
GATE
tFAULT
tD(FAST)
VUV VUV + VUVHYST
tD(ON)
EXTERNAL N-CHANNEL MOSFETS
TURN OFF
UV
Figure5. UV Timing (OV < (VOV – VOVHYST), SHDN > 1.2V)
4368 F06
tFAULT
tD(FAST)
VOV VOV – VOVHYST
tD(ON)
EXTERNAL N-CHANNEL MOSFET
TURNS OFF
OV
FAULT
GATE
Figure6. OV Timing (UV > (VUV + VUVHYST), SHDN > 1.2V)
LTC4368
12
Rev A
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APPLICATIONS INFORMATION
The example of Figure4 uses standard 1% resistor values.
The following parameters were selected:
VOS(UV) = 3mV
IUV = 10nA
UVTH = 3.5V
OVTH = 18V
The resistor values can then be solved:
1. R1 +R2 =
3mV
10nA
=300k
2. R3 =2 • 3mV
10nA
• (3.5V – 0.5V) =1.8M
The closest 1% value: R3 = 1.82M
3. R1 =
300k
+
1.82M
2 18V
=58.9k
The closest 1% value: R1 = 59K
R2 = 300K – 59K = 241K
The closest 1% value: R2 = 243K
Therefore: OV = 17.93V, UV = 3.51V.
Limiting Inrush Current During Turn On
Charging large capacitors on VOUT can lead to excessive
inrush currents when LTC4368 turns on the external
N-channel MOSFET. The maximum slew rate at the GATE
pin can be reduced by adding a capacitor on the GATE pin:
Slew Rate =IGATE(UP)
C
GATE
When both the UV and OV faults are removed, the exter-
nal MOSFETs are not immediately turned on. The input
supply must remain within the user selected power good
window for typically 32ms (t
D(ON)
) before the load is again
connected to the supply. This recovery timeout period
filters noise (including line noise) at the input supply and
prevents chattering of power at the load.
Procedure for Selecting UV/OV External Resistor Values
The following 3-step procedure helps select the resistor
values for the resistive divider of Figure4. This procedure
minimizes UV and OV offset errors caused by leakage
currents at the respective pins.
1. Choose maximum tolerable offset at the UV pin,
VOS(UV). Divide by the worst case leakage current at
the UV pin, IUV (10nA). Set the sum of R1 + R2 equal
to V
OS(UV)
divided by 10nA. Note that due to the pres-
ence of R3, the actual offset at UV will be slightly
lower.
R1 +R2 =
V
OS(UV)
IUV
2. Select the desired VIN UV trip threshold, UVTH. Find
the value of R3:
R3 =VOS(UV)
IUV
UV TH – 0.5V
0.5V
3. Select the desired VIN OV trip threshold, OVTH. Find
the values of R1 and R2:
R1 =
VOS(UV)
IUV
+R3
OV
TH
• 0.5V
R2 =VOS(UV)
IUV
– R
1
LTC4368
13
Rev A
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APPLICATIONS INFORMATION
Since the MOSFET acts like a source follower, the slew
rate at VOUT equals the slew rate at GATE. Therefore, the
inrush current due to the capacitance on VOUT is given by:
IINRUSH =COUT
C
GATE
• IGATE(UP)
For example, a 1A inrush current into a 100µF output
capacitance requires a GATE capacitance of (using
IGATE(UP)=35µA):
CGATE =
3A • C
OUT
I
INRUSH
CGATE =3A • 10F
1A
=3.5nF
The 3.3nF CGATE capacitor in the application circuit of
Figure7 limits the inrush current to just over 1A. RGATE
prevents CGATE from slowing down the reverse polarity
protection circuits. It also stabilizes the fast pull-down
circuits and prevents chatter during fault conditions. Set
RGATE to 22k for most applications.
Forward Overcurrent Fault
Forward overcurrent protection prevents large currents
from flowing from VIN to VOUT. This threshold current is
determined by the external sense resistor (R
SENSE
) and an
internal comparator (Figure7, U1) with a 50mV threshold:
IOC,FWD =50mV
R
SENSE
For the example of Figure7, if 2.5A flows to the output
across the 20mΩ sense resistor, the external MOSFETs
(M1, M2) are immediately (8µs) turned off. This discon-
nects the load from the input supply.
Note that during initial startup, the output capacitance
(COUT) charges from ground to VIN. To prevent this
capacitive inrush current (IINRUSH) from falsely trigger-
ing the forward overcurrent comparator, place an inrush
limiting capacitor (CGATE) on the GATE pin (see Limiting
Inrush Current During Turn On). This inrush current plus
the output current must be less than the desired forward
overcurrent threshold:
IOC,FWD > IINRUSH + IOUT
For the example of Figure7, the 3.3nF GATE capacitor
and the 100µF output capacitor limit the inrush current
(I
INRUSH
) to approximately 1A. This means that the output
current (IOUT) must be less than 1.5A during turn on in
order to avoid a forward overcurrent fault during turn on.
Once VOUT has ramped to its final value, the output cur-
rent is limited to 2.5A.
Once a forward overcurrent fault is triggered, there are
two application choices for turning the external MOSFETs
back on:
1. Automatically restart by placing an external capaci-
tor on the RETRY pin. An internal cool-down timer
will charge/discharge this capacitor 31 times with
a 5.5ms/nF total delay. At the end of this delay, the
external MOSFETs are turned back on, thus reconnect-
ing the load to the input supply. The 0.22µF capaci-
tor (C
RETRY
) in the application of Figure7 yields a
1200ms cool-down timer delay. Note that the adjust-
able cool-down period provides the user with a means
of keeping the external MOSFETs within the rated SOA
(safe operating area). See Figure8 timing diagram.
Figure7. Overcurrent Comparators Monitor 2.5A/–0.15A
Current Faults
VIN
24V
IOUT < 2.5A
IOUT
FDS3992
100V DUAL
COUT
100µF
+
RETRY
4368 F07
VOUT
LTC4368-2
SENSE
CRETRY
0.22µF
SHDN
GATE
2.5A
–0.15A
RSENSE
0.02Ω
CGATE
3.3nF
INRUSH
CONTROL:
~1A
RGATE
22k
VIN
M2M1
TURN MOSFETS
BACK ON
TURN MOSFETS
BACK ON AFTER
31 CYCLES
TURN OFF
MOSFETS
START
TIMER
OC FORWARD TIMER/LATCH
RESET FORWARD
OC LATCH
+
+
+
+
+
3mV
+
100mV
50mV
VIN
VOUT
31 CYCLES
U1U2
U3
LTC4368
14
Rev A
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APPLICATIONS INFORMATION
2. Latch off the MOSFETs by grounding the RETRY pin
(no external RETRY capacitor needed). This latches
the forward overcurrent fault. The external MOSFETs
are kept in the off condition until the SHDN input pin is
toggled low then high (tCLEAR pulse width < tLOWPWR).
See Figure9 timing diagram.
Reverse Overcurrent Protection
Reverse overcurrent protection prevents large currents
from flowing from VOUT to VIN. There are two options for
reverse overcurrent protection thresholds. The LTC4368-1
(–50mV) bidirectional circuit breaker allows load current
to flow in either direction: from VIN to VOUT or from VOUT
to V
IN
. The LTC4368-2 provides diode-like behavior by
making the reverse overcurrent threshold (3mV) sig-
nificantly smaller than the forward overcurrent thresh-
old (+50mV). The reverse overcurrent fault threshold is
determined by the external sense resistor (RSENSE) and
an internal comparator (Figure7, U2). For the LTC4368-2
application of Figure7:
IOC,REV =3mV
R
SENSE
=3mV
20mΩ=0.15A
If –0.15A flows from the output across the 20mΩ sense
resistor, the external MOSFETs (M1,M2) are immediately
(8µs) turned off.
To turn the MOSFETs back on, an internal comparator
(Figure7, U3) detects when V
OUT
drops 100mV below
VIN:
VOUT < VIN – 100mV
Once this condition is met, the gates of the external
MOSFETs are turned on again to reconnect the input sup-
ply to the load. See timing diagrams of Figure10. Note
that if the LTC4368-1 option is used, the reverse current
threshold becomes:
IOC,REV =50mV
R
SENSE
SENSE – VOUT
RETRY
tp(GATE)
FAULT
tRETRY
31 CYCLES
(1200ms COOL-DOWN PERIOD)
GATE
50mV
EXTERNAL N-CHANNEL
MOSFETs TURN OFF EXTERNAL N-CHANNEL
MOSFETs TURN BACK ON
0mV
IINRUSH
LIMITED STEADY STATE LOAD
STEADY STATE LOAD
4368 F08
Figure8. Forward Overcurrent Fault with 0.22µF RETRY Capacitor
4368 F08
SENSE – VOUT
SHDN
FAULT
tCLEAR < t < t
LOWPWR
t
GATE
50mV
EXTERNAL N-CHANNEL
MOSFETs TURN OFF
EXTERNAL N-CHANNEL
MOSFETs TURN BACK ON
0mV
IINRUSH
LIMITED STEADY STATE LOAD
STEADY STATE LOAD
tp(GATE)
Figure9. Forward Overcurrent Fault with RETRY Pin Grounded
4368 F10
SENSE – VOUT
VOUT
tp(GATE)
FAULT
GATE – VOUT
–3mV
EXTERNAL N-CHANNEL
MOSFETs TURN BACK ON
0mV IINRUSH
LIMITED
STEADY STATE LOAD
FAULT
VIN – 100mV
11V
0V
Figure10. Reverse Overcurrent Fault: SENSE – VOUT < –3mV
(LTC4368-2)
LTC4368
15
Rev A
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Figure11. Reverse VIN Protection Circuits
VIN
–40V TO
LOAD
Si7942 100V DUAL
COUT
100µF
+
VOUT
LTC4368
SENSEGATE
CGATE
3.3nF
INRUSH
CONTROL
RGATE
22k
VIN
M2
CHOTSWAP
(OPTIONAL
4.4nF)
GND
M1
D1 D2
REVERSE VIN
COMPARATOR
CLOSES SWITCH
WHEN VIN IS NEGATIVE
+
4368 F11
Reverse VIN Protection
The LTC4368’s rugged and hot swappable VIN helps pro-
tect the more sensitive circuits at the output load. If the
input supply is plugged in backwards, or a negative sup-
ply is inadvertently connected, the LTC4368 prevents this
negative voltage from passing to the output load.
As shown in Figure11, external back-to-back N-channel
MOSFETs are required for reverse supply protection. When
VIN goes negative, the reverse VIN comparator closes the
internal switch, which in turn connects the gates of the
external MOSFETs to the negative VIN voltage. The body
diode (D1) of M1 turns on, but the body diode (D2) of M2
remains in reverse blocking mode. This means that the
common source connection of M1 and M2 remains about
a diode drop higher than VIN. Since the gate voltage of
M2 is shorted to VIN, M2 will be turned off and no current
can flow from VOUT to VIN. Note that the voltage rating of
M2 must withstand the reverse voltage excursion at VIN.
parasitic inductance of the VIN and GATE connections, the
voltage at the VIN and GATE pins ring significantly below
–20V. Therefore, hot swapping a negative input voltage
more negative than –20V should not be performed with-
out additional overshoot mitigation techniques in place.
The front page application was used to generate the wave-
forms of Figure12.
APPLICATIONS INFORMATION
The speed of the LTC4368 reverse protection circuits is
evident by how closely the GATE pin follows VIN during
the negative transients. The two waveforms are almost
indistinguishable on the scale shown.
The trace at VOUT, on the other hand, does not respond
to the negative voltage at VIN, demonstrating the desired
reverse supply protection. The waveforms of Figure12
were captured using a 40V dual N-channel MOSFET, a
10µF ceramic output capacitor and no load current on
VOUT.
Hot Swap VIN Protection
The VIN input of the LTC4368 can be live inserted or hot
swapped into a backplane with minor disturbance to the
VIN supply. The idea is to keep the parasitic capacitances
of the external MOSFETs (CGD) from coupling onto the
GATE pin and enhancing the MOSFETs. To improve
positive VIN hot swap capability (without jeopardizing
reverse polarity protection), place CHOTSWAP across the
gate and source terminals of the back-to-back MOSFETs.
Figure 13 illustrates the waveforms that result when
the VIN of the front page application is hot plugged to
+48V. The top trace is VIN. The bottom two traces are the
MOSFETs gate and source terminals. Note that the bottom
two traces ring together and thus keep the MOSFETs off
To avoid large currents when the reverse voltage is hot
plugged, set R
GATE
to 22k. To further improve reverse
hot swap performance, place the optional CHOTSWAP
4.4nF capacitor across the gate and source terminals of
the external MOSFETs.
Figure12 illustrates the waveforms that result when VIN
is hot plugged to –20V. VIN, GATE and VOUT start out at
ground just before the connection is made. Due to the
Figure12. Hot Swapping VIN to –20V
V
OUT
GATE
V
IN
–20V
200ns/DIV
LTC4368 F12
5V/DIV
LTC4368
16
Rev A
For more information www.analog.com
APPLICATIONS INFORMATION
Slow Shutdown
The SHDN input turns off the external MOSFETs in a
slow, controlled manner. When SHDN is asserted low, a
90µA current sink slowly begins to turn off the external
MOSFETs.
Once the voltage at the GATE pin falls below the voltage
at the VOUT pin, the current sink is throttled back and a
feedback loop takes over. This loop forces the GATE volt-
age to track VOUT, thus keeping the external MOSFETs off
as VOUT decays. Note that when VOUT < 2.5V, the GATE
pin is pulled all the way to ground.
Slow gate turn off reduces load current slew rates and
mitigates voltage spikes due to parasitic inductances. To
further decrease GATE pin slew rate, place a capacitor
(CHOTSWAP, see Figure11) across the gate and source
terminals of the external MOSFETs. The waveforms of
Figure15 were captured using the Si7942 Dual N-channel
MOSFETs, and a 2A load with 100µF output capacitor.
V
IN
GREEN (TOP): MOSFET GATE
BLUE (BOTTOM): MOSFET SOURCE
100ns/DIV
10V/DIV
4368 F13
Figure13. Hot Swapping VIN to +48V
SHDN
GATE
V
OUT
100µF, 6Ω LOAD ON VOUT
DUAL Si7942 MOSFET
V
IN
= 12V
400µs/DIV
5V/DIV
4368 F15
GND
Figure15. Slow Shutdown: GATE Tracks VOUT as VOUT Decays
4368 F14
GATE MOSFET OFF MOSFET ON
VIN VIN(UVLO)
VUV
tD(ON)
Figure14. Recovery Timing During Power-On
OV = GND, UV = SHDN = VIN
during the fast transients. To further improve positive
hot swap, place the optional CHOTSWAP=6.8nF capacitor
across the gate/source of the external MOSFETs. For even
more hot swap protection, add a diode (MBR0540) across
RGATE (connect cathode to CGATE). Make sure this diode
has a reverse breakdown of at least 40V.
Recovery Delay Timer
The LTC4368 has a recovery delay timer that filters noise
at VIN and helps prevent chatter at VOUT. After either an OV
or UV fault has occurred, the input supply must return to
the desired operating voltage window for typically 32ms
(tD(ON)) in order to turn the external MOSFET back on, as
illustrated in Figure5 and Figure6. Going out of and then
back into fault in fewer than 32ms will keep the MOSFET
off continuously. Similarly, coming out of shutdown (SHDN
low to high) triggers an 800µs startup delay timer (tSTART,
see Figure16).
The recovery delay timer is also active while the LTC4368
is powering up. The 32ms timer starts once VIN rises
above V
IN(UVLO)
and V
IN
lies within the user selectable
UV/OV power good window. See Figure14.
GATE
VOUT
tD(SLOW)
GATE = VOUT
tSTART
tSHDN(F)
ΔVGATE
SHDN
4368 F16
FAULT
Figure16. Slow Shutdown Timing
LTC4368
17
Rev A
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APPLICATIONS INFORMATION
FAULT Status
The FAULT high voltage open drain output is driven low
if SHDN is asserted low, if VIN is outside the desired UV/
OV voltage window, if there is an overcurrent fault, or if
VIN has not risen above VIN(UVLO). Figures 5, 6, 8, 9, 10
and 16 show the FAULT output timing.
Ideal Diode Alternative
Figure17 shows two LTC4368-2 connected in parallel.
With both devices turned on, the output will be the higher
of V1 or V2. Unlike ideal diode controllers, the LTC4368
always fully enhances the MOSFETs, even at light loads.
Note, however, that if the voltage difference between V1
and V2 is less than 3mV, the reverse overcurrent com-
parators will not detect a fault and up to 150mA can flow
from the higher to the lower supply. Similarly, disconnect-
ing the higher supply may not generate sufficient reverse
current to turn off the MOSFETs. A subsequent reconnec-
tion may result in an inrush current that temporarily trips
the circuit breakers.
By driving the SHDN pins separately, this potential back-
flow can be avoided. VOUT can then be selected from either
V1 or V2, irrespective of which supply voltage is higher or
lower. While in shutdown, the LTC4368-2 drives the GATE
pin just below the lower of VIN and VOUT, thus allowing
VOUT to be larger than VIN while in the off condition.
Single MOSFET Higher Power Application
When reverse VIN protection is not needed, only a single
external N-channel MOSFET is necessary. This provides
the user with a larger selection of MOSFETs (not just dual
packages), especially for higher power applications. Note
that care must be taken to stay within the SOA of the
external MOSFET. The RETRY pin of the LTC4368 can be
used to help keep the MOSFET within its SOA. The user
can ground the RETRY pin to latch off the MOSFET after a
forward current fault. For automatic retry after a forward
current fault, CRETRY must be large enough to maintain a
low on duty cycle for the MOSFET. See Figure18.
V1
VOUT
MOSFETs TURN OFF WHEN REVERSE CURRENT EXCEEDS –150mA
V2
MOSFETs TURN OFF WHEN REVERSE CURRENT EXCEEDS –150mA
VOUT
LTC4368-2
SENSEGATE
VIN
SHDN
–3mV
RSENSE
0.02Ω
SEL V1
VOUT
LTC4368-2
SENSEGATE
VIN
SHDN
–3mV
RSENSE
0.02Ω
SEL V2
4368 F17
Figure17. Alternative to Ideal Diode
OV = 18V
UV = 3.5V
VIN
12V
IOUT
–1A TO 16.67APSMN4R8-100BSE
453k
100µF
1330k
243k
59k
+
RETRY
4368 F18
VOUT
FAULT
LTC4368-2
SENSE
0.22µF
VIN
UV
OV
SHDN
GATE
GND
+50mV
–3mV
VOUT
3.5V TO 18V0.003Ω
2.2nF
INRUSH
CONTROL 22k
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
Figure18. Single MOSFET High Power Application
LTC4368
18
Rev A
For more information www.analog.com
Transients During OV Fault
The circuit of Figure19 is used to illustrate transients
commonly encountered during an overvoltage condition.
The nominal input supply is 48V and it has an overvoltage
threshold of 60V. The parasitic inductance is that of a 1
foot wire (roughly 300nH). Figure20 shows the wave-
forms during on overvoltage condition at V
IN
. These tran-
sients depend on the parasitic inductance and resistance
of the wire along with the capacitance at the VIN node.
D1 is an optional power clamp (TVS, TransZorb) recom-
mended for applications where the DC input voltage can
exceed 24V and with large VIN parasitic inductance. No
clamp was used to capture the waveforms of Figure20. In
order to maintain reverse supply protection, D1 must be
a bidirectional clamp with appropriate voltage and power
ratings.
Layout Considerations
The trace length between the VIN pin and the drain of the
external MOSFET should be minimized, as well as the
trace length between the GATE pin of the LTC4368 and
the gates of the external MOSFETs. The SENSE and VOUT
pins must be connected with traces that tie directly and
solely to the sense resistor.
Place the bypass capacitors at VOUT as close as possible
to the external MOSFET. Use high frequency ceramic
capacitors in addition to bulk capacitors to mitigate hot
swap ringing. Place the high frequency capacitors closest
to the MOSFET. Note that bulk capacitors mitigate ringing
by virtue of their ESR. Ceramic capacitors have low ESR
and can thus ring near their resonant frequency. The trace
length of the GATE pin should be kept as small as pos-
sible, and the number of components connected to the
GATE pin should also be minimized.
The SOA of the external MOSFET might require the board
to have a minimum total area as well as a minimum amount
of trace volume connected to the drain and source pins.
APPLICATIONS INFORMATION
Figure19. OV Fault with Large VIN Inductance
VIN
48V
FDS3992
100V DUAL
R4
100k
COUT
100µF 48Ω
R2
2430k
R1
20.5k
+
D1
RETRY
4368 F19
VOUT
FAULT
LTC4368-2
SENSE
CRETRY
0.22µF
VIN
UV
OV
SHDN
GATE
GND
R
SENSE
0.02Ω
CGATE
3.3nF
INRUSH
CONTROL: ~1A
RGATE
22k
1200ms COOLDOWN
AFTER FORWARD
OC FAULT
300nH
(12 INCH WIRE LENGTH)
OV = 60V
Figure20. Transients During 0V Fault when
No TransZorb (TVS) Is Used
400ns/DIV
V
IN
20V/DIV
V
OUT
20V/DIV
GATE
I
IN
2A/DIV
4368 F20
60V
60V
0A
LTC4368
19
Rev A
For more information www.analog.com
PACKAGE DESCRIPTION
MSOP (MS) 0213 REV F
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1234 5
4.90 ±0.152
(.193 ±.006)
0.497 ±0.076
(.0196 ±.003)
REF
8910 76
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
0.1016 ±0.0508
(.004 ±.002)
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev F)
LTC4368
20
Rev A
For more information www.analog.com
PACKAGE DESCRIPTION
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN REV C 0310
0.25 ±0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.70 ±0.05
3.55 ±
0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
LTC4368
21
Rev A
For more information www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 06/18 Attached Note 3 to OV and FAULT Absolute Maximum Ratings 2
LTC4368
22
Rev A
For more information www.analog.com
ANALOG DEVICES, INC. 2017-2018
D17021-0-6/18(A)
www.analog.com
RELATED PARTS
TYPICAL APPLICATION
LTC2966 Extends UV/OV Hysteresis Window
PART NUMBER DESCRIPTION COMMENTS
LTC4365 Overvoltage, Undervoltage and Reverse Supply
Protection Controller
Wide Operating Range: 2.5V to 34V, Protection Range: –40V to 60V,
No TVS Required for Most Applications
LTC4367 100V Overvoltage, Undervoltage and Reverse Supply
Protection Controller
Wide Operating Range: 2.5V to 60V, Protection Range: –40V to 100V,
No TVS Required for Most Applications
LT4363 High Voltage Surge Stopper with Current Limit Wide Operating Range: 4V to 80V, Reverse Protection to –60V, Adjustable
Output Clamp Voltage
LTC4380 8µA IQ Surge Stopper 4V to 72V Operation, Pin Selectable Clamp Voltage
LTC4364 Surge Stopper with Ideal Diode 4V to 80V Operation, –40V Reverse Input, –20V Reverse Output
LTC4366 High Voltage Surge Stopper 9V to >500V Operation, 8-Pin TSOT and 3mm × 2mm DFN Packages
LTC4361 Overvoltage/Overcurrent Protection Controllers 5.8V Overvoltage Threshold, 85V Absolute Maximum
LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring
LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Adjustable UV and OV Trip Values, ±1.5% Threshold Accuracy
LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies
LTC2955 Pushbutton On/Off Controller Automatic Turn-On, 1.5V to 36V Input, ±36V PB Input
LT4256 Positive 48V Hot Swap Controller with
Open-Circuit Detect
Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output,
Up to 80V Supply
LTC4260 Positive High Voltage Hot Swap Controller with
ADC and I2C
Wide Operating Range 8.5V to 80V
LTC4352 Ideal Diode Controller External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V Operation
LTC4371 Dual Negative Voltage Ideal Diode-OR Controller External N-Channel MOSFETs, –4.5V to > –100V Operation
LTC4355 Dual Positive Voltage Ideal Diode-OR Controller External N-Channel MOSFETs, 0.4µs Turn-Off, 80V Operation
LT1913 Step-Down Switching Regulator 3.6V to 25V Input, 3.5A Maximum Current, 200kHz to 2.4MHz
4368 TA02
REF
200k
1.96k
301k
698k
1nF
301k
150k
750k
INHA
INLA LTC2966
U1
INHB
INLB
VINA VINB
OUTA
OUTB
PSA
RS1A
RS2A
PSB
RS1B
RS2B
GND
100k
100k
VIN
12V
Si7942DP
100µF
510k
+
RETRY
VOUT
FAULT
LTC4368-2
U2
SENSE
VIN
UV
OV
SHDN
GATE
GND
VOUT
0.02Ω
3.3nF 22k
100k
UV: OFF AT 7V
ON AT 10V
OV: OFF AT 18V
ON AT 15V
0.22µF

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