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LTC3260 Datasheet

Linear Technology/Analog Devices

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Datasheet

LTC3260
1
3260fa
Typical applicaTion
FeaTures DescripTion
Low Noise Dual Supply
Inverting Charge Pump
The LT C
®
3260 is a low noise dual polarity output power
supply that includes an inverting charge pump with both
positive and negative LDO regulators. The charge pump
operates over a wide 4.5V to 32V input range and can deliver
up to 100mA of output current. Each LDO regulator can
provide up to 50mA of output current. The negative LDO
post regulator is powered from the charge pump output.
The LDO output voltages can be adjusted using external
resistor dividers.
The charge pump employs either low quiescent current
Burst Mode operation or low noise constant frequency
mode. In Burst Mode operation the charge pump VOUT
regulates to –0.94 VIN, and the LTC3260 draws only
100µA of quiescent current with both LDO regulators on.
In constant frequency mode the charge pump produces
an output equal toVIN and operates at a fixed 500kHz
or to a programmed value between 50kHz to 500kHz us-
ing an external resistor. The LTC3260 is available in low
profile (0.75mm) 3mm x 4mm 14-pin DFN and thermally
enhanced 16-pin MSOP packages.
±12V Outputs from a Single 15V Input LDO Rejection of VOUT Ripple
applicaTions
n VIN Range: 4.5V to 32V
n Inverting Charge Pump Generates –VIN
n Charge Pump Output Current Up to 100mA
n Low Noise Negative LDO Post Regulator
(ILDO = 50mA Max)
n Low Noise Independent Positive LDO Regulator
(ILDO+ = 50mA Max)
n 100µA Quiescent Current in Burst Mode
®
Operation
with Both LDO Regulators On
n 50kHz to 500kHz Programmable Oscillator Frequency
n Stable with Ceramic Capacitors
n Short-Circuit/Thermal Protection
n Low Profile 3mm × 4mm 14-Pin DFN and Thermally
Enhanced 16-Pin MSOP Packages
n Low Noise Bipolar/Inverting Supplies
n Industrial/Instrumentation Low Noise Bias
Generators
n Portable Medical Equipment
n Portable Instruments L, LT , LT C , LT M , Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
10µF10µF
F
10nF
10nF
10µF10µF
909k
909k
200k
100k
100k
12V
–12V
3260 TA01a
LDO+
15V
LDO
ADJ+
LTC3260
RT
ADJ
GND
BYP+
BYP
VIN
VOUT
–15V
EN+
C
MODE
EN
C+
VLDO+
10mV/DIV
AC-COUPLED
VLDO
10mV/DIV
AC-COUPLED
VOUT
10mV/DIV
AC-COUPLED
1µs/DIV 3260 TA01b
VIN = 15V
VLDO+ = 12V
VLDO = –12V
fOSC = 500kHz
ILDO+ = 50mA
ILDO –50mA
LTC3260
2
3260fa
absoluTe MaxiMuM raTings
VIN, EN+, EN, MODE.. ............................... 0.3V to 36V
LDO+ ...........................................................16V to 36V
VOUT, LDO ............................................... 36V to 0.3V
RT, ADJ+ ...................................................... 0.3V to 6V
BYP+ ......................................................... 0.3V to 2.5V
ADJ ............................................................ –6V to 0.3V
BYP ......................................................... –2.5V to 0.3V
(Notes 1, 3)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
BYP+
ADJ+
MODE
EN
LDO+
VIN
C+
EN+
RT
BYP
ADJ
LDO
VOUT
C
TOP VIEW
15
GND
DE PACKAGE
14-LEAD (4mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 43°C/W
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
1
2
3
4
5
6
7
8
EN+
RT
BYP
ADJ
LDO
VOUT
C
NC
16
15
14
13
12
11
10
9
BYP+
ADJ+
MODE
EN
LDO+
VIN
C+
NC
TOP VIEW
MSE PACKAGE
16-LEAD PLASTIC MSOP
17
GND
TJMAX = 150°C, θJA = 43°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
pin conFiguraTion
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3260EDE#PBF LTC3260EDE#TRPBF 3260 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C
LTC3260IDE#PBF LTC3260IDE#TRPBF 3260 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C
LTC3260EMSE#PBF LTC3260EMSE#TRPBF 3260 16-Lead Plastic MSOP –40°C to 125°C
LTC3260IMSE#PBF LTC3260IMSE#TRPBF 3260 16-Lead Plastic MSOP –40°C to 125°C
LTC3260HMSE#PBF LTC3260HMSE#TRPBF 3260 16-Lead Plastic MSOP –40°C to 150°C
LTC3260MPMSE#PBF LTC3260MPMSE#TRPBF 3260 16-Lead Plastic MSOP –55°C to 150°C
Consult LT C Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.Consult LT C Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
VOUT, LDO+, LDO Short-Circuit Duration ........ Indefinite
Operating Junction Temperature Range
(Note 2) .................................................. 5C to 150°C
Storage Temperature Range ................. 6C to 150°C
Lead Temperature (Soldering, 10 sec)
MSE Only ..........................................................30C
LTC3260
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3260fa
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = EN+ = EN = 12V, MODE = 0V, RT = 200kΩ.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Charge Pump
VIN Input Voltage Range l4.5 32 V
VUVLO VIN Undervoltage Lockout Threshold VIN Rising
VIN Falling
l
l
3.4
3.8
3.6
4 V
V
IVIN VIN Quiescent Current Shutdown, EN+ = EN = 0V
EN = 0V, ILDO+ = 0mA
MODE = VIN, EN+ = 0V, IVOUT = ILDO = 0mA
MODE = VIN, IVOUT = ILDO+ = ILDO = 0mA
MODE = 0V, IVOUT = 0mA
2
30
80
100
3.5
5
50
160
200
5.5
µA
µA
µA
µA
mA
VRT RT Regulation Voltage 1.200 V
VOUT VOUT Regulation Voltage MODE = 12V
MODE = 0V
–0.94 • VIN
–VIN
V
V
fOSC Oscillator Frequency RT = GND 450 500 550 kHz
ROUT Charge Pump Output Impedance MODE = 0V, RT = GND 32 Ω
ISHORT_CKT Max IVOUT Short-Circuit Current VOUT = GND l100 160 250 mA
VMODE(H) MODE Threshold Rising l1.1 2.0 V
VMODE(L) MODE Threshold Falling l0.4 1.0 V
IMODE MODE Pin Internal Pull-Down Current VIN = MODE = 32V 0.7 µA
50mA Positive Regulator
LDO+ Output Voltage Range l1.2 32 V
VADJ+ADJ+ Reference Voltage l1.176 1.200 1.224 V
IADJ+ADJ+ Input Current VADJ+ = 1.2V –50 50 nA
ILDO+(SC) LDO+ Short-Circuit Current l50 100 mA
Line Regulation 0.04 mV/V
Load Regulation 0.03 mV/mA
VDROPOUT+LDO+ Dropout Voltage ILDO+ = 50mA 400 800 mV
Output Voltage Noise CBYP+ = 10nF 100 µVRMS
VEN+(H) EN+ Threshold Rising l1.1 2.0 V
VEN+(L) EN+ Threshold Falling l0.4 1.0 V
IEN+EN+ Pin Internal Pull-Down Current VIN = EN+ = 32V 0.7 µA
50mA Negative Regulator
LDO Output Voltage Range l–32 –1.2 V
VADJADJ Reference Voltage l–1.224 –1.200 –1.176 V
IADJADJ Input Current VADJ = –1.2V –50 50 nA
ILDO(SC) LDO Short-Circuit Current l50 100 mA
Line Regulation 0.002 mV/V
Load Regulation 0.02 mV/mA
VDROPOUTLDO Dropout Voltage ILDO = 50mA 200 500 mV
Output Voltage Noise CBYP= 10nF 100 µVRMS
VEN(H) EN Threshold Rising l1.1 2.0 V
VEN(L) EN Threshold Falling l0.4 1.0 V
IENEN Pin Internal Pull-Down Current VIN = EN = 32V 1.4 µA
LTC3260
4
3260fa
Typical perForMance characTerisTics
Oscillator Frequency
vs Supply Voltage Oscillator Frequency vs RTShutdown Current vs Temperature
Quiescent Current vs Temperature
Quiescent Current vs Supply
Voltage (Constant Frequency Mode)
Quiescent Current vs Temperature
(Constant Frequency Mode)
(TA = 25°C, CF LY = 1µF, CIN = COUT = CLDO+ = CLDO = 10µF unless otherwise noted)
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3260 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3260E is guaranteed to meet specifications from
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3260I is guaranteed over the –40°C to 125°C operating junction
temperature range, the LTC3260H is guaranteed over the –40°C to 150°C
operating junction temperature range and the LTC3260MP is tested and
guaranteed over the full –55°C to 150°C operating junction temperature
range. Note that the maximum ambient temperature consistent with
these specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PDθJA),
where θJA = 43°C/W is the package thermal impedance.
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 150°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
SUPPLY VOLTAGE (V)
0
OSCILLATOR FREQUENCY (kHz)
400
500
600
15 25
3260 G01
300
200
5 10 20 30 35
100
0
RT = GND
RT = 200kΩ
RT (kΩ)
200
OSCILLATOR FREQUENCY (kHz)
400
600
100
300
500
1 100 1000 10000
3260 G02
0
10
TEMPERATURE (°C)
–50
SHUTDOWN CURRENT (µA)
10
20
150
3260 G03
0050 100
–25 25 75 125
30
5
15
25
VIN = 32V
VIN = 12V
VIN = 5V
TEMPERATURE (°C)
–50
QUIESCENT CURRENT (µA)
80
120
150
3260 G04
40
0050 100
–25 25 75 125
160
60
100
20
140 Burst Mode OPERATION
WITH BOTH LDOs ON
POSITIVE LDO ON
Burst Mode OPERATION
WITH NEGATIVE LDO ON
VIN = 12V
SUPPLY VOLTAGE (V)
0
QUIESCENT CURRENT (mA)
14
15
3260 G05
8
4
5 10 20
2
0
16
12
10
6
25 30 35
fOSC = 500kHz
fOSC = 200kHz
fOSC = 50kHz
TEMPERATURE (°C)
50
0
QUIESCENT CURRENT (mA)
1
3
4
5
10
7
050 75
3260 G06
2
8
9
6
25 25 100 125 150
fOSC = 500kHz
fOSC = 200kHz
fOSC = 50kHz
VIN = 12V
LTC3260
5
3260fa
Typical perForMance characTerisTics
LDO+ GND Pin Current vs ILOAD LDO+ Load Regulation
ADJ+ Pin Voltage vs Temperature
Effective Open-Loop Resistance
vs Supply Voltage
LDO+ Dropout Voltage
vs Temperature
LDO+ Supply Rejection
Effective Open-Loop Resistance
vs Temperature
VOUT Short-Circuit Current
vs Supply Voltage
Voltage Loss (VIN – |VOUT|)
vs Output Current (Constant
Frequency Mode)
(TA = 25°C, CF LY = 1µF, CIN = COUT = CLDO+ = CLDO = 10µF unless otherwise noted)
SUPPLY VOLTAGE (V)
0 5
0
VOUT SHORT-CIRCUIT CURRENT (mA)
100
250
10 20 25
3260 G08
50
200
150
15 30 35
RT = GND
RT = 200kΩ
OUTPUT CURRENT (mA)
0.1
0
VOLTAGE LOSS (V)
2.0
2.5
3.0
fOSC = 50kHz
fOSC = 200kHz
fOSC = 500kHz
1 10 100
3260 G09
1.5
1.0
0.5
VIN = 12V
TEMPERATURE (°C)
–50
ADJ+ PIN VOLTAGE (V)
1.200
1.212
150
3260 G11
1.188
1.176 050 100
–25 25 75 125
1.224
ILOAD (mA)
0
0.08
GND PIN CURRENT (mA)
0.10
0.12
0.14
1 10 100
3260 G14
0.06
0.04
0.02
0
VIN = 12V
SUPPLY VOLTAGE (V)
0
0
EFFECTIVE OPEN-LOOP RESISTANCE (Ω)
10
30
40
50
20
90
3260 G10
20
10
525
15 3530
60
70
80
fOSC = 200kHz
fOSC = 500kHz
TEMPERATURE (°C)
50
0
EFFECTIVE OPEN-LOOP RESISTANCE (Ω)
10
20
30
40
0 50 100 150
3620 G07
50
60
25 25 75 125
VIN = 32V
VIN = 25V
VIN = 12V
fOSC = 500kHz
TEMPERATURE (°C)
–50
LDO+ DROPOUT VOLTAGE (mV)
400
600
150
3260 G12
200
0050 100
–25 25 75 125
800 VIN = 12V
ILDO+ = 50mA
300
500
100
700
FREQUENCY (kHz)
20
LDO+ SUPPLY REJECTION (dB)
40
60
10
30
50
0.1 10 100 1000
3260 G13
0
1
VIN = 6.5V
VLDO+ = 5V
ILDO+ = 50mA
VRIPPLE = 50mVRMS
CLDO+ = 10µF
ILDO+ (mA)
0.1
1.1994
VLDO+ (V)
1.2002
1.2004
1.2006
1 10 100
3260 G15
1.2000
1.1998
1.1996
VIN = 12V
UNITY GAIN
LTC3260
6
3260fa
Typical perForMance characTerisTics
LDO+ Load Transient
LDO Load Transient
VOUT Transient (Burst Mode
Operation, MODE = H)
VOUT Transient
(MODE = Low to High)
LDO Rejection of VOUT RippleLDO Load Regulation
(TA = 25°C, CF LY = 1µF, CIN = COUT = CLDO+ = CLDO = 10µF unless otherwise noted)
ADJ Pin Voltage vs Temperature
LDO Dropout Voltage
vs Temperature LDO Power Supply Rejection
TEMPERATURE (°C)
–50
ADJ PIN VOLTAGE (V)
–1.200
–1.188
150
3260 G16
–1.212
–1.224 050 100
–25 25 75 125
–1.176
TEMPERATURE (°C)
–50
LDO DROPOUT VOLTAGE (mV)
200
300
150
3260 G17
100
0050 100
–25 25 75 125
400 VOUT = –12V
ILDO = 50mA
150
250
50
350
FREQUENCY (kHz)
20
LDO SUPPLY REJECTION (dB)
40
60
10
30
50
0.1 10 100 1000
3260 G18
0
1
VOUT = –6.5V
VLDO = –5V
ILDO = –50mA
VRIPPLE = 50mVRMS
CLDO = 10µF
ILDO (mA)
0.1
–1.2006
VLDO (V)
–1.1998
–1.1996
–1.1994
1 10 100
3260 G19
–1.2000
–1.2002
–1.2004
VOUT = –12V
UNITY GAIN
1µs/DIV 3260 G20
VLDO+
10mV/DIV
AC-COUPLED
VLDO
10mV/DIV
AC-COUPLED
VOUT
10mV/DIV
AC-COUPLED
VIN = 15V
VLDO+ = 12V
VLDO = –12V
fOSC = 500kHz
ILDO+ = 50mA
ILDO –50mA
VLDO+
10mV/DIV
AC-COUPLED
ILDO+
40µs/DIV 3260 G21
VIN = 12V
VLDO+ = 5V
20mA
2mA
VLDO
10mV/DIV
AC-COUPLED
ILDO
40µs/DIV 3260 G22
VIN = 12V
VLDO= –5V
REFER TO FIGURE 3
–2mA
–20mA
VOUT
500mV/DIV
AC-COUPLED
IOUT
2ms/DIV 3260 G23
VIN = 12V
fOSC = 500kHz
–5mA
–50mA
VOUT
500mV/DIV
AC-COUPLED
2ms/DIV 3260 G24
VIN = 12V
fOSC = 500kHz
IOUT = –5mA
MODE
LTC3260
7
3260fa
pin FuncTions
(DFN/MSOP)
EN+ (Pin 1/ Pin 1): Logic Input. A logichigh” on the EN+
pin enables the positive low dropout (LDO+) regulator.
RT (Pin 2/Pin 2): Input Connection for Programming the
Switching Frequency. The RT pin servos to a fixed 1.2V
when the EN pin is driven to a logichigh”. A resistor from
RT to GND sets the charge pump switching frequency. If
the RT pin is tied to GND, the switching frequency defaults
to a fixed 500kHz.
BYP (Pin 3/ Pin 3): LDO Reference Bypass Pin. Connect
a capacitor from BYP to GND to reduce LDO output
noise. Leave floating if unused.
ADJ (Pin 4/ Pin 4): Feedback Input for the Negative Low
Dropout Regulator. This pin servos to a fixed voltage of
–1.2V when the control loop is complete.
LDO (Pin 5/ Pin 5): Negative Low Dropout (LDO) Linear
Regulator Output. This pin requires a low ESR (equivalent
series resistance) capacitor with at leastF capacitance
to ground for stability.
VOUT (Pin 6/ Pin 6): Charge Pump Output Voltage. In
constant frequency mode (MODE = low) this pin is driven
toVIN. In Burst Mode operation, (MODE = high) this pin
voltage is regulated to –0.94 VIN using an internal burst
comparator with hysteretic control.
C (Pin 7/ Pin 7): Flying Capacitor Negative Connection.
C+ (Pin 8/ Pin 10): Flying Capacitor Positive Connection.
NC (Pins 8, 9 MSOP Only): No Connect. These pins are not
connected to the LT C 3260 die. These pins should be left
floating, connected to ground or shorted to adjacent pins.
VIN (Pin 9/ Pin 11): Input Voltage for Both Charge Pump
and Positive Low Dropout (LDO+) Regulator. VIN should
be bypassed with a low impedance ceramic capacitor.
LDO+ (Pin 10/ Pin 12): Positive Low Dropout (LDO+)
Output. This pin requires a low ESR capacitor with at least
2µF capacitance to ground for stability.
EN (Pin 11/ Pin 13): Logic Input. A logichigh” on the
EN pin enables the inverting charge pump as well as the
negative LDO regulator.
MODE (Pin 12/ Pin 14): Logic Input. The MODE pin deter-
mines the charge pump operating mode. A logichigh”
on the MODE pin forces the charge pump to operate in
Burst Mode operation regulating VOUT to approximately
–0.94 VIN with hysteretic control. A logiclow” on the
MODE pin forces the charge pump to operate as an open-
loop inverter with a constant switching frequency. The
switching frequency in both modes is determined by an
external resistor from the RT pin to GND. In Burst Mode
operation, this represents the frequency of the burst cycles
before the part enters the low quiescent current sleep state.
ADJ+ (Pin 13/ Pin 15): Feedback Input for the Positive
Low Dropout (LDO+) Regulator. This pin servos to a fixed
voltage of 1.2V when the control loop is complete.
BYP+ (Pin 14/Pin 16): LDO+ Reference Bypass Pin. Con-
nect a capacitor from BYP+ to GND to reduce LDO+ output
noise. Leave floating if unused.
GND (Exposed Pad Pin 15/ Exposed Pad Pin 17): Ground.
The exposed package pad is ground and must be soldered
to the PC board ground plane for proper functionality and
for rated thermal performance.
LTC3260
8
3260fa
block DiagraM
Note: Pin numbers are as per DFN package. Refer to the Pin Functions section for corresponding MSOP pin numbers.
9 10
13
14
+
+
1.2V
REF
INVERTING
CHARGE PUMP
–1.2V
REF
CHARGE
PUMP
AND
INPUT
LOGIC
50kHz
TO
500kHz
OSC
LDO+
EN+
VIN
C+
S1
S4
S3
ADJ+
BYP+
3
4
BYP
ADJ
5
15
LDO
GND
1
8
CS2
7
RT
2
EN
11
MODE
12
VOUT
6
operaTion
(Refer to the Block Diagram)
The LTC3260 is a high voltage low noise dual output
regulator. It includes an inverting charge pump and two
LDO regulators to generate bipolar low noise supply rails
from a single positive input. It supports a wide input power
supply range from 4.5V to 32V.
Shutdown Mode
In shutdown mode, all circuitry except the internal bias is
turned off. The LTC3260 is in shutdown when a logic low
is applied to both the enable inputs (EN+ and EN). The
LTC3260 only draws 2µA (typical) from the VIN supply
in shutdown.
Charge Pump Constant Frequency Operation
The LTC3260 provides low noise constant frequency op-
eration when a logic low is applied to the MODE pin. The
charge pump and oscillator circuit are enabled using the
EN pin. At the beginning of a clock cycle, switches S1 and
S2 are closed. The external flying capacitor across the C+
and C pins is charged to the VIN supply. In the second
phase of the clock cycle, switches S1 and S2 are opened,
while switches S3 and S4 are closed. In this configuration
the C+ side of the flying capacitor is grounded and charge
is delivered through the C pin to VOUT. In steady state
the VOUT pin regulates atVIN less any voltage drop due
to the load current on VOUT or LDO.
LTC3260
9
3260fa
operaTion
(Refer to the Block Diagram)
Figure 1. Oscillator Frequency vs RT
The charge transfer frequency can be adjusted between
50kHz and 500kHz using an external resistor on the RT
pin. At slower frequencies the effective open-loop output
resistance (ROL) of the charge pump is larger and it is able
to provide smaller average output current. Figure 1 can
be used to determine a suitable value of RT to achieve a
required oscillator frequency. If the RT pin is grounded,
the part operates at a constant frequency of 500kHz.
RT (kΩ)
200
OSCILLATOR FREQUENCY (kHz)
400
600
100
300
500
1 100 1000 10000
3260 F01
0
10
Charge Pump Burst Mode Operation
The LTC3260 provides low power Burst Mode operation
when a logic high is applied to the MODE pin. In Burst
Mode operation, the charge pump charges the VOUT pin to
–0.94 VIN (typical). The part then shuts down the internal
oscillator to reduce switching losses and goes into a low
current state. This state is referred to as the sleep state in
which the IC consumes only about 100µA with both LDOs
enabled. When the output voltage droops enough to over-
come the burst comparator hysteresis, the part wakes up
and commences charge pump cycles until output voltage
exceeds –0.94 VIN (typical). This mode provides lower
operating current at the cost of higher output ripple and
is ideal for light load operation.
The frequency of charging cycles is set by the external
resistor on the RT pin. The charge pump has a lower
ROL at higher frequencies. For Burst Mode operation it is
recommended that the RT pin be tied to GND. This mini-
mizes the charge pump ROL, quickly charges the output
up to the burst threshold and optimizes the duration of
the low current sleep state.
Charge Pump Soft-Start
The LTC3260 has built in soft-start circuitry to prevent
excessive current flow during start-up. The soft-start is
achieved by internal circuitry that slowly ramps the amount
of current available at the output storage capacitor. The
soft-start circuitry is reset in the event of a commanded
shutdown or thermal shutdown.
Charge Pump Short-Circuit/Thermal Protection
The LTC3260 has built-in short-circuit current limit as
well as overtemperature protection. During a short-circuit
condition, the part automatically limits its output current
to approximately 160mA. If the junction temperature
exceeds approximately 175°C the thermal shutdown
circuitry disables current delivery to the output. Once
the junction temperature drops back to approximately
165°C current delivery to the output is resumed. When
thermal protection is active the junction temperature is
beyond the specified operating range. Thermal protection
is intended for momentary overload conditions outside
normal operation. Continuous operation above the speci-
fied maximum operating junction temperature may impair
device reliability.
Positive Low Dropout Linear Regulator (LDO+)
The positive low dropout regulator (LDO+) supports a load
of up to 50mA. The LDO+ takes power from the VIN pin
and drives the LDO+ output pin to a voltage programmed
by the resistor divider connected between the LDO+, ADJ+
and GND pins. For stability, the LDO+ output must be by-
passed to ground with a low ESR ceramic capacitor that
maintains a capacitance of at leastF across operating
temperature and voltage.
The LDO+ is enabled or disabled via the EN+ logic input pin.
When the LDO+ is enabled, a soft-start circuit ramps its
regulation point from zero to the final value over a period
of 75µs, reducing the inrush current on VIN.
LTC3260
10
3260fa
operaTion
(Refer to the Block Diagram)
Figure 2 shows the LDO+ regulator application circuit.
The LDO+ output voltage VLDO+ can be programmed by
choosing suitable values of R1 and R2 such that:
VLDO+=1.2V R1
R2 +1
An optional capacitor of 10nF can be connected from the
BYP+ pin to ground. This capacitor bypasses the internal
1.2V reference of the LTC3260 and improves the noise
performance of the LDO+. If this function is not used the
BYP+ pin should be left floating.
negative by the charge pump circuitry. Soft-start circuitry
in the charge pump also provides soft-start functionality
for the LDO and prevents excessive inrush currents.
Figure 3 shows the LDO regulator application circuit.
The LDO output voltage VLDO can be programmed by
choosing suitable values of R1 and R2 such that:
VLDO=–1.2V R1
R2 +1
When the inverting charge pump is in Burst Mode opera-
tion (MODE = high), the typical hysteresis on the VOUT
pin is 2% of VIN voltage. The LDO voltage should be set
high enough above VOUT in order to prevent LDO from
entering dropout during normal operation.
An optional capacitor of 10nF can be connected from the
BYP pin to ground. This capacitor bypasses the internal
–1.2V reference of the LTC3260 and improves the noise
performance of the LDO. If this function is not used the
BYP
pin should be left floating.
In order to improve transient response, an optional
capacitor, CADJ, may be used as shown in Figure 3. A
recommended value for CADJ is 10pF. Experimentation
with capacitor values between 2pF and 22pF may yield
improved transient response.
Figure 2: Positive LDO Application Circuit
VIN
1
0
LDO+
EN+
ADJ+
GND
BYP+
CBYP+
COUT
LTC3260
LDO
OUTPUT
R2
3260 F02
R1
1.2V
REF
Figure 3: Negative LDO Application Circuit
VOUT
1
0
LDO
EN
ADJ
GND
BYPCBYP
CADJ
COUT
3260 F03
LTC3260
LDO
OUTPUT
R2
R1
–1.2V
REF
Negative Low Dropout Linear Regulator (LDO)
The negative low dropout regulator (LDO) supports a
load of up to 50mA. The LDO takes power from the VOUT
pin (output of the inverting charge pump) and drives the
LDO output pin to a voltage programmed by the resis-
tor divider connected between the LDO, ADJ and GND
pins. For stability, the LDO output must be bypassed to
ground with a low ESR ceramic capacitor that maintains a
capacitance of at leastF across operating temperature
and voltage.
The LDO is enabled or disabled via the EN logic input
pin. Initially, when the EN logic input is low, the charge
pump circuitry is disabled and the VOUT pin is at GND.
When EN is switched high, the VOUT pin will be driven
LTC3260
11
3260fa
applicaTions inForMaTion
Effective Open-Loop Output Resistance
The effective open-loop output resistance (ROL) of a charge
pump is a very important parameter which determines the
strength of the charge pump. The value of this parameter
depends on many factors such as the oscillator frequency
(fOSC), value of the flying capacitor (CF LY ), the nonoverlap
time, the internal switch resistances (RS) and the ESR of
the external capacitors.
Typical ROL values as a function of temperature are shown
in Figure 4
minimum turn-on time. The peak-to-peak output ripple at
the VOUT pin is approximately given by the expression:
VRIPPLE(P-P) IOUT
COUT
1
fOSC
– tON
where COUT is the value of the output capacitor, fOSC is the
oscillator frequency and tON is the on-time of the oscillator
(1µs typical).
Just as the value of COUT controls the amount of output
ripple, the value of CIN controls the amount of ripple present
at the input (VIN) pin. The amount of bypass capacitance
required at the input depends on the source impedance
driving VIN. For best results it is recommended that VIN
be bypassed with at leastF of low ESR capacitance. A
high ESR capacitor such as tantalum or aluminum will
have higher input noise than a low ESR ceramic capacitor.
Therefore, a ceramic capacitor is recommended as the
main bypass capacitance with a tantalum or aluminum
capacitor used in parallel if desired.
Flying Capacitor Selection
The flying capacitor controls the strength of the charge
pump. AF or greater ceramic capacitor is suggested
for the flying capacitor for applications requiring the full
rated output current of the charge pump.
For very light load applications, the flying capacitor may
be reduced to save space or cost. For example, a 0.2µF
capacitor might be sufficient for load currents up to 20mA.
A smaller flying capacitor leads to a larger effective open-
loop resistance (ROL) and thus limits the maximum load
current that can be delivered by the charge pump.
Ceramic Capacitors
Ceramic capacitors of different materials lose their capaci-
tance with higher temperature and voltage at different rates.
For example, a capacitor made of X5R or X7R material
will retain most of its capacitance from –40°C to 85°C
whereas a Z5U or Y5V style capacitor will lose considerable
capacitance over that range. Z5U and Y5V capacitors may
Figure 4. Typical ROL vs Temperature
Input/Output Capacitor Selection
The style and value of capacitors used with the LTC3260
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum turn-on time. To reduce noise and ripple,
it is recommended that low ESR ceramic capacitors be
used for the charge pump and LDO outputs. All capacitors
should retain at leastF of capacitance over operating
temperature and bias voltage. Tantalum and aluminum
capacitors can be used in parallel with a ceramic capacitor
to increase the total capacitance but should not be used
alone because of their high ESR. In constant frequency
mode, the value of COUT directly controls the amount of
output ripple for a given load current. Increasing the size of
COUT will reduce the output ripple at the expense of higher
TEMPERATURE (°C)
50
0
EFFECTIVE OPEN-LOOP RESISTANCE (Ω)
10
20
30
40
0 50 100 150
3620 F04
50
60
25 25 75 125
VIN = 32V
VIN = 25V
VIN = 12V
fOSC = 500kHz
LTC3260
12
3260fa
applicaTions inForMaTion
also have a poor voltage coefficient causing them to lose
60% or more of their capacitance when the rated voltage
is applied. Therefore when comparing different capacitors,
it is often more appropriate to compare the amount of
achievable capacitance for a given case size rather than
discussing the specified capacitance value. The capacitor
manufacture’s data sheet should be consulted to ensure
the desired capacitance at all temperatures and voltages.
Table 1 is a list of ceramic capacitor manufacturers and
their websites.
Table 1
AVX www.avxcorp.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay www.vishay.com
TDK www.component.tdk.com
Layout Considerations
Due to high switching frequency and high transient currents
produced by LTC3260, careful board layout is necessary
for optimum performance. A true ground plane and short
connections to all the external capacitors will improve
performance and ensure proper regulation under all condi-
tions. Figure 5 shows an example layout for the LTC3260.
The flying capacitor nodes C+ and C switch large cur-
rents at a high frequency. These nodes should not be
routed close to sensitive pins such as the LDO feedback
pins (ADJ+ and ADJ) and internal reference bypass pins
(BYP+ and BYP).
Thermal Management
At high input voltages and maximum output current, there
can be substantial power dissipation in the LTC3260. If
the junction temperature increases above approximately
175°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
ground plane is recommended. Connecting the exposed pad
of the package to a ground plane under the device on two
layers of the PC board can reduce the thermal resistance
of the package and PC board considerably.
Derating Power at High Temperatures
To prevent an overtemperature condition in high power
applications, Figure 6 should be used to determine the
maximum combination of ambient temperature and power
dissipation.
The power dissipated in the LTC3260 should always fall
under the line shown for a given ambient temperature. The
power dissipated in the LTC3260 has three components.
Power dissipated in the positive LDO:
PLDO+ = (VIN – VLDO+) • ILDO+
Power dissipated in the negative LDO:
PLDO = (|VOUT| – |VLDO|) • ILDOand
Power dissipated in the inverting charge pump:
PCP = (VIN – |VOUT|) • (IOUT + ILDO)
where IOUT denotes any additional current that might be
pulled directly from the VOUT pin. The LDO current is
also supplied by the charge pump through VOUT and is
therefore included in the charge pump power dissipation.
The total power dissipation of the LTC3260 is given by:
PD = PLDO+ + PLDO + PCP
Figure 5. Recommended Layout
VOUT
VIN
LDO
LDO+
GND
3260 F05
CBYP+
CF LY
GND
RT
CBYP
LTC3260
13
3260fa
applicaTions inForMaTion
The derating curve in Figure 6 assumes a maximum ther-
mal resistance, θJA, of 43°C/W for the package. This can
be achieved with a four layer PCB that includes 2oz Cu
traces and six vias from the exposed pad of the LTC3260
to the ground plane.
It is recommended that the LTC3260 be operated in the
region corresponding to TJ ≤ 150°C for continuous op-
eration as shown in Figure 6. Operation beyond 150°C
should be avoided as it may degrade part performance
and lifetime. At high temperatures, typically around 175°C,
the part is placed in thermal shutdown and all outputs are
disabled. When the part cools back down to a low enough
temperature, typically around 165°C, the outputs are re-
enabled and the part resumes normal operation.
Figure 6. Maximum Power Dissipation vs Ambient Temperature
Typical applicaTions
Low Power ±24V Power Supply from a Single-Ended 28V Input Supply
C4
4.7µF
C1
4.7µF
C2
F
C7
4.7µF
C3
4.7µF
R4
1.91M
R1
1.91M
R3
100k
R2
100k
24V
–24V
3260 TA02
LDO+
9
1
11
12
8
7
6
2
5
4
3
15
14
13
10
28V
LDO
ADJ+
LTC3260
RT
ADJ
GND
BYP+
BYP
VIN
VOUT
EN+
C
MODE
EN
C+
High Voltage Input to Bipolar Output with Highly Efficient Dividing/Inverting Charge Pump
C1
4.7µF
50V
C4
4.7µF
C8
4.7µF
25V
C7
4.7µF
C6
0.01µF
C5
0.01µF
C2
F
50V
C3
F
50V
NOTE: THE LTC3260 WILL ALWAYS RUN
IN CONTINUOUS FREQUENCY REGARDLESS
OF THE MODE PIN SETTING BECAUSE VOUT
IS ALWAYS LESS THAN –1/2VIN
D1
MBR0540
D2
MBR0540
D3
MBR0540
14 17 2
R1
316k
R2
100k
R3
100k
R4
316k
5V
–5V
3260 TA04
LDO+
11 12
15
16
3
4
5
13
10
7
1
13.5V TO 32V
LDO
6
VOUT
ADJ+
LTC3260
GND RTMODE
ADJ
BYP+
BYP
VIN
EN+
C
EN
C+
VOUT ~ – VIN – VFIOUT ROL
2– VF
AMBIENT TEMPERATURE (°C)
–50
0
MAXIMUM POWER DISSIPATION (W)
1
3
4
5
050 75 175
3260 F06
2
–25 25 100 125 150
6
RECOMMENDED
OPERATION
TJ = 150°C
θJA = 43°C/W
LTC3260
14
3260fa
Typical applicaTions
28V Dual Tracking Bipolar Supply with Outputs from ±5V to ±25V
C1
4.7µF
50V
C3
4.7µF
35V
C7
4.7µF
50V
C6
4.7µF
35V
C4
0.01µF
C2
F
50V
14
2
17
R1
732k
R2
73.2k
R3
500k
R4
732k
OUT
–OUT
3260 TA05
LDO+
11 12
15
16
4
3
5
13
10
7
1
28V
LDO
6
VOUT
ADJ+
LTC3260
GND
MODE
RT
ADJ
BYP+
BYP
VIN
EN+
C
EN
C+
C5
0.01µF
LTC3260
15
3260fa
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(2 SIDES)
4.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.70 ±0.10
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
3.00 REF
17
148
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DE14) DFN 0806 REV B
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
0.25 ±0.05
0.50 BSC
3.30 ±0.10
1.70 ±0.05
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.20 ±0.05
0.70 ±0.05
3.60 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
3.30 ±0.05
0.50 BSC
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
LTC3260
16
3260fa
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSOP (MSE16) 0911 REV E
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
16
16151413121110
12345678
9
9
18
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
0.1016 ±0.0508
(.004 ±.002)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.280 ±0.076
(.011 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev E)
LTC3260
17
3260fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 09/12 Changed Operating Junction Temperature.
Add H- and MP-grade options.
Add Junction to heading of Electrical Characteristics table.
Add H- and MP-grade into Note 2.
Modified Shutdown Current vs Temperature curve for operation to 150°C.
Modified Quiescent Current vs Temperature curve for operation to 150°C.
Corrected Figure 5 Pinout RT and CBYP.
Removed Thermal Shutdown curve from Figure 6.
Clarified 150°C Operation in Derating Power section.
Updated Related Parts list.
2
Throughout
3
4
4
4
12
13
12, 13
18
LTC3260
18
3260fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2012
LT 0912 REV A • PRINTED IN USA
relaTeD parTs
Typical applicaTion
Low Noise ±12V Power Supply from a Single-Ended 15V Input Supply (Frequency = 200kHz)
C4
10µF
C5
10nF
C6
10nF
C1
10µF
C2
F
C7
10µF
C3
10µF
R4
909k
R5
200k
R1
909k
R3
100k
R2
100k
12V
–12V
3260 TA03
LDO+
9
1
11
12
8
7
6
2
5
4
3
15
14
13
10
15V
LDO
ADJ+
LTC3260
RT
ADJ
GND
BYP+
BYP
VIN
VOUT
EN+
C
MODE
EN
C+
PART NUMBER DESCRIPTION COMMENTS
LTC1144 Switched-Capacitor Wide Input Range Voltage Converter with
Shutdown
Wide Input Voltage Range: 2V to 18V, ISD < 8µA,
SO8 Package
LTC1514/LTC1515 Step-Up/Step-Down Switched-Capacitor DC/DC Converters VIN: 2V to 10V, VOUT: 3.3V to 5V, IQ = 60µA, SO8 Package
LT
®
1611 150mA Output, 1.4MHz Micropower Inverting Switching Regulator VIN: 0.9V to 10V, VOUT = ±34V, ThinSOT™ Package
LT1614 250mA Output, 600kHz Micropower Inverting Switching Regulator VIN: 0.9V to 6V, VOUT = ±30V, IQ = 1mA, MS8, SO8
Packages
LTC1911 250mA, 1.5MHz Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT = 1.5V/1.8V, IQ = 180µA,
MS8 Package
LTC3250/LTC3250-1.2/
LTC3250-1.5
Inductorless Step-Down DC/DC Converters VIN: 3.1V to 5.5V, VOUT = 1.2V, 1.5V, IQ = 35µA,
ThinSOT Package
LTC3251 500mA Spread Spectrum Inductorless Step-Down DC/DC
Converter
VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, 1.2V, 1.5V, IQ = 9µA,
MS10E Package
LTC3252 Dual 250mA, Spread Spectrum Inductorless Step-Down DC/DC
Converter
VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, IQ = 50µA,
DFN12 Package
LT1054/LT1054L Switched-Capacitor Voltage Converters with Regulator VIN: 3.5V to 15V/7V, IOUT = 100mA/125mA, N8, S08,
SO16 Packages
LTC3261 High Voltage, Low Quiescent Current Inverting Charge Pump VIN: 4.5V to 32V, VOUT = –VIN, IOUT = 100mA, MSOP-12
Package

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