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LT1167 Datasheet

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Datasheet

LT1167
1
1167fc
TYPICAL APPLICATION
FEATURES DESCRIPTION
Single Resistor Gain
Programmable, Precision
Instrumentation Amplifier
The LT
®
1167 is a low power, precision instrumentation
amplifier that requires only one external resistor to set
gains of 1 to 10,000. The low voltage noise of 7.5nV/√Hz
(at 1kHz) is not compromised by low power dissipation
(0.9mA typical for ±2.3V to ±15V supplies).
The part’s high accuracy (10ppm maximum nonlinearity,
0.08% max gain error (G = 10)) is not degraded even for
load resistors as low as 2k. The LT1167 is laser trimmed for
very low input offset voltage (40μV max), drift (0.3μV/°C),
high CMRR (90dB, G = 1) and PSRR (105dB, G = 1).
Low input bias currents of 350pA max are achieved with
the use of superbeta processing. The output can handle
capacitive loads up to 1000pF in any gain configuration
while the inputs are ESD protected up to 13kV (human
body). The LT1167 with two external 5k resistors passes
the IEC 1000-4-2 level 4 specification.
The LT1167, offered in 8-pin PDIP and SO packages, re-
quires significantly less PC board area than discrete multi
op amp and resistor designs.
The LT1167-1 offers the same performance as the LT1167,
but its input current characteristic at high common mode
voltage better supports applications with high input imped-
ance (see the Applications Information section).
Single Supply Barometer
APPLICATIONS
n Single Gain Set Resistor: G = 1 to 10,000
n Gain Error: G = 10, 0.08% Max
n Input Offset Voltage Drift: 0.3μV/°C Max
n Meets IEC 1000-4-2 Level 4 ESD Tests with
Two External 5k Resistors
n Gain Nonlinearity: G = 10, 10ppm Max
n Input Offset Voltage: G = 10, 60μV Max
n Input Bias Current: 350pA Max
n PSRR at G = 1: 105dB Min
n CMRR at G = 1: 90dB Min
n Supply Current: 1.3mA Max
n Wide Supply Range: ±2.3V to ±18V
n 1kHz Voltage Noise: 7.5nV/√Hz
n 0.1Hz to 10Hz Noise: 0.28μVP-P
n Available in 8-Pin PDIP and SO Packages
n Bridge Amplifiers
Strain Gauge Amplifi ers
Thermocouple Amplifi ers
Differential to Single-Ended Converters
Medical Instrumentation
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
+
+
+
2
1
1
1
1
2
R5
392k
R4
50k
OFFSET
ADJUST
R3
50k
R8
100k
R6
1k
LT1634CCZ-1.25
8
4
1/2
LT1490
3
RSET
0.2% ACCURACY AT 25°C
1.2% ACCURACY AT 0°C TO 60°C
VS = 8V TO 30V
5k
5k
5k
5k
VS
5
4
3
2
+7
1/2
LT1490
5
6
2
8
LUCAS NOVA SENOR
NPC-1220-015-A-3L
7
VS
6
1167 TA01
5TO
4-DIGIT
DVM
4
R2
12Ω
LT1167
G = 60
R1
825Ω
3
6
R7
50k VOLTS
2.800
3.000
3.200
INCHES Hg
28.00
30.00
32.00
OUTPUT VOLTAGE (2V/DIV)
NONLINEARITY (100ppm/DIV)
1167 TA02
G = 1000
RL = 1k
VOUT = ±10V
Gain Nonlinearity
LT1167
2
1167fc
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ...................................................... ±20V
Differential Input Voltage (Within the
Supply Voltage) ......................................................±40V
Input Voltage (Equal to Supply Voltage) ................. ± 20V
Input Current (Note 3) ..........................................±20mA
Output Short-Circuit Duration ......................... Indefi nite
Operating Temperature Range ................. –40°C to 85°C
Specifi ed Temperature Range
LT1167AC/LT1167C/
LT1167AC-1/LT1167C-1 (Note 4) ............ 0°C to 70°C
LT1167AI/LT1167I/
LT1167AI-1/LT1167I-1 ........................ –40°C to 85°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
(Note 1)
ORDER INFORMATION
PIN CONFIGURATION
1
2
3
4
8
7
6
5
TOP VIEW
RG
–IN
+IN
VS
RG
+VS
OUTPUT
REF
N8 PACKAGE
8-LEAD PDIP
+
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 130°C/W (N8)
TJMAX = 150°C, θJA = 190°C/W (S8)
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT1167ACN8#PBF LT1167ACN8#TRPBF LT1167AC 8-Lead PDIP 0°C to 70°C
LT1167ACS8#PBF LT1167ACS8#TRPBF 1167A 8-Lead Plastic SO 0°C to 70°C
LT1167AIN8#PBF LT1167AIN8#TRPBF LT1167AI 8-Lead PDIP –40°C to 85°C
LT1167AIS8#PBF LT1167AIS8#TRPBF 1167AI 8-Lead Plastic SO –40°C to 85°C
LT1167CN8#PBF LT1167CN8#TRPBF LT1167C 8-Lead PDIP 0°C to 70°C
LT1167CS8#PBF LT1167CS8#TRPBF 1167 8-Lead Plastic SO 0°C to 70°C
LT1167IN8#PBF LT1167IN8#TRPBF LT1167I 8-Lead PDIP –40°C to 85°C
LT1167IS8#PBF LT1167IS8#TRPBF 1167I 8-Lead Plastic SO –40°C to 85°C
LT1167CS8-1#PBF LT1167CS8-1#TRPBF 11671 8-Lead Plastic SO 0°C to 70°C
LT1167IS8-1#PBF LT1167IS8-1#TRPBF 11671 8-Lead Plastic SO –40°C to 85°C
LT1167ACS8-1#PBF LT1167ACS8-1#TRPBF 11671 8-Lead Plastic SO 0°C to 70°C
LT1167AIS8-1#PBF LT1167AIS8-1#TRPBF 11671 8-Lead Plastic SO –40°C to 85°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT1167ACN8 LT1167ACN8#TR LT1167AC 8-Lead PDIP 0°C to 70°C
LT1167ACS8 LT1167ACS8#TR 1167A 8-Lead Plastic SO 0°C to 70°C
LT1167AIN8 LT1167AIN8#TR LT1167AI 8-Lead PDIP –40°C to 85°C
LT1167AIS8 LT1167AIS8#TR 1167AI 8-Lead Plastic SO –40°C to 85°C
LT1167CN8 LT1167CN8#TR LT1167C 8-Lead PDIP 0°C to 70°C
LT1167CS8 LT1167CS8#TR 1167 8-Lead Plastic SO 0°C to 70°C
LT1167IN8 LT1167IN8#TR LT1167I 8-Lead PDIP –40°C to 85°C
LT1167IS8 LT1167IS8#TR 1167I 8-Lead Plastic SO –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LT1167
3
1167fc
ELECTRICAL CHARACTERISTICS
V
S = ±15V, VCM = 0V, TA = 25°C, RL = 2k, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS (NOTE 7)
LT1167AC/LTC1167AI
LT1167AC-1/LTC1167AI-1
LT1167C/LTC1167I
LT1167C-1/LTC1167I-1
UNITSMIN TYP MAX MIN TYP MAX
G Gain Range G = 1 + (49.4k/RG) 1 10k 1 10k
Gain Error G = 1
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
0.008
0.010
0.025
0.049
0.02
0.08
0.08
0.10
0.015
0.020
0.030
0.040
0.03
0.10
0.10
0.10
%
%
%
%
Gain Nonlinearity (Note 5) VO = ±10V, G = 1
VO = ±10V, G = 10 and 100
VO = ±10V, G = 1000
1
2
15
6
10
40
1.5
3
20
10
15
60
ppm
ppm
ppm
VO = ±10V, G = 1, RL = 600
VO = ±10V, G = 10 and 100,
RL = 600
VO = ±10V, G = 1000, RL = 600
5
6
20
12
15
65
6
7
25
15
20
80
ppm
ppm
ppm
VOST Total Input Referred Offset Voltage VOST = VOSI + VOSO/G
VOSI Input Offset Voltage G = 1000, VS = ±5V to ±15V 15 40 20 60 μV
VOSO Output Offset Voltage G = 1, VS = ±5V to ±15V 40 200 50 300 μV
IOS Input Offset Current 90 320 100 450 pA
IBInput Bias Current 50 350 80 500 pA
enInput Noise Voltage (Note 8) 0.1Hz to 10Hz, G = 1
0.1Hz to 10Hz, G = 10
0.1Hz to 10Hz, G = 100
and 1000
2.00
0.50
0.28
2.00
0.50
0.28
μVP-P
μVP-P
μVP-P
Total RTI Noise = √eni2 + (eno/G)2 (Note 8)
eni Input Noise Voltage Density
(Note 8)
fO = 1kHz 7.5 12 7.5 12 nV/√Hz
eno Output Noise Voltage Density
(Note 8)
fO = 1kHz (Note 3) 67 90 67 90 nV/√Hz
inInput Noise Current fO = 0.1Hz to 10Hz 10 10 pAP-P
Input Noise Current Densty fO = 10Hz 124 124 fA/√Hz
RIN Input Resistance VIN = ±10V 200 1000 200 1000
CIN(DIFF) Differential Input Capacitance fO = 100kHz 1.6 1.6 pF
CIN(CM) Common Mode Input Capacitance fO = 100kHz 1.6 1.6 pF
VCM Input Voltage Range G = 1, Other Input Grounded
VS = ±2.3V to ±5V
VS = ±5V to ±18V
–VS + 1.9
–VS + 1.9
+VS – 1.2
+VS – 1.4
–VS + 1.9
–VS + 1.9
+VS – 1.2
+VS – 1.4
V
V
CMRR Common Mode Rejection Ratio 1k Source Imbalance,
VCM = 0V to ±10V
G = 1
G = 10
G = 100
G = 1000
90
106
120
126
95
115
125
140
85
100
110
120
95
115
125
140
dB
dB
dB
dB
PSRR Power Supply Rejection Ratio VS = ±2.3V to ±18V
G = 1
G = 10
G = 100
G = 1000
105
125
131
135
120
135
140
150
100
120
126
130
120
135
140
150
dB
dB
dB
dB
ISSupply Current VS = ±2.3V to ±18V 0.9 1.3 0.9 1.3 mA
VOUT Output Voltage Swing RL = 10k
VS = ±2.3V to ±5V
VS = ±5V to ±18V
–VS + 1.1
–VS + 1.2
+VS – 1.2
+VS – 1.3
–VS + 1.1
–VS + 1.2
+VS – 1.2
+VS – 1.3
V
V
LT1167
4
1167fc
ELECTRICAL CHARACTERISTICS
V
S = ±15V, VCM = 0V, TA = 25°C, RL = 2k, unless otherwise noted.
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS (NOTE 7)
LT1167AC/LTC1167AI
LT1167AC-1/LTC1167AI-1
LT1167C/LTC1167I
LT1167C-1/LTC1167I-1
UNITSMIN TYP MAX MIN TYP MAX
IOUT Output Current 20 27 20 27 mA
BW Bandwidth G = 1
G = 10
G = 100
G = 1000
1000
800
120
12
1000
800
120
12
kHz
kHz
kHz
kHz
SR Slew Rate G = 1, VOUT = ±10V 0.75 1.2 0.75 1.2 V/μs
Settling Time to 0.01% 10V Step
G = 1 to 100
G = 1000
14
130
14
130
μs
μs
RREFIN Reference Input Resistance 20 20
IREFIN Reference Input Current VREF = 0V 50 50 μA
VREF Reference Voltage Range –VS + 1.6 +VS – 1.6 –VS + 1.6 +VS – 1.6 V
AVREF Reference Gain to Output 1 ±0.0001 1 ±0.0001
SYMBOL PARAMETER CONDITIONS (NOTE 7)
LT1167AC/LT1167AC-1 LT1167C/LT1167C-1
UNITSMIN TYP MAX MIN TYP MAX
Gain Error G = 1
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
l
l
l
l
0.01
0.08
0.09
0.14
0.03
0.30
0.30
0.33
0.012
0.100
0.120
0.140
0.04
0.33
0.33
0.35
%
%
%
%
Gain Nonlinearity VOUT = ±10V, G = 1
VOUT = ±10V, G = 10 and 100
VOUT = ±10V, G = 1000
l
l
l
1.5
3
20
10
15
60
3
4
25
15
20
80
ppm
ppm
ppm
G/T Gain vs Temperature G < 1000 (Note 2) l20 50 20 50 ppm/°C
VOST Total Input Referred
Offset Voltage
VOST = VOSI + VOSO/G
VOSI Input Offset Voltage VS = ±5V to ±15V l18 60 23 80 μV
VOSIH Input Offset Voltage Hysteresis (Notes 3, 6) 3.0 3.0 μV
VOSO Output Offset Voltage VS = ±5V to ±15V l60 380 70 500 μV
VOSOH Output Offset Voltage Hysteresis (Notes 3, 6) 30 30 μV
VOSI/T Input Offset Drift (Note 8) (Note 3) l0.05 0.3 0.06 0.4 μV/°C
VOSO/T Output Offset Drift (Note 3) l0.7 3 0.8 4 μV/°C
IOS Input Offset Current l100 400 120 550 pA
IOS/T Input Offset Current Drift l0.3 0.4 pA/°C
IBInput Bias Current l75 450 105 600 pA
IB/T Input Bias Current Drift l0.4 0.4 pA/°C
VCM Input Voltage Range G = 1, Other Input Grounded
VS = ±2.3V to ±5V
VS = ±5V to ±18V
l
l
–VS+2.1
–VS+2.1
+VS–1.3
+VS–1.4
–VS+2.1
–VS+2.1
+VS–1.3
+VS–1.4
V
V
CMRR Common Mode Rejection Ratio 1k Source Imbalance,
VCM = 0V to ±10V
G = 1
G = 10
G = 100
G = 1000
l
l
l
l
88
100
115
117
92
110
120
135
83
97
113
114
92
110
120
135
dB
dB
dB
dB
LT1167
5
1167fc
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±15V, VCM = 0V, –40°C ≤ TA ≤ 85°C, RL = 2k, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS (NOTE 7)
LT1167AI/LT1167AI-1 LT1167I/LT1167I-1
UNITSMIN TYP MAX MIN TYP MAX
Gain Error G = 1
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
l
l
l
l
0.014
0.130
0.140
0.160
0.04
0.40
0.40
0.40
0.015
0.140
0.150
0.180
0.05
0.42
0.42
0.45
%
%
%
%
GNGain Nonlinearity (Notes 2, 4) VO = ±10V, G = 1
VO = ±10V, G = 10 and 100
VO = ±10V, G = 1000
l
l
l
2
5
26
15
20
70
3
6
30
20
30
100
ppm
ppm
ppm
G/T Gain vs Temperature G < 1000 (Note 2) l20 50 20 50 ppm/°C
VOST Total Input Referred
Offset Voltage
VOST = VOSI + VOSO/G
VOSI Input Offset Voltage l20 75 25 100 μV
VOSIH Input Offset Voltage Hysteresis (Notes 3, 6) 3.0 3.0 μV
VOSO Output Offset Voltage l180 500 200 600 μV
VOSOH Output Offset Voltage Hysteresis (Notes 3, 6) 30 30 μV
VOSI/T Input Offset Drift (Note 8) (Note 3) l0.05 0.3 0.06 0.4 μV/°C
VOSO/T Output Offset Drift (Note 3) l0.8 5 1 6 μV/°C
IOS Input Offset Current l110 550 120 700 pA
IOS/T Input Offset Current Drift l0.3 0.3 pA/°C
IBInput Bias Current l180 600 220 800 pA
IB/T Input Bias Current Drift l0.5 0.6 pA/°C
VCM Input Voltage Range VS = ±2.3V to ±5V
VS = ±5V to ±18V
l
l
–VS+2.1
–VS+2.1
+VS–1.3
+VS–1.4
–VS+2.1
–VS+2.1
+VS–1.3
+VS–1.4
V
V
CMRR Common Mode Rejection Ratio 1k Source Imbalance,
VCM = 0V to ±10V
G = 1
G = 10
G = 100
G = 1000
l
l
l
l
86
98
114
116
90
105
118
133
81
95
112
112
90
105
118
133
dB
dB
dB
dB
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS (NOTE 7)
LT1167AC/LT1167AC-1 LT1167C/LT1167C-1
UNITSMIN TYP MAX MIN TYP MAX
PSRR Power Supply Rejection Ratio VS = ±2.3V to ±18V
G = 1
G = 10
G = 100
G = 1000
l
l
l
l
103
123
127
129
115
130
135
145
98
118
124
126
115
130
135
145
dB
dB
dB
dB
ISSupply Current VS = ±2.3V to ±18V l1.0 1.5 1.0 1.5 mA
VOUT Output Voltage Swing RL = 10k
VS = ±2.3V to ±5V
VS = ±5V to ±18V
l
l
–VS +1.4
–VS +1.6
+VS –1.3
+VS –1.5
–VS+1.4
–VS+1.6
+VS –1.3
+VS –1.5
V
V
IOUT Output Current l16 21 16 21 mA
SR Slew Rate G = 1, VOUT = ±10V l0.65 1.1 0.65 1.1 V/μs
VREF REF Voltage Range (Note 3) l–VS +1.6 +VS –1.6 –VS +1.6 +VS –1.6 V
LT1167
6
1167fc
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS (NOTE 7)
LT1167AI/LT1167AI-1 LT1167I/LT1167I-1
UNITSMIN TYP MAX MIN TYP MAX
PSRR Power Supply Rejection Ratio VS = ±2.3V to ±18V
G = 1
G = 10
G = 100
G = 1000
l
l
l
l
100
120
125
128
112
125
132
140
95
115
120
125
112
125
132
140
dB
dB
dB
dB
ISSupply Current l1.1 1.6 1.1 1.6 mA
VOUT Output Voltage Swing VS = ±2.3V to ±5V
VS = ±5V to ±18V
l
l
–VS +1.4
–VS +1.6
+VS –1.3
+VS –1.5
–VS +1.4
–VS +1.6
+VS –1.3
+VS –1.5
V
V
IOUT Output Current l15 20 15 20 mA
SR Slew Rate G = 1, VOUT = ±10V l0.55 0.95 0.55 0.95 V/μs
VREF REF Voltage Range (Note 3) l–VS +1.6 +VS –1.6 –VS +1.6 +VS –1.6 V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Does not include the effect of the external gain resistor RG.
Note 3: This parameter is not 100% tested.
Note 4: The LT1167AC/LT1167C/LT1167AC-1/LT1167C-1 are designed,
characterized and expected to meet the industrial temperature limits, but
are not tested at –40°C and 85°C. I-grade parts are guaranteed.
Note 5: This parameter is measured in a high speed automatic tester that
does not measure the thermal effects with longer time constants. The
magnitude of these thermal effects are dependent on the package used,
heat sinking and air flow conditions.
Note 6: Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25°C, but
the IC is cycled to 85°C I-grade (or 70°C C-grade) or –40°C I-grade
(0°C C-grade) before successive measurement. 60% of the parts will
pass the typical limit on the data sheet.
Note 7: Typical parameters are defined as the 60% of the yield parameter
distribution.
Note 8: Referred to input.
LT1167
7
1167fc
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Input
Offset Voltage, TA = –40°C
Distribution of Input
Offset Voltage, TA = 25°C
Distribution of Input
Offset Voltage, TA = 85°C
Gain Nonlinearity, G = 1
Gain Nonlinearity, G = 1000
Gain Nonlinearity, G = 10
Gain Nonlinearity vs Temperature
Gain Nonlinearity, G = 100
Gain Error vs Temperature
OUTPUT VOLTAGE (2V/DIV)
NONLINEARITY (1ppm/DIV)
1167 G01
G = 1
RL = 2k
VOUT = ±10V
OUTPUT VOLTAGE (2V/DIV)
NONLINEARITY (10ppm/DIV)
1167 G02
G = 10
RL = 2k
VOUT = ±10V
OUTPUT VOLTAGE (2V/DIV)
NONLINEARITY (10ppm/DIV)
1167 G03
G = 100
RL = 2k
VOUT = ±10V
OUTPUT VOLTAGE (2V/DIV)
NONLINEARITY (100ppm/DIV)
1167 G04
G = 1000
RL = 2k
VOUT = ±10V
TEMPERATURE (°C)
–50
NONLINEARITY (ppm)
70
25
1167 G05
40
20
–25 0 50
10
0
80
60
50
30
75 100 150
G = 1000
G = 100
G = 1, 10
VS = ±15V
VOUT = –10V TO 10V
RL = 2k
TEMPERATURE (°C)
–50
GAIN ERROR (%)
0.20
0.10
0.05
0
50
0.20
1167 G06
0.15
0
–25 75
G = 1
25 100
0.05
0.10
0.15
VS = ±15V
VOUT = ±10V
RL = 2k
*DOES NOT INCLUDE
TEMPERATURE EFFECTS
OF RG
G = 10*
G = 1000*
G = 100*
INPUT OFFSET VOLTAGE (μV)
–80
PERCENT OF UNITS (%)
20
30
1167 G40
10
0–60 –40 –20 20 40 60
0
40
15
25
5
35
VS = ±15V
G = 1000
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
INPUT OFFSET VOLTAGE (μV)
60 –40 20 0 20 40 60
PERCENT OF UNITS (%)
20
25
30
1167 G41
15
10
0
5
VS = ±15V
G = 1000
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
INPUT OFFSET VOLTAGE (μV)
–80
PERCENT OF UNITS (%)
20
30
1167 G42
10
060 –40 20 20 40 60
0
40
15
25
5
35
VS = ±15V
G = 1000
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
LT1167
8
1167fc
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Input Offset
Voltage Drift
Distribution of Output Offset
Voltage Drift Warm-Up Drift
Input Bias Current Input Offset Current
Input Bias and Offset Current
vs Temperature
Distribution of Output
Offset Voltage, TA = –40°C
Distribution of Output
Offset Voltage, TA = 25°C
Distribution of Output
Offset Voltage, TA = 85°C
OUTPUT OFFSET VOLTAGE (μV)
400 –300 –200 100 0 100 200 300 400
PERCENT OF UNITS (%)
20
30
1167 G43
10
0
40
15
25
5
35
VS = ±15V
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
OUTPUT OFFSET VOLTAGE (μV)
– 200 150 – 100 50 0 50 100 150 200
PERCENT OF UNITS (%)
20
30
1167 G44
10
0
15
25
5
VS = ±15V
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
OUTPUT OFFSET VOLTAGE (μV)
400 –300 – 200 100 0 100 200 300 400
PERCENT OF UNITS (%)
20
30
1167 G45
10
0
40
15
25
5
35
VS = ±15V
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
INPUT OFFSET VOLTAGE DRIFT (μV/°C)
0.4
0
PERCENT OF UNITS (%)
5
10
15
20
30
0.3 0.2 – 0.1 0
1167 G46
0.1 0.2 0.3
25
VS = ±15V
TA = –40°C TO 85°C
G = 1000
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
OUTPUT OFFSET VOLTAGE DRIFT (μV/°C)
0
PERCENT OF UNITS (%)
5
10
15
20
40
012345–1–2–3–4–5
1167 G47
30
35
25
VS = ±15V
TA = –40°C TO 85°C
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
TIME AFTER POWER ON (MINUTES)
0
10
12 S8
N8
14
34
1167 G09
8
6
12 5
4
2
0
CHANGE IN OFFSET VOLTAGE (μV)
VS = ±15V
TA = 25°C
G = 1
INPUT BIAS CURRENT (pA)
100
PERCENT OF UNITS (%)
30
40
50
60
1167 G10
20
10
0–60 –20 20 100
VS = ±15V
TA = 25°C
270 S8
122 N8
392 TOTAL PARTS
INPUT OFFSET CURRENT (pA)
100
PERCENT OF UNITS (%)
30
40
50
60
1167 G11
20
10
0–60 –20 20 100
VS = ±15V
TA = 25°C
270 S8
122 N8
392 TOTAL PARTS
TEMPERATURE (°C)
–50–75
500
INPUT BIAS AND OFFSET CURRENT (pA)
400
200
100
0
500
200
050 75
1167 G12
300
300
400
100
–25 25 100
IOS
125
VS = ±15V
VCM = 0V
IB
LT1167
9
1167fc
TYPICAL PERFORMANCE CHARACTERISTICS
Positive Power Supply Rejection
Ratio vs Frequency Gain vs Frequency Supply Current vs Supply Voltage
Voltage Noise Density
vs Frequency
0.1Hz to 10Hz Noise Voltage,
G = 1
0.1Hz to 10Hz Noise Voltage,
Referred to Input, G = 1000
Input Bias Current
vs Common Mode Input Voltage
Common Mode Rejection Ratio
vs Frequency
Negative Power Supply Rejection
Ratio vs Frequency
COMMON MODE INPUT VOLTAGE (V)
–15
INPUT BIAS CURRENT (pA)
100
300
500
9
1167 G13
–100
300
0
200
400
200
400
500 –9 –3 3
–12 12
–6 0615
40°C
85°C
0°C
70°C
25°C
FREQUENCY (Hz)
0.1
COMMON MODE REJECTION RATIO (dB)
60
80
100
100 10k
1167 G14
40
20
0110 1k
120
140
160
100k
G = 1000
G = 100
G = 10
G = 1
VS = ±15V
TA = 25°C
1k SOURCE
IMBALANCE
FREQUENCY (Hz)
0.1
NEGATIVE POWER SUPPLY REJECTION RATIO (dB)
60
80
100
100 10k
1167 G15
40
20
0110 1k
120
140
160
100k
G = 1000
G = 100
G = 10
G = 1
V+ = 15V
TA = 25°C
FREQUENCY (Hz)
0.1
POSITIVE POWER SUPPLY REJECTION RATIO (dB)
60
80
100
100 10k
1167 G16
40
20
0110 1k
120
140
160
100k
G = 1000
G = 10
G = 1
V = –15V
TA = 25°C
G = 100
FREQUENCY (kHz)
0
GAIN (dB)
10
30
50
60
0.01 1 10 1000
1167 G17
–10
0.1 100
40
20
–20
G = 1000
G = 100
G = 10
G = 1
VS = ±15V
TA = 25°C
SUPPLY VOLTAGE (V)
0
SUPPLY CURRENT (mA)
1.00
1.25
85°C
25°C
40°C
20
1167 G18
0.75
0.50 510 15
1.50
FREQUENCY (Hz)
1
0
100
1000
10 100 1k 100k10k
1167 G19
10
VOLTAGE NOISE DENSITY (nV√Hz)
VS = ±15V
TA = 25°C
1/fCORNER = 10Hz
1/fCORNER = 9Hz
1/fCORNER = 7Hz
GAIN = 1
GAIN = 10
GAIN = 100, 1000
BW LIMIT
GAIN = 1000
TIME (SEC)
0
NOISE VOLTAGE (2μV/DIV)
8
1167 G20
24510
6
139
7
VS = ±15V
TA = 25°C
TIME (SEC)
0
NOISE VOLTAGE (0.2μV/DIV)
8
1167 G21
24510
6
139
7
VS = ±15V
TA = 25°C
LT1167
10
1167fc
TYPICAL PERFORMANCE CHARACTERISTICS
Overshoot vs Capacitive Load Large-Signal Transient Response Small-Signal Transient Response
Output Impedance vs Frequency Large-Signal Transient Response Small-Signal Transient Response
Current Noise Density
vs Frequency 0.1Hz to 10Hz Current Noise Short-Circuit Current vs Time
FREQUENCY (Hz)
1
10
CURRENT NOISE DENSITY (fA/
Hz
)
100
1000
10 100 1000
1167 G22
VS = ±15V
TA = 25°C
RS
TIME (SEC)
0
CURRENT NOISE (5pA/DIV)
8
1167 G23
24510
6
139
7
VS = ±15V
TA = 25°C
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
0
–50
(SINK) (SOURCE)
OUTPUT CURRENT (mA)
–40
–20
–10
0
50
20
12
1167 G24
–30
30
40
10
3
TA = –40°C
VS = ±15V
TA = –40°C
TA = 25°C
TA = 85°C
TA = 85°C
TA = 25°C
CAPACITIVE LOAD (pF)
10
40
OVERSHOOT (%)
50
60
70
80
100 1000 10000
1167 G25
30
20
10
0
90
100
VS = ±15V
VOUT = ±50mV
RL = ∞
AV ≥ 100
AV = 10
AV = 1
10μs/DIV
5V/DIV
1167 G28
G = 1
VS = ±15V
RL = 2k
CL = 60pF
10μs/DIV
20mV/DIV
1167 G29
G = 1
VS = ±15V
RL = 2k
CL = 60pF
FREQUENCY (kHz)
1
OUTPUT IMPEDANCE (Ω)
10
100
1000
10 100 1000
1167 G26
0.1 1
VS = ±15V
TA = 25°C
G = 1 TO 1000
10μs/DIV
5V/DIV
1167 G31
G = 1
VS = ±15V
RL = 2k
CL = 60pF
10μs/DIV
20mV/DIV
1167 G32
G = 10
VS = ±15V
RL = 2k
CL = 60pF
LT1167
11
1167fc
TYPICAL PERFORMANCE CHARACTERISTICS
Settling Time vs Gain Large-Signal Transient Response Small-Signal Transient Response
Settling Time vs Step Size Slew Rate vs Temperature
Output Voltage Swing
vs Load Current
Undistorted Output Swing
vs Frequency Large-Signal Transient Response Small-Signal Transient Response
FREQUENCY (kHz)
1
20
25
PEAK-TO-PEAK OUTPUT SWING (V)
30
35
10 100 1000
1167 G27
15
10
5
0
G = 1
G = 10, 100, 1000
VS = ±15V
TA = 25°C
10μs/DIV
5V/DIV
1167 G34
G = 100
VS = ±15V
RL = 2k
CL = 60pF
10μs/DIV
20mV/DIV
1167 G35
G = 100
VS = ±15V
RL = 2k
CL = 60pF
GAIN (dB)
1
1
SETTLING TIME (μs)
10
100
1000
10 100 1000
1167 G30
VS = ±15V
TA = 25°C
ΔVOUT = 10V
1mV = 0.01%
50μs/DIV
5V/DIV
1167 G37
G = 1000
VS = ±15V
RL = 2k
CL = 60pF
50μs/DIV
20mV/DIV
1167 G38
G = 1000
VS = ±15V
RL = 2k
CL = 60pF
SETTLING TIME (μs)
2
OUTPUT STEP (V)
2
6
10
10
1167 G33
–2
–6
0
4
8
–4
–8
–10 468
311
57912
0V VOUT
TO 0.1%
TO 0.1%
TO 0.01%
TO 0.01%
0V VOUT
VS = ±15
G = 1
TA = 25°C
CL = 30pF
RL = 1k
TEMPERATURE (°C)
–50 –25
0.8
SLEW RATE (V/μs)
1.2
1.8
050 75
1167 G36
1.0
1.6
1.4
25 100 125
VS = ±15V
VOUT = ±10V
G = 1
+SLEW
SLEW
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
+VS
+VS – 0.5
+VS – 1.0
+VS – 1.5
+VS – 2.0
–VS + 2.0
–VS + 1.5
–VS + 1.0
–VS + 0.5
–VS
0.01 1 10 100
1167 G39
0.1
VS = ±15V 85°C
25°C
40°C
SOURCE
SINK
LT1167
12
1167fc
BLOCK DIAGRAM
THEORY OF OPERATION
Q1
RG
2
OUTPUT
6
REF
1167 F01
5
7
+
A1
+
A3
VB
R1
24.7k
R3
400Ω
R4
400Ω
C1
1
RG8
R7
10k
R8
10k
R5
10k
R6
10k
DIFFERENCE AMPLIFIER STAGEPREAMP STAGE
+IN
–IN
3
+
A2
VB
R2
24.7k
C2
V+
V
V
V+
V
Q2 V
V+
4V
Figure 1. Block Diagram
The LT1167 is a modified version of the three op amp
instrumentation amplifier. Laser trimming and mono-
lithic construction allow tight matching and tracking of
circuit parameters over the specified temperature range.
Refer to the block diagram (Figure 1) to understand the
following circuit description. The collector currents in
Q1 and Q2 are trimmed to minimize offset voltage drift,
thus assuring a high level of performance. R1 and R2 are
trimmed to an absolute value of 24.7k to assure that the
gain can be set accurately (0.05% at G = 100) with only
one external resistor RG. The value of RG determines the
transconductance of the preamp stage. As RG is reduced
for larger programmed gains, the transconductance of
the input preamp stage increases to that of the input
transistors Q1 and Q2. This increases the open-loop gain
when the programmed gain is increased, reducing the
input referred gain related errors and noise. The input
voltage noise at gains greater than 50 is determined only
by Q1 and Q2. At lower gains the noise of the difference
amplifier and preamp gain setting resistors increase the
noise. The gain bandwidth product is determined by C1,
C2 and the preamp transconductance which increases
with programmed gain. Therefore, the bandwidth does
not drop proportionally to gain.
The input transistors Q1 and Q2 offer excellent matching,
which is inherent in NPN bipolar transistors, as well as
picoampere input bias current due to superbeta process-
ing. The collector currents in Q1 and Q2 are held constant
due to the feedback through the Q1-A1-R1 loop and
Q2-A2-R2 loop which in turn impresses the differential
input voltage across the external gain set resistor RG. Since
the current that flows through RG also flows through R
1
and R2, the ratios provide a gained-up differential voltage,
G = (R1 + R2)/RG, to the unity-gain difference
amplifier A3.
The common mode voltage is removed by A3, resulting
in a single-ended output voltage referenced to the voltage
on the REF pin. The resulting gain equation is:
V
OUT – VREF = G(VIN+ – VIN)
where:
G = (49.4kΩ/RG) + 1
solving for the gain set resistor gives:
R
G = 49.4kΩ/(G – 1)
LT1167
13
1167fc
THEORY OF OPERATION
Input and Output Offset Voltage
The offset voltage of the LT1167 has two components:
the output offset and the input offset. The total offset
voltage referred to the input (RTI) is found by dividing the
output offset by the programmed gain (G) and adding it
to the input offset. At high gains the input offset voltage
dominates, whereas at low gains the output offset voltage
dominates. The total offset voltage is:
Total input offset voltage (RTI)
= input offset + (output offset/G)
Total output offset voltage (RTO)
= (input offset • G) + output offset
Reference Terminal
The reference terminal is one end of one of the four 10k
resistors around the difference amplifier. The output volt-
age of the LT1167 (Pin 6) is referenced to the voltage on
the reference terminal (Pin 5). Resistance in series with
the REF pin must be minimized for best common mode
rejection. For example, a 2Ω resistance from the REF pin
to ground will not only increase the gain error by 0.02%
but will lower the CMRR to 80dB.
Single Supply Operation
For single supply operation, the REF pin can be at the
same potential as the negative supply (Pin 4) provided the
output of the instrumentation amplifier remains inside the
specified operating range and that one of the inputs is at
least 2.5V above ground. The barometer application on
the front page of this data sheet is an example that satis-
fies these conditions. The resistance Rb from the bridge
transducer to ground sets the operating current for the
bridge and also has the effect of raising the input common
mode voltage. The output of the LT1167 is always inside
the specified range since the barometric pressure rarely
goes low enough to cause the output to rail (30.00 inches
of Hg corresponds to 3.000V). For applications that require
the output to swing at or below the REF potential, the
voltage on the REF pin can be level shifted. An op amp is
used to buffer the voltage on the REF pin since a parasitic
series resistance will degrade the CMRR. The application
in the back of this data sheet, Four Digit Pressure Sensor,
is an example.
Output Offset Trimming
The LT1167 is laser trimmed for low offset voltage so that
no external offset trimming is required for most applica-
tions. In the event that the offset needs to be adjusted, the
circuit in Figure 2 is an example of an optional offset adjust
circuit. The op amp buffer provides a low impedance to
the REF pin where resistance must be kept to minimum
for best CMRR and lowest gain error.
+
2
–IN
OUTPUT
+IN
1
8
10k
100Ω
100Ω
–10mV
1167 F02
V
V+
10mV
5
2
3
1
6
1/2
LT1112
±10mV
ADJUSTMENT RANGE
RG
3
+
LT1167
REF
Figure 2. Optional Trimming of Output Offset Voltage
Input Bias Current Return Path
The low input bias current of the LT1167 (350pA) and
the high input impedance (200GΩ) allow the use of high
impedance sources without introducing additional offset
voltage errors, even when the full common mode range is
required. However, a path must be provided for the input
bias currents of both inputs when a purely differential
signal is being amplified. Without this path the inputs
will float to either rail and exceed the input common
mode range of the LT1167, resulting in a saturated input
stage. Figure 3 shows three examples of an input bias
current path. The first example is of a purely differential
signal source with a 10kΩ input current path to ground.
Since the impedance of the signal source is low, only one
resistor is needed. Two matching resistors are needed for
higher impedance signal sources as shown in the second
example. Balancing the input impedance improves both
common mode rejection and DC offset. The need for input
resistors is eliminated if a center tap is present as shown
in the third example.
LT1167
14
1167fc
APPLICATIONS INFORMATION
THEORY OF OPERATION
10k
RGRGRG
1167 F03
THERMOCOUPLE
200k
MICROPHONE,
HYDROPHONE,
ETC
200k
CENTER-TAP PROVIDES
BIAS CURRENT RETURN
+
LT1167
+
LT1167
+
LT1167
Figure 3. Providing an Input Common Mode Current Path
The LT1167 is a low power precision instrumentation
amplifier that requires only one external resistor to accu-
rately set the gain anywhere from 1 to 1000. The output
can handle capacitive loads up to 1000pF in any gain
configuration and the inputs are protected against ESD
strikes up to 13kV (human body).
Input Current at High Common Mode Voltage
When operating within the specified input common mode
range, both the LT1167 and LT1167-1 operate as shown
in the Input Bias Current vs Common Mode Input Voltage
graph shown in the Typical Performance Characteristics.
If however the inputs are within approximately 0.8V of
the positive supply, the LT1167 input current will increase
to approximately –1μA to –3μA. If the impedance of the
circuit driving the LT1167 inputs is sufficiently high (e.g.,
10MΩ when +VS = 15V), this increased input current can
pull the input voltage sufficiently high to keep the elevated
input current flowing. The LT1167-1 has been modified so
that the input current is typically two orders of magnitude
lower under similar conditions. The LT1167-1 is recom-
mended for new designs where input impedance is high.
Input Protection
The LT1167 can safely handle up to ±20mA of input cur-
rent in an overload condition. Adding an external 5k input
resistor in series with each input allows DC input fault
voltages up to ±100V and improves the ESD immunity
to 8kV (contact) and 15kV (air discharge), which is the
IEC 1000-4-2 level 4 specification. If lower value input
resistors are needed, a clamp diode from the positive supply
to each input will maintain the IEC 1000-4-2 specification
to level 4 for both air and contact discharge. A 2N4393
drain/source to gate is a good low leakage diode for use
with 1k resistors, see Figure 4. The input resistors should
be carbon and not metal film or carbon film.
VEE 1167 F04
VCC
VCC
VCC
J2
2N4393
J1
2N4393
OUT
OPTIONAL FOR HIGHEST
ESD PROTECTION
RG
RIN
RIN
+
LT1167 REF
Figure 4. Input Protection
RFI Reduction
In many industrial and data acquisition applications,
instrumentation amplifiers are used to accurately amplify
small signals in the presence of large common mode volt-
ages or high levels of noise. Typically, the sources of these
very small signals (on the order of microvolts or millivolts)
are sensors that can be a significant distance from the
signal conditioning circuit. Although these sensors may be
connected to signal conditioning circuitry, using shielded
or unshielded twisted-pair cabling, the cabling may act
as antennae, conveying very high frequency interference
directly into the input stage of the LT1167.
LT1167
15
1167fc
APPLICATIONS INFORMATION
The amplitude and frequency of the interference can have
an adverse effect on an instrumentation amplifiers input
stage by causing an unwanted DC shift in the amplifiers
input offset voltage. This well known effect is called RFI
rectification and is produced when out-of-band interference
is coupled (inductively, capacitively or via radiation) and
rectified by the instrumentation amplifiers input transis-
tors. These transistors act as high frequency signal detec-
tors, in the same way diodes were used as RF envelope
detectors in early radio designs. Regardless of the type
of interference or the method by which it is coupled into
the circuit, an out-of-band error signal appears in series
with the instrumentation amplifiers inputs.
To significantly reduce the effect of these out-of-band
signals on the input offset voltage of instrumentation am-
plifiers, simple lowpass filters can be used at the inputs.
These filters should be located very close to the input pins
of the circuit. An effective filter configuration is illustrated
in Figure 5, where three capacitors have been added to the
inputs of the LT1167. Capacitors CXCM1 and CXCM2 form
lowpass filters with the external series resistors RS1, 2
to any out-of-band signal appearing on each of the input
traces. Capacitor CXD forms a filter to reduce any unwanted
signal that would appear across the input traces. An added
benefit to using CXD is that the circuit’s AC common mode
rejection is not degraded due to common mode capacitive
imbalance. The differential mode and common mode time
constants associated with the capacitors are:
t
DM(LPF) = (2)(RS)(CXD)
t
CM(LPF) = (RS1, 2)(CXCM1, 2)
Setting the time constants requires a knowledge of the
frequency, or frequencies of the interference. Once this
frequency is known, the common mode time constants can
be set followed by the differential mode time constant. To
avoid any possibility of inadvertently affecting the signal
to be processed, set the common mode time constant an
order of magnitude (or more) larger than the differential
mode time constant. Set the common mode time constants
such that they do not degrade the LT1167’s inherent AC
CMR. Then the differential mode time constant can be set
for the bandwidth required for the application. Setting the
differential mode time constant close to the sensors BW
also minimizes any noise pickup along the leads. To avoid
any possibility of common mode to differential mode signal
conversion, match the common mode time constants to
1% or better. If the sensor is an RTD or a resistive strain
gauge, then the series resistors RS1, 2 can be omitted, if the
sensor is in proximity to the instrumentation amplifier.
“Roll Your Own”—Discrete vs Monolithic LT1167
Error Budget Analysis
The LT1167 offers performance superior to that of “roll
your own” three op amp discrete designs. A typical ap-
plication that amplifies and buffers a bridge transducers
differential output is shown in Figure 6. The amplifier, with
its gain set to 100, amplifies a differential, full-scale output
voltage of 20mV over the industrial temperature range. To
make the comparison challenging, the low cost version of
the LT1167 will be compared to a discrete instrumentation
amp made with the A grade of one of the best precision
quad op amps, the LT1114A. The LT1167C outperforms
the discrete amplifier that has lower VOS, lower IB and
comparable VOS drift. The error budget comparison in
Table 1 shows how various errors are calculated and how
each error affects the total error budget. The table shows
the greatest differences between the discrete solution and
V
V+
IN+
IN
1167 F05
VOUT
RG
CXCM1
0.001μF
CXCM2
0.001μF
CXD
0.1μF
RS1
1.6k
RS2
1.6k
EXTERNAL RFI
FILTER
+
LT1167
f3dB ≈ 500Hz
Figure 5. Adding a Simple RC Filter at the Inputs to an
Instrumentation Amplifier Is Effective in Reducing Rectification
of High Frequency Out-of-Band Signals
LT1167
16
1167fc
APP
LIC
A
TI
ON
S I
N
F
ORMA
TI
ON
+
+
+
35
350Ω
35
350Ω
10V
10k**
PRECISION BRIDGE TRANSDUCER LT1167 MONOLITHIC
INSTRUMENTATION AMPLIFIER
G = 100, RG = ±10ppm TC
SUPPLY CURRENT = 1.3mA MAX
“ROLL YOUR OWN” INST AMP, G = 100
* 0.02% RESISTOR MATCH, 3ppm/°C TRACKING
** DISCRETE 1% RESISTOR, ±100ppm/°C TC
100ppm TRACKING
SUPPLY CURRENT = 1.35mA FOR 3 AMPLIFIERS
1167 F06
RG
499Ω
1/4
LT1114A
1/4
LT1114A
1/4
LT1114A
10k**
202Ω**
10k*
10k* 10k*
10k*
+
LT1167C
REF
Figure 6. “Roll Your Own” vs LT1167
Table 1. “Roll Your Own” vs LT1167 Error Budget
ERROR SOURCE LT1167C CIRCUIT CALCULATION
“ROLL YOUR OWN”’ CIRCUIT
CALCULATION
ERROR, ppm OF FULL SCALE
LT1167C “ROLL YOUR OWN”
Absolute Accuracy at TA = 25°C
Input Offset Voltage, μV
Output Offset Voltage, μV
Input Offset Current, nA
CMR, dB
60μV/20mV
(300μV/100)/20mV
[(450pA)(350/2)Ω]/20mV
110dB[(3.16ppm)(5V)]/20mV
100μV/20mV
[(60μV)(2)/100]/20mV
[(450pA)(350Ω)/2]/20mV
[(0.02% Match)(5V)]/20mV
3000
150
4
790
5000
60
4
500
Drift to 85°C
Gain Drift, ppm/°C
Input Offset Voltage Drift, μV/°C
Output Offset Voltage Drift, μV/°C
(50ppm + 10ppm)(60°C)
[(0.4μV/°C)(60°C)]/20mV
[(6μV/°C)(60°C)]/100/20mV
Total Absolute Error
(100ppm/°C Track)(60°C)
[(1.6μV/°C)(60°C)]/20mV
[(1.1μV/°C)(2)(60°C)]/100/20mV
3944
3600
1200
180
5564
6000
4800
66
Resolution
Gain Nonlinearity, ppm of Full Scale
Typ 0.1Hz to 10Hz Voltage Noise, μVP-P
15ppm
0.28μVP-P/20mV
Total Drift Error
10ppm
(0.3μVP-P)(√2)/20mV
4980
15
14
10866
10
21
Total Resolution Error
Grand Total Error
29
8953
31
16461
G = 100, VS = ±15V
All errors are min/max and referred to input.
the LT1167 are input offset voltage and CMRR. Note that
for the discrete solution, the noise voltage specification is
multiplied by √2 which is the RMS sum of the uncorelated
noise of the two input amplifiers. Each of the amplifier er-
rors is referenced to a full-scale bridge differential voltage
of 20mV. The common mode range of the bridge is 5V. The
LT1114 data sheet provides offset voltage, offset voltage
drift and offset current specifications for the matched op
amp pairs used in the error-budget table. Even with an
excellent matched op amp like the LT1114, the discrete
solution’s total error is significantly higher than the LT1167’s
total error. The LT1167 has additional advantages over
the discrete design, including lower component cost and
smaller size.
Current Source
Figure 7 shows a simple, accurate, low power program-
mable current source. The differential voltage across
Pins2 and 3 is mirrored across RG. The voltage across
RG is amplified and applied across RX, defining the out-
put current. The 50μA bias current flowing from Pin 5 is
buffered by the LT1464 JFET operational amplifier. This
LT1167
17
1167fc
APPLICATIONS INFORMATION
+
3
+IN
RX
VX
IL
–IN
8
1
1167 F07
–VS
VS
5
2
3
4
7
6
1/2
LT1464
RG
2
1
LOAD
IL = = [(+IN) – (–IN)]G
RX
VX
RX
G = + 1
49.4kΩ
RG
+
LT1167 REF
Figure 7. Precision Voltage-to-Current Converter
2
2
–IN
PATIENT
GROUND
OUTPUT
1V/mV
+IN
1
1
8
R6
1M
R7
10k
R8
100Ω
1167 F08
AV = 101
POLE AT 1kHz
5
5
4
–3V –3V
3V
3V
7
68
4
7
6
+
1/2
LT1112
1/2
LT1112
R4
30k
R3
30k
R1
12k
C1
0.01μF
RG
6k
3
3
R2
1M
C2
0.47μF
0.3Hz
HIGHPASS
C3
15nF
PATIENT/CIRCUIT
PROTECTION/ISOLATION
+
LT1167
G = 10 +
Figure 8. Nerve Impulse Amplifier
has the effect of improving the resolution of the current
source to 3pA, which is the maximum IB of the LT1464A.
Replacing RG with a programmable resistor greatly
increases the range of available output currents.
Nerve Impulse Amplifier
The LT1167’s low current noise makes it ideal for high
source impedance EMG monitors. Demonstrating the
LT1167’s ability to amplify low level signals, the circuit in
Figure 8 takes advantage of the amplifiers high gain and
low noise operation. This circuit amplifies the low level
nerve impulse signals received from a patient at Pins 2
and 3. RG and the parallel combination of R3 and R4 set
a gain of ten. The potential on LT1112’s Pin 1 creates a
ground for the common mode signal. C1 was chosen to
maintain the stability of the patient ground. The LT1167’s
high CMRR ensures that the desired differential signal
is amplified and unwanted common mode signals are
attenuated. Since the DC portion of the signal is not
important, R6 and C2 make up a 0.3Hz highpass filter.
The AC signal at LT1112’s Pin 5 is amplified by a gain of
101 set by (R7/R8) +1. The parallel combination of C3
and R7 form a lowpass filter that decreases this gain at
frequencies above 1kHz. The ability to operate at ±3V
on 0.9mA of supply current makes the LT1167 ideal for
battery-powered applications. Total supply current for
this application is 1.7mA. Proper safeguards, such as
isolation, must be added to this circuit to protect the
patient from possible harm.
Low IB Favors High Impedance Bridges,
Lowers Dissipation
The LT1167’s low supply current, low supply voltage
operation and low input bias currents optimize it for
battery-powered applications. Low overall power dis-
sipation necessitates using higher impedance bridges.
The single supply pressure monitor application (Figure 9)
shows the LT1167 connected to the differential output of
a 3.5k bridge. The bridge’s impedance is almost an order
of magnitude higher than that of the bridge used in the
error-budget table. The picoampere input bias currents
keep the error caused by offset current to a negligible
level. The LT1112 level shifts the LT1167’s reference pin
and the ADC’s analog ground pins above ground. The
LT1167’s and LT1112’s combined power dissipation
is still less than the bridge’s. This circuit’s total supply
current is just 2.8mA.
LT1167
18
1167fc
TYPICAL APPLICATION
APP
LIC
A
TI
ON
S I
N
F
ORMA
TI
ON
+
23
2
1
1
1
1/2
LT1112
3.5k
5V
3.5k
3.5k
3.5k
87
6
1167 F09
5
40k
20k
40k
DIGITAL
DATA
OUTPUT
4
G = 200
249Ω
3
REF
IN
AGND
ADC
LTC®1286
BI TECHNOLOGIES
67-8-3 R40KQ
(0.02% RATIO MATCH)
+
LT1167
Figure 9. Single Supply Bridge Amplifier
AC Coupled Instrumentation Amplifier
2
–IN
OUTPUT
+IN
1
8R1
500k
1167 TA04
2
3
5
1
6
C1
0.3μF
+
1/2
LT1112
RG
3
f3dB = 1
(2π)(R1)(C1)
= 1.06Hz
+
LT1167
REF
LT1167
19
1167fc
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
N8 REV I 0711
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 t .005
(3.302 t 0.127)
.020
(0.508)
MIN
.018 t .003
(0.457 t 0.076)
.120
(3.048)
MIN
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255

12 34
87 65
.255 t .015*
(6.477 t 0.381)
.400*
(10.160)
MAX
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
LT1167
20
1167fc
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)s 45o
0o– 8o TYP
.008 – .010
(0.203 0.254)
SO8 0303
.053 – .069
(1.346 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 p.005
RECOMMENDED SOLDER PAD LAYOUT
.045 p.005
.050 BSC
.030 p.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LT1167
21
1167fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REV DATE DESCRIPTION PAGE NUMBER
B 01/11 Added LT1167-1 to Description, Absolute Maximum Ratings, Order Information, Electrical Characteristics and
Applications Information Section
1-6, 15
C 08/11 Correction to TYP specification for SR from 12 to 1.2
Columns shifted to left in CMRR specification
4
4, 5
REVISION HISTORY
(Revision history begins at Rev B)
LT1167
22
1167fc
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1998
LT 0811 REV C • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
4-Digit Pressure Sensor
+
+
2
1
1
1
1
2
R8
392k
LT1634CCZ-1.25
4
11
1/4
LT1114
+
1/4
LT1114
3
5k
5k
5k
5k
9V
9V
5
4
3
2
28
LUCAS NOVA SENOR
NPC-1220-015A-3L
7
6
1167 TA03
5TO
4-DIGIT
DVM
4
8
R5
100k
R3
51k
R4
100k
R1
825Ω
R2
12Ω
C1
1μF
R9
1k
RSET
R6
50k
CALIBRATION
ADJUST
R7
180k
3
12
14
13
6
+
1/4
LT1114
10
9
+
LT1167
G = 60
0.2% ACCURACY AT ROOM TEMP
1.2% ACCURACY AT 0°C TO 60°C
VOLTS
2.800
3.000
3.200
INCHES Hg
28.00
30.00
32.00
PART NUMBER DESCRIPTION COMMENTS
LTC1100 Precision Chopper-Stabilized Instrumentation Amplifier Best DC Accuracy
LT1101 Precision, Micropower, Single Supply Instrumentation Amplifier Fixed Gain of 10 or 100, IS < 105μA
LT1102 High Speed, JFET Instrumentation Amplifier Fixed Gain of 10 or 100, 30V/μs Slew Rate
LT1168 Low Power, Single Resistor Programmable Instrumentation Amplifier ISUPPLY = 530μA Max
LTC1418 14-Bit, Low Power, 200ksps ADC with Serial and Parallel I/O Single Supply 5V or ±5V Operation, ±1.5LSB INL
and ±1LSB DNL Max
LT1460 Precision Series Reference Micropower; 2.5V, 5V, 10V Versions; High Precision
LT1468 16-Bit Accurate Op Amp, Low Noise Fast Settling 16-Bit Accuracy at Low and High Frequencies, 90MHz GBW,
22V/μs, 900ns Settling
LTC1562 Active RC Filter Lowpass, Bandpass, Highpass Responses; Low Noise,
Low Distortion, Four 2nd Order Filter Sections
LTC1605 16-Bit, 100ksps, Sampling ADC Single 5V Supply, Bipolar Input Range: ±10V,
Power Dissipation: 55mW Typ

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