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A3211, A3212 Datasheet

Allegro MicroSystems, LLC

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Datasheet

DFN (EH)
The A3211 and A3212 integrated circuits are ultrasensitive, pole
independent Hall-effect switches with latched digital output.
These devices are especially suited for operation in battery-
operated, hand-held equipment such as cellular and cordless
telephones, pagers, and palmtop computers. A 2.5 to 3.5 V
operation and a unique clocking scheme reduce the average
operating power requirements to less than 15 μW with a
2.75 V supply.
Unlike other Hall-effect switches, either a north or south pole
of sufficient strength will turn the output on in the A3212,
and in the absence of a magnetic field, the output is off. The
A3211 provides an inverted output. The polarity independence
and minimal power requirements allow these devices to easily
replace reed switches for superior reliability and ease of
manufacturing, while eliminating the requirement for signal
conditioning.
Improved stability is made possible through chopper
stabilization (dynamic offset cancellation), which reduces the
residual offset voltage normally caused by device overmolding,
temperature dependencies, and thermal stress.
This device includes on a single silicon chip a Hall-voltage
generator, small-signal amplifier, chopper stabilization, a
latch, and a MOSFET output. Advanced CMOS processing
is used to take advantage of low-voltage and low-power
3211-DS, Rev. 25
MCO-0000146
AEC-Q100 automotive qualified
Micropower operation
Operation with north or south pole
2.5 to 3.5 V battery operation
Chopper stabilized
Superior temperature stability
Extremely low switchpoint drift
Insensitive to physical stress
High ESD protection
Solid-state reliability
Small size
Easily manufacturable with magnet pole independence
Micropower, Ultrasensitive
Hall-Eect Switches
PACKAGES:
Functional Block Diagram
Not to scale
A3211 and A3212
DFN (EL)
SOT23W (LH)
SIP (UA)
TIMING
LOGIC
Dwg. FH-020-5
LATCH
GROUND
OUTPUT
SUPPLY
X
DYNAMIC
OFFSET CANCELLATION
SWITCH
SAMPLE
& HOLD
FEATURES AND BENEFITS DESCRIPTION
Continued on next page....
February 19, 2019
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
2
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
requirements, component matching, very low input-offset errors,
and small component geometries.
Four package styles provide magnetically optimized solutions for
most applications. Miniature low-profile surface-mount package
types EH and EL (0.75 and 0.50 mm nominal height) are leadless, LH
is a 3-pin low-profile SMD, and UA is a three-pin SIP for through-
hole mounting. Packages are lead (Pb) free (suffix, –T) with 100%
matte-tin-plated leadframes.
DESCRIPTION (continued)
ABSOLUTE MAXIMUM RATINGS
Characteristic Symbol Notes Rating Units
Supply Voltage VDD 5 V
Magnetic Flux Density B Unlimited G
Output Off Voltage VOUT 5 V
Output Current IOUT 1 mA
Operating Ambient Temperature TA
Range E –40 to 85 °C
Range L –40 to 150 °C
Maximum Junction Temperature TJ(max) 165 °C
Storage Temperature Tstg –65 to 170 °C
SELECTION GUIDE
Part Number Packing [1] Package Ambient Temperature
TA (°C)
State in
Magnetic Field
A3211EEHLT–T [2][3][4] 3000 pieces per reel 2 mm × 3 mm, 0.75 mm nominal height DFN
–40 to 85 Off
A3211EELLT–T [2][4][5] 3000 pieces per reel 2 mm × 2 mm, 0.50 mm nominal height DFN
A3211ELHLT–T [4] 3000 pieces per reel 3-pin surface mount SOT23W
A3211ELHLX–T [4] 10000 pieces per 13-in. reel 3-pin surface mount SOT23W
A3212EEHLT–T [2][3] 3000 pieces per reel 2 mm × 3 mm, 0.75 mm nominal height DFN
–40 to 85
On
A3212EELLT–T [2][5] 3000 pieces per reel 2 mm × 2 mm, 0.50 mm nominal height DFN
A3212ELHLT–T 3000 pieces per reel 3-pin surface mount SOT23W
A3212ELHLX–T 10000 pieces per 13-in. reel 3-pin surface mount SOT23W
A3212EUA–T 500 pieces per bulk bag SIP-3 through hole
A3212LLHLT–T 3000 pieces per reel 3-pin surface mount SOT23W
–40 to 150A3212LLHLX–T 10000 pieces per 13-in. reel 3-pin surface mount SOT23W
A3212LUA–T 500 pieces per bulk bag SIP-3 through hole
1 Contact Allegro for additional packaging and handling options.
2 Allegro products sold in DFN package types are not intended for automotive applications.
3 Variant is no longer in production. The device should not be purchased for new design applications. Samples are no longer available.
Date of status change: June 1, 2015 (A3212EEHLT-T), December 1, 2015 (A3211EEHLT-T).
4 For automotive sales, please contact the field applications engineer.
5 Variant is in production but has been determined to be LAST TIME BUY. This classification indicates that the product is obsolete and notice has been given. Sale of this
device is currently restricted to existing customer applications. The device should not be purchased for new design applications because of obsolescence in the near
future. Samples are no longer available. Date of status change: September 1, 2016.
SPECIFICATIONS
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
3
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package Suffix ‘UA Pinning
(SIP)
Pinning is shown viewed from branded side.
Package Suffix ‘EH’ Pinning
(Leadless Chip Carrier)
n
X
Dwg. PH-016-2
SUPPLY
GROUND
OUTPUT
V
DD
GROUND
NO
CONNECTION
54
6
13
2
Dwg. PH-016
1
SUPPLY
VDD
GROUND
32
OUTPUT
X
Package Suffix ‘LH’ Pinning
(SOT23W)
Dwg. PH-016-1
SUPPLY
GROUND
OUTPUT
V
DD
12
3
Package Suffix ‘EL Pinning
(Leadless Chip Carrier)
Dwg. PH-016-1
SUPPLY
GROUND
OUTPUT
V
DD
12
3
PINOUT DRAWINGS
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
4
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
ELECTRICAL CHARACTERISTICS: Over operating voltage and temperature range (unless otherwise specified)
Characteristic Symbol Test Conditions Limits
Min. Typ.* Max. Units
Supply Voltage Range VDD Operating 2.5 2.75 3.5 V
Output Leakage Current IOFF VOUT = 3.5 V, Output off <1.0 1.0 µA
Output On Voltage VOUT IOUT = 1 mA, VDD = 2.75 V 100 300 mV
Awake Time tawake 45 90 µs
Period tperiod 45 90 ms
Duty Cycle d.c. 0.1 %
Chopping Frequency fC– 340 kHz
Supply Current
IDD(EN) Chip awake (enabled) 2.0 mA
IDD(DIS) Chip asleep (disabled) 8.0 µA
IDD(AVG)
VDD = 2.75 V 5.1 10 µA
VDD = 3.5 V 6.7 10 µA
* Typical data is at TA = 25°C and VDD = 2.75 V, and is for design information only.
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
5
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A3211 MAGNETIC CHARACTERISTICS: Over operating voltage range (unless otherwise specified)
Characteristic Symbol Test Conditions Limits
Min. Typ. Max. Units
Over Temperature Range E: TA = –40°C to 85°C
Operate Points BOPS South pole to branded side; B > BOP
, VOUT = High (Output Off) 37 55 G
BOPN North pole to branded side; B > BOP
, VOUT = High (Output Off) –55 –40 G
Release Points BRPS South pole to branded side; B < BRP
, VOUT = Low (Output On) 10 31 G
BRPN North pole to branded side; B < BRP
, VOUT = Low (Output On) –34 –10 G
Hysteresis BHYS |BOPx - BRPx| – 5.9 – G
NOTES: 1. Negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G.
2. BOPx = operate point (output turns off); BRPx = release point (output turns on).
3. Typical Data is at TA = +25°C and VDD = 2.75 V and is for design information only.
4. 1 gauss (G) is exactly equal to 0.1 millitesla (mT).
Characteristic Symbol Test Conditions Limits
Min. Typ. Max. Units
Over Temperature Range E: TA = –40°C to 85°C
Operate Points BOPS South pole to branded side; B > BOP
, VOUT = Low (Output On) 37 55 G
BOPN North pole to branded side; B > BOP
, VOUT = Low (Output On) –55 –40 G
Release Points BRPS South pole to branded side; B < BRP
, VOUT = High (Output Off) 10 31 G
BRPN North pole to branded side; B < BRP
, VOUT = High (Output Off) –34 –10 G
Hysteresis BHYS |BOPx - BRPx| – 5.9 – G
Over Temperature Range L: TA = –40°C to 150°C
Operate Points BOPS South pole to branded side; B > BOP
, VOUT = Low (Output On) 37 65 G
BOPN North pole to branded side; B > BOP
, VOUT = Low (Output On) –65 –40 G
Release Points BRPS South pole to branded side; B < BRP
, VOUT = High (Output Off) 10 31 G
BRPN North pole to branded side; B < BRP
, VOUT = High (Output Off) –34 –10 G
Hysteresis BHYS |BOPx - BRPx| – 5.9 – G
NOTES: 1. Negative flux densities are defined as less than zero (algebraic convention), i.e., -50 G is less than +10 G.
2. BOPx = operate point (output turns on); BRPx = release point (output turns off).
3. Typical Data is at TA = +25°C and VDD = 2.75 V and is for design information only.
4. 1 gauss (G) is exactly equal to 0.1 millitesla (mT).
A3212 MAGNETIC CHARACTERISTICS: Over operating voltage range (unless otherwise specified)
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
6
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
TYPICAL OPERATING CHARACTERISTICS
Supply Current
Switch Points
0 50 100
AMBIENT TEMPERATURE IN °°
°°C
-50
Dwg. GH-027-3
SWITCH POINTS IN GAUSS
0
20
40
-20
-40
V
DD
= 2.75 V
150
60
-60
-25 25 75 125
B
OPS
B
RPS
B
RPN
B
OPN
60
SWITCH POINTS IN GAUSS
20
0
-20
-40
2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE IN VOLTS
2.4
Dwg. GH-057-2
2.6
B
OPS
-60
40
B
RPS
B
RPN
B
OPN
T
A
= 25°C
0 25 50 75 100
AMBIENT TEMPERATURE IN °°
°°C
-50
Dwg. GH-028-11
125
-25
AVERAGE SUPPLY CURRENT IN µµ
µµA
7.0
6.0
5.0
3.0
V
DD
=3.5 V
150
V
DD
=2.75 V
V
DD
=2.5 V
4.0
7.0
AVERAGE SUPPLY CURRENT IN µµ
µµA
6.0
5.0
4.0
3.0
2.8 3.0 3.2 3.4 3.6
SUPPLY VOLTAGE IN VOLTS
2.4
Dwg. GH-058-7
2.6
T
A
= 25°C
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
7
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
FUNCTIONAL DESCRIPTION
Low Average Power
Internal timing circuitry activates the IC for 45 µs and deactivates
it for the remainder of the period (45 ms). A short "awake" time
allows for stabilization prior to the sampling and data latching on
the falling edge of the timing pulse. The output during the "sleep"
time is latched in the last sampled state. The supply current is not
affected by the output state.
Chopper-Stabilized Technique
The Hall element can be considered as a resistor array similar to a
Wheatstone bridge. A large portion of the offset is a result of the
mismatching of these resistors. These devices use a proprietary
dynamic offset cancellation technique, with an internal high-fre-
quency clock to reduce the residual offset voltage of the Hall ele-
ment that is normally caused by device overmolding, temperature
dependencies, and thermal stress. The chopper-stabilizing tech-
nique cancels the mismatching of the resistor circuit by chang-
ing the direction of the current flowing through the Hall plate
using CMOS switches and Hall voltage measurement taps, while
maintaing the Hall-voltage signal that is induced by the external
magnetic flux. The signal is then captured by a sample-and-hold
circuit and further processed using low-offset bipolar circuitry.
This technique produces devices that have an extremely stable
quiescent Hall output voltage, are immune to thermal stress, and
have precise recoverability after temperature cycling. A relatively
high sampling frequency is used for faster signal processing capa-
bility can be processed.
More detailed descriptions of the circuit operation can be found
in: Technical Paper STP 97-10, Monolithic Magnetic Hall Sensing
Using Dynamic Quadrature Offset Cancellation and Technical
Paper STP 99-1, Chopper-Stabilized Amplifiers With A Track-and-
Hold Signal Demodulator.
Dwg. WH-017-2
0
PERIOD
"AWAKE"
"SLEEP"
I
DD(EN)
I
DD(DIS)
SAMPLE &
OUTPUT LATCHED
+V
HALL
VOLTAGE
B
+
Dwg. AH-011-2
Dwg. EH-012-1
SAMPLE
& HOLD
X
+V
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
8
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Operation
The output of the A3212 switches low (turns on) when a magnetic
field perpendicular to the Hall element exceeds the operate point
BOPS (or is less than BOPN). After turn-on, the output is capable
of sinking up to 1 mA and the output voltage is VOUT(ON). When
the magnetic field is reduced below the release point BRPS (or
increased above BRPN), the device output switches high (turns
off). The difference in the magnetic operate and release points is
the hysteresis (Bhys) of the device. This built-in hysteresis allows
clean switching of the output even in the presence of external
mechanical vibration and electrical noise. The A3211 functions in
the same manner, except the output voltage is reversed from the
A3212, as shown in the figures to the right.
As used here, negative flux densities are defined as less than zero
(algebraic convention), i.e., -50 G is less than +10 G.
Applications
Allegro's pole-independent processing technique allows for opera-
tion with either a north pole or south pole magnet orientation,
enhancing the manufacturability of the device. The state-of-the-
art technology provides the same output polarity for either pole
face.
It is strongly recommended that an external bypass capacitor be
connected (in close proximity to the Hall element) between the
supply and ground of the device to reduce both external noise
and noise generated by the chopper-stabilization technique. This
is especially true due to the relatively high impedance of battery
supplies.
The simplest form of magnet that will operate these devices is
a bar magnet with either pole near the branded surface of the
device. Many other methods of operation are possible. Extensive
applications information for Hall-effect devices is available in:
Hall-Effect IC Applications Guide, Application Note 27701;
Hall-Effect Devices: Guidelines for Designing Subassemblies
Using Hall-Effect Devices, Application Note 27703.1;
Soldering Methods for Allegro’s Products — SMD and Through-
Hole, Application Note 26009.
All are provided at
www.allegromicro.com
0+B
0
-B
OUTPUT ON
OUTPUT ON
5 V
MAX BOPS
BRPS
BOPN
BRPN
OUTPUT VOLTAGE
MAGNETIC FLUX
A3212
OUTPUT OFF
0+B
0
-B
5 V
MAX
OUTPUT VOLTAGE
MAGNETIC FLUX
OUTPUT OFF
OUTPUT OFF
BRPS
OPS
BOPN
RPN
OUTPUT ON
B
A3211
B
OUTPUT
Dwg. EH-013-2
0.1 µF
SUPPLY
(3 V BATTERY)
50 k Ω
X
V
DD
12
3
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
9
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package EH, 6-Pin DFN
C0.08
7X C
SEATING
PLANE
6
21
E
E
F
C
G
E
D
A
1
6
2
1.00
3.70 1.25
0.50
0.95
0.30
1
6
2.00 ±0.15
0.88
1.57
3.00 ±0.15
0.75 ±0.05
1.224 ±0.050
1.042 +0.100
–0.150
0.25 ±0.05
0.5 BSC
0.55 ±0.10
PCB Layout Reference View
B
Standard Branding Reference View
1
YWW
LLL
NN
Y= Last two digits of year of manufacture
W = Week of manufacture
L= Lot number
N = Last two digits of device part number
For Reference Only – Not for Tooling Use
(Reference DWG-2861 and JEDEC MO-229WCED, Type 1)
Dimensions in millimeters – NOT TO SCALE
Exact case and lead configuration at supplier discretion within limits shown
Branding scale and appearance at supplier discretion
A D
B E
C F
G
Terminal #1 mark area
Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion)
Reference land pattern layout; all pads a minimum of 0.20 mm from all adjacent pads;
adjust as necessary to meet application process requirements and PCB layout tolerances;
when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can
improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
Coplanarity includes exposed thermal pad and terminals
Hall Element (not to scale); U.S. customary dimensions controlling
Active Area Depth, 0.32 mm NOM
PACKAGE OUTLINE DRAWINGS
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
10
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package EL, 3-Pin DFN
For Reference Only – Not for Tooling Use
(Reference DWG-2861 and JEDEC MO-229UCCD)
All dimension nominal –Dimensions in millimeters – NOT TO SCALE
Exact case and lead configuration at supplier discretion within limits shown
E
E
E
F
C
D
B
2
3
1
2
2.00
0.30
0.30
0.325
0.138
2.40
0.65
1.00
0.925
2.00
0.50
1.00
0.40
0.25
1.250
0.925
0.138
0.325
1
3
A
A
B
C
1.250
1.03
0.74
Terminal #1 mark area
Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion)
Reference land pattern layout (reference IPC7351); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
Coplanarity includes exposed thermal pad and terminals
Hall element (not to scale); U.S. customary dimensions controlling
Active area depth = 0.18
E
F
D
C
0.08
9X
SEATING
PLANE
C
1
3
PCB Layout Reference View
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
11
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
A
B
C
D
C
For Reference Only Not for Tooling Use
(Reference DWG-2840)
Dimensions in millimeters–NOTTO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Reference land pattern layout; all pads a minimum of 0.20 mm from all adjacent pads;
adjust as necessary to meet application process requirements and PCB layout tolerances
Active Area Depth, 0.28 mm
Hall elements, not to scale
= Last three digits of device part numberN
Standard Branding Reference View
NNN
Branding scale and appearance at supplier discretion
Seating Plane
Gauge Plane PCB Layout Reference View
0.55 REF
0.25 BSC
0.95 BSC
0.95
1.00
0.70
2.40
2
1
B
A
Branded Face
2.90
+0.10
–0.20
4° ±4°
8X 10°
REF
0.180 +0.020
–0.053
0.05 +0.10
–0.05
0.25 MIN
1.91 +0.19
–0.06
2.98 +0.12
–0.08
1.00 ±0.13
0.40 ±0.10
D
D
D
1.49
0.96
3
Package LH, 3-Pin SOT-23W
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
12
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package UA, 3-Pin SIP
For Reference Only – Not for Tooling Use
(Reference DWG-9065)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
231
1.27 NOM
1.02 MAX 1.02 MAX
0.79 REF
B
A
B
C
A
D
E
D
E
E
2.04
1.44 E
Branding scale and appearance at supplier discretion
Hall element, not to scale
Mold Ejector
Pin Indent
Branded
Face
4.09+0.08
–0.05
0.41 +0.03
–0.06
3.02+0.08
–0.05
0.43+0.05
–0.07
14.99 ±0.25
Dambar removal protrusion (6X)
Gate and tie bar burr area
Active Area Depth, 0.50 mm REF
NNN
Standard Branding Reference View
= Supplier emblem
= Last three digits of device part numberN
2 X 45°
C
45°
3 X 10°
1.52 ±0.05
1
Micropower, Ultrasensitive
Hall-Effect Switches
A3211 and
A3212
13
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Revision History
Number Date Description
18 December 11, 2013 Update application note references
19 August 1, 2014 Revised footnote on Selection Guide
20 January 1, 2015 Added LX option to Selection Guide
21 September 22, 2015 Corrected LH package Active Area Depth value; added AEC-Q100 qualification under
Features and Benefits
22 December 1, 2015 Updated product status in Selection Guide and footnotes
23 December 5, 2016 Updated product status in Selection Guide and footnotes
24 February 27, 2017 Minor editorial updates
25 February 19, 2019 Minor editorial updates
For the latest version of this document, visit our website:
www.allegromicro.com
Copyright ©2019, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.

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