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A1391-93, A1395 Datasheet

Allegro MicroSystems, LLC

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Datasheet

Description
The A139x family of linear Hall effect sensor integrated circuits
(ICs) provide a voltage output that is directly proportional to
an applied magnetic field. Before amplification, the sensitivity
of typical Hall effect ICs (measured in mV/G) is directly
proportional to the current flowing through the Hall effect
transducer element inside the ICs. In many applications, it
is difficult to achieve sufficient sensitivity levels with a Hall
effect sensor IC without consuming more than 3 mA of current.
The A139x minimize current consumption to less than 25 µA
through the addition of a user-selectable sleep mode. This makes
these devices perfect for battery-operated applications such as:
cellular phones, digital cameras, and portable tools. End users
can control the current consumption of the A139x by applying a
logic level signal to the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin. The outputs of the devices
are not valid (high-impedance mode) during sleep mode. The
high-impedance output feature allows the connection of multiple
A139x Hall effect devices to a single A-to-D converter input.
The quiescent output voltage of these devices is 50 % nominal of
the ratiometric supply reference voltage applied to the VREF pin
of the device. The output voltage of the device is not ratiometric
with respect to the SUPPLY pin.
1391-DS, Rev. 8
MCO-0000591
Features and Benefits
▪ High-impedanceoutputduringsleepmode
▪ Compatiblewith2.5to3.5Vpowersupplies
▪ 10mWpowerconsumptionintheactivemode
▪ MiniatureMLP/DFNpackage
▪ Ratiometricoutputscaleswiththeratiometricsupply
reference voltage (VREF pin)
▪ Temperature-stablequiescentoutputvoltageand
sensitivity
▪ Wideambienttemperaturerange:–20°Cto85°C
▪ ESDprotectiongreaterthan3kV
▪ Solid-statereliability
▪ Presetsensitivityandoffsetatfinaltest
Micro Power 3 V Linear Hall Effect Sensor ICs
withTri-State Output and User-Selectable Sleep Mode
Continued on the next page…
Package: 6 pin MLP/DFN (suffix EH)
Functional Block Diagram
Approximate scale
A1391, A1392, A1393, and A1395
Amp Out
VCC
OUT
GND
Filter
Dynamic Offset
Cancellation
Gain
Offset
Hall Element
Regulator
Programming Logic
Circuit Reference Current
To all subcircuits
RRatio / 2
RRatio / 2
VREF
SLEEP
February 13, 2019
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
2
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Terminal List Table
Pin Name Function
1 VCC Supply
2 OUT Output
3 GND Ground
4 GND Ground
5 ¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯ Toggle sleep mode
6 VREF Supply for ratiometric reference
Despite the low power consumption of the circuitry in the A139x,
the features required to produce a highly-accurate linear Hall effect
IChavenotbeencompromised.EachBiCMOSmonolithiccircuit
integrates a Hall element, improved temperature-compensating
circuitry to reduce the intrinsic sensitivity drift of the Hall element,
a small-signal high-gain amplifier, and proprietary dynamic
offset cancellation circuits. End of line, post-packaging, factory
programming allows precise control of device sensitivity and
offset.
These devices are available in a small 2.0 × 3.0 mm, 0.75 mm nominal
heightmicroleadedpackage(MLP/DFN).ItisPb(lead)free,with
100% matte tin leadframe plating.
Absolute Maximum Ratings*
Characteristic Symbol Notes Rating Unit
Supply Voltage VCC 8 V
Reverse-Supply Voltage VRCC –0.1 V
Ratiometric Supply Reference Voltage VREF 7 V
Reverse-Ratiometric Supply Reference Voltage VRREF –0.1 V
Logic Supply Voltage V¯S¯ ¯L¯ ¯E¯ ¯E¯ ¯P¯ (VCC > 2.5 V) 32 V
Reverse-Logic Supply Voltage VR¯S¯ ¯L¯ ¯E¯ ¯E¯ ¯P¯ –0.1 V
Output Voltage VOUT VCC + 0.1 V
Reverse-Output Voltage VROUT –0.1 V
Operating Ambient Temperature TA Range S –20 to 85 ºC
Junction Temperature TJ(MAX) 165 ºC
StorageTemperature Tstg –65 to 170 ºC
*All ratings with reference to ground
Selection Guide
Part Number Sensitivity
(mV / G, Typ.) Package Packing1
A1391SEHLT-T21.25 DFN/MLP 2×3 mm; 0.75 mm nominal height 7-in. reel, 3000 pieces/reel
A1392SEHLT-T22.50 DFN/MLP 2×3 mm; 0.75 mm nominal height 7-in. reel, 3000 pieces/reel
A1393SEHLT-T25DFN/MLP 2×3 mm; 0.75 mm nominal height 7-in. reel, 3000 pieces/reel
A1395SEHLT-T210 DFN/MLP 2×3 mm; 0.75 mm nominal height 7-in. reel, 3000 pieces/reel
1Contact Allegro for additional packing options.
2Allegro products sold in DFN package types are not intended for automotive applications.
6
5
1
2
3 4
VCC
OUT
GND
VREF
GND
SLEEP
Description (continued)
Pin-out Diagram
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
3
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Device Characteristics Tables
ELECTRICAL CHARACTERISTICS valid through full operating ambient temperature range, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ.1Max. Units
Supply Voltage VCC 2.5 3.5 V
Nominal Supply Voltage VCCN 3.0 – V
Supply Zener Clamp Voltage VCCZ ICC = 7 mA, TA = 25°C 6 8.3 V
Ratiometric Reference Voltage2VREF 2.5 – VCC V
Ratiometric Reference Zener Clamp Voltage VREFZ IVREF = 3 mA, TA = 25°C 6 8.3 V
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
Input Voltage –0.1 – VCC + 0.5 V
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
Input Threshold VINH For active mode 0.45 × VCC – V
VINL For sleep mode 0.20 × VCC – V
Ratiometric Reference Input Resistance RREF
VSLEEP > VINH , VCC = VCCN,
TA = 25°C 250
VSLEEP < VINL, VCC = VCCN,
TA = 25°C 5
Chopper Stabilization Chopping Frequency fCVCC = VCCN, TA = 25°C 200 kHz
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
Input Current ISLEEP VSLEEP = 3 V, VCC = VCCN 1 μA
Supply Current3ICC
VSLEEP < VINL, VCC = VCCN,
TA = 25°C 0.025 – mA
VSLEEP > VINH , VCC = VCCN,
TA = 25°C 3.2 mA
Quiescent Output Power Supply Rejection4PSRVOQ fAC < 1 kHz –60 dB
1Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
2 Voltage applied to the VREF pin. Note that the VREF voltage must be less than or equal to Vcc. Degradation in device accuracy will occur with applied
voltages of less than 2.5 V.
3 If the VREF pin is tied to the VCC pin, the supply current would be ICC + VREF / RREF
4 fAC is any AC component frequency that exists on the supply line.
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
4
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
OUTPUT CHARACTERISTICS valid through full operating ambient temperature range, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ.1Max. Units
Linear Output Voltage
Range
VOUTH VCC = VCCN, VREF ≤ VCC – VREF – 0.1 V
VOUTL VCC = VCCN, VREF ≤ VCC – 0.1 V
Maximum Voltage Applied
to Output VOUTMAX VSLEEP < VINL – VCC + 0.1 V
Sensitivity2Sens
A1391 TA = 25°C, VCC = VREF = VCCN 1.25 – mV/G
A1392 TA = 25°C, VCC = VREF = VCCN 2.50 – mV/G
A1393 TA = 25°C, VCC = VREF = VCCN 5 – mV/G
A1395 TA = 25°C, VCC = VREF = VCCN 10 – mV/G
Quiescent Output VOUTQ TA = 25°C, B = 0 G 0.500 × VREF – V
Output Resistance3ROUT
fout = 1 kHz, VSLEEP > VINH
, active mode 20 Ω
fout = 1 kHz, VSLEEP < VINL, sleep mode 4M Ω
Output Load Resistance RLOutput to ground 15
Output Load Capacitance CLOutput to ground 10 nF
Output Bandwidth BW –3 dB point, VOUT = 1 Vpp sinusoidal,
VCC = VCCN
10 – kHz
Noise4,5 Vn
1391
Cbypass = 0.1 µF,
BWexternalLPF = 2 kHz 6 12 mVpp
Cbypass = 0.1 µF, no load 20 mVpp
1392 Cbypass = 0.1 µF, no load 40 mVpp
1393
Cbypass = 0.1 µF,
BWexternalLPF = 2 kHz 12 24 mVpp
Cbypass = 0.1 µF, no load 40 mVpp
1395 Cbypass = 0.1 µF, no load 80 mVpp
1Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
2For VREF values other than VREF = VCCN , the sensitivity can be derived from the following equation: K × VREF
, where K =0.416 for the A1391, K= 0.823
for the A1392, K = 1.664 for the A1393, and K = 3.328 for the A1395.
3f OUT is the output signal frequency
4Noise specification includes digital and analog noise.
5Values for BWexternalLPF do not include any noise resulting from noise on the externally-supplied VREF voltage.
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
5
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
OUTPUT TIMING CHARACTERISTICS1 TA = 25°C
Characteristic Symbol Test Conditions Min. Typ.2Max. Units
Power-On Time3tPON 40 60 µs
Power-Off Time4tPOFF – 1 – µs
1See figure 1 for explicit timing delays.
2Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
3Power-On Time is the elapsed time after the voltage on the ¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin exceeds the active mode threshold voltage,VINH, until the time the device output
reaches 90% of its value.
4Power-Off Time is the duration of time between when the signal on the ¯
¯
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin switches from HIGH to LOW and when ICC drops to under 100 μA.
During this time period, the output goes into the HIGH impedance state.
MAGNETIC CHARACTERISTICS TA = 25°C
Characteristic Symbol Test Conditions Min. Typ.* Max. Units
Ratiometry ΔVOUTQ(ΔV) – 100 – %
Ratiometry ΔSens(ΔV) – 100 – %
Positive Linearity Lin+ – 100 – %
Negative Linearity Lin – – 100 – %
Symmetry Sym – 100 – %
*Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance
may vary for individual units, within the specified maximum and minimum limits.
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
6
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Sleep Mode
Active Mode
-20 -5 10 25 40 55 70 85
Supply Current versus Ambient Temperature
A139x, V
CC
= V
REF
= 3 V
-20 -5 10 25 40 55 70 85
T
A
(°C)
I
CC
(mA)
I
REF
(µA)
I
SLEEP
(µA)
Ratiometric Reference Input Current
versus Ambient Temperature
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1
5
7
3
9
11
13
15
17
19
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
T
A
(°C) T
A
(°C)
SLEEP Input Current
versus Ambient Temperature
A139x, V
CC
= V
REF
= V
SLEEP
= 3 VA139x, V
CC
= V
REF
= V
SLEEP
= 3 V
-20 -5 10 25 40 55 70 85
Electrical Characteristic Data
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
7
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
(A139x)
99.0
99.2
99.4
99.6
99.8
100.0
100.2
100.4
100.6
100.8
101.0
-20-5102540557085
T
A
(°C)
Average Ratiometry, Voq (%)
2.5 to 3 V
3.5 to 3 V
(A1391)
97.5
98.0
98.5
99.0
99.5
100.0
100.5
101.0
101.5
102.0
-20 -5 10 25 40 55 70 85
T
A
(°C
)
Average Ratiometry, Sens (%)
2.5 to 3 V
(A1392)
97.5
98.0
98.5
99.0
99.5
100.0
100.5
101.0
101.5
102.0
-20-5102540557085
T
A
(°C)
Average Ratiometry, Sens (%)
2.5 to 3 V
3.5 to 3 V
Average Ratiometry, V
OUTQ
, versus Ambient Temperture
Average Ratiometry, Sens, versus Ambient Temperture Average Ratiometry, Sens, versus Ambient Temperture
Magnetic Characteristic Data
Average Symmetry, Vcc=Vref=Vsleep=3V
(A139x)
97.5
98.0
98.5
99.0
99.5
100.0
100.5
101.0
101.5
102.0
-20 -5 10 25 40 55 70 85
T
A
(°C)
Average Symetry (%)
Average Linearity
(A139x)
97.0
97.5
98.0
98.5
99.0
99.5
100.0
100.5
101.0
101.5
102.0
-20 -5 10 25 40 55 70 85
TA (°C)
Average Linearity (%)
Linearity - , Vcc=3.5V
Linearity +, Vcc=3.5V
Linearity +, Vcc=2.5V
Linearity -, Vcc = 2.5V
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
8
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions Min. Units
Package Thermal Resistance RθJA
1-layer PCB with copper limited to solder pads 221 ºC/W
2-layer PCB with 0.6 in.2 of copper area each side, connected by
thermal vias 70 ºC/W
4-layer PCB based on JEDEC standard 50 ºC/W
0
500
1000
1500
2000
2500
3000
3500
4000
4500
20 40 60 80 100 120 140 160 180
Temperature (°C)
Power Dissipation, P
D
(mW)
Power Dissipation versus Ambient Temperature
(R
θJA
= 70 ºC/W)
2-layer PCB
(R
θJA
= 50 ºC/W)
4-layer PCB
(R
θJA
= 221 ºC/W)
1-layer PCB
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
9
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Characteristics Definitions
Ratiometric. The A139x devices feature ratiometric output.
The quiescent voltage output and sensitivity are proportional to
the ratiometric supply reference voltage.
The percent ratiometric change in the quiescent voltage output is
defined as:
VREF ÷ 3 V
V
OUTQ(VREF)V
OUTQ(3V)
V
OUTQ(V)
÷
=× 100 %(1)
and the percent ratiometric change in sensitivity is defined as:
VREF ÷ 3 V
÷
=× 100%
Sens(V)
Sens(VREF)Sens(3V)(2)
Linearity and Symmetry. The on-chip output stage is
designed to provide a linear output with maximum supply voltage
of VCCN. Although application of very high magnetic fields will
not damage these devices, it will force the output into a non-lin-
ear region. Linearity in percent is measured and defined as
=× 100 %
Lin+
V
OUT(+B)
2(V
OUT(+B / 2) – V
OUTQ )
V
OUTQ (3)
=× 100 %
Lin–
V
OUT(–B)
2(V
OUT(–B / 2) – V
OUTQ )
V
OUTQ (4)
and output symmetry as
=× 100 %
Sym
V
OUT(+B)
V
OUTQ – V
OUT(–B)
V
OUTQ (5)
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
10
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Device Low-Power Functionality
A139x are low-power Hall effect sensor ICs that are perfect for
power sensitive customer applications. The current consumption
of these devices is typically 3.2 mA, while the device is in the
active mode, and less than 25 µA when the device is in the sleep
mode. Toggling the logic level signal connected to the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin
drives the device into either the active mode or the sleep mode.
A logic low sleep signal drives the device into the sleep mode,
while a logic high sleep signal drives the device into the active
mode.
In the case in which the VREF pin is powered before the VCC
pin, the device will not operate within the specified limits until
thesupplyvoltageisequaltothereferencevoltage.Whenthe
device is switched from the sleep mode to the active mode, a time
defined by tPON must elapse before the output of the device is
valid. The device output transitions into the high impedance state
approximately tPOFFseconds after a logic low signal is applied to
the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin (see figure 1).
If possible, it is recommended to power-up the device in the
sleep mode. However, if the application requires that the device
bepoweredonintheactivemode,thena10kΩresistorinseries
with the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin is recommended. This resistor will limit the
current that flows into the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin if certain semiconductor
junctions become forward biased before the ramp up of the volt-
ageontheVCCpin.Notethatthiscurrentlimitingresistorisnot
required if the user connects the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin directly to the VCC
pin. The same precautions are advised if the device supply is
powered-off while power is still applied to the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin.
B
field
VCC
VSLEEP
ICC
VOUT
t
PON
t
PON
+B
0
–B
t
POFF
t
POFF
HIGH
IMPEDANCE
HIGH
IMPEDANCE
HIGH
IMPEDANCE
Figure 1. A139x Timing Diagram
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
11
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Device Supply Ratiometry Application Circuit
Figures 2 and 3 present applications where the VCC pin is con-
nected together with the VREF pin of the A139x. Both of these
pins are connected to the battery, Vbat2. In this case, the device
output will be ratiometric with respect to the battery voltage.
The only difference between these two applications is that the
S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin in figure 2 is connected to the Vbat2 potential, so the
device is always in the active mode. In figure 3, the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin is
toggled by the microprocessor; therefore, the device is selectively
and periodically toggled between active mode and sleep mode.
In both figures, the device output is connected to the input of an
A-to-D converter. In this configuration, the converter reference
voltage is Vbat1.
It is strongly recommended that an external bypass capacitor be
connected, in close proximity to the A139x device, between the
VCCandGNDpinsofthedevicetoreducebothexternalnoise
and noise generated by the chopper-stabilization circuits inside of
the A139x.
Vbat1 C
bypass
VCC
OUT
GND GND
SLEEP
VREF
Vbat2
A139x
Micro-
processor
Supply pin
I/O
I/O
Figure 2. Application circuit showing sleep mode disabled and output ratiometirc to the
A139x supply.
Figure 3. Application circuit showing microprocessor-controlled sleep mode and output ratiome-
tirc to the A139x supply.
Vbat1 Vbat2
processor
Supply pin
I/O
I/O
C
bypass
VCC
OUT
GND GND
SLEEP
VREF
Micro-
A139x
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
12
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Application Circuit with User-Configurable Ratiometry
Cfilter Cbypass Vbat2
Micro-
processor
Supply pin
I/O
I/O
Vbat1
VCC
OUT
GND GND
SLEEP
VREF
A139x
Vbat2
Micro-
processor
Supply pin
I/O
I/O
Vbat1
Cfilter Cbypass
VCC
OUT
GND GND
SLEEP
VREF
A139x
Figure 4. Application circuit showing ratiometry of VREF
. Sleep mode is disabled and the VREF
pin is tied to the microprocessor supply.
Figure 5. Application circuit showing device reference pin, VREF, tied to microprocessor supply. The device
sleep mode also is controlled by the microprocessor.
In figures 4 and 5, the microprocessor supply voltage determines
the ratiometric performance of the A139x output signal. As in the
circuits shown in figures 2 and 3, the device is powered by the
Vbat2 supply, but in this case, ratiometry is determined by the
microprocessor supply, Vbat1.
The S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin is triggered by the output logic signal from the
microprocessor in figure 5, while in figure 4, the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pin is
connected to the device power supply pin. Therefore, the device
as configured in figure 4 is constantly in active mode, while
the device as confiugred in figure 5 can be periodically toggled
between the active and sleep modes.
The capacitor Cfilter is optional, and can be used to prevent pos-
sible noise transients from the microprocessor supply reaching
the device reference pin, VREF.
It is strongly recommended that an external bypass capacitor be
connected, in close proximity to the A139x device, between the
VCCandGNDpinsofthedevicetoreducebothexternalnoise
and noise generated by the chopper-stabilization circuits inside of
the A139x.
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
13
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Summary of Single-Device Application Circuits
Application Circuit
Device Pin Connections
Device Output
VREF pin (Ratiometric
Reference Supply) ¯S¯ ¯L¯ ¯E¯ ¯E¯ ¯P¯ p i n
Vbat1 C
bypass
VCC
OUT
GND GND
SLEEP
VREF
Vbat2
A139x
Micro-
processor
Supply pin
I/O
I/O
Connected to
A139x device supply,
VCC
Connected to
A139x device supply,
VCC
Ratiometric to device
supply (VCC), and
always valid
Vbat1 Vbat2
processor
Supply pin
I/O
I/O
Cbypass
VCC
OUT
GND GND
SLEEP
VREF
Micro- A139x
Connected to
A139x device supply,
VCC
Controlled by
microprocessor
Ratiometric to device
supply (VCC), and
controlled by the
microprocessor
Cfilter Cbypass Vbat2
Micro-
processor
Supply pin
I/O
I/O
Vbat1
VCC
OUT
GND GND
SLEEP
VREF
A139x Connected to
microprocessor supply
Connected to
A139x device supply,
VCC
Ratiometric to micro-
processor supply, and
always valid
Vbat2
Micro-
processor
Supply pin
I/O
I/O
Vbat1
Cfilter Cbypass
VCC
OUT
GND GND
SLEEP
VREF
A139x Connected to
microprocessor supply
Controlled by
microprocessor
Ratiometric to micro-
processor supply,
and controlled by the
microprocessor
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
14
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Application Circuit with Multiple Hall Devices and a Single A-to-D Converter
MultipleA139xdevicescanbeconnectedtoasinglemicro-
processor or A-to-D converter input. In this case, a single
device is periodically triggered and put into active mode by
themicroprocessor.WhileoneA139xdeviceisinactive
mode, all of the other A139x devices must remain in sleep
mode.Whilethesedevicesareinsleepmode,theiroutputs
are in a high-impedance state. In this circuit configuration,
the microprocessor reads the output of one device at a time,
according to microprocessor input to the S
¯
¯
L
¯
¯
E
¯
¯
E
¯
¯
P
¯
pins.
Whenmultipledeviceoutputsareconnectedtothesame
microprocessor input, pulse timing from the microproces-
sor (for example, lines A1 through A4 in figure 6) must be
configured to prevent more than one device from being in the
awake mode at any given time of the application. A device
output structure can be damaged when its output voltage is
forced above the device supply voltage by more than 0.1 V.
Figure 6. Application circuit showing multiple A139x devices, controlled by a single microprocessor.
Cbypass
VCC
OUT
GND GND
SLEEP
VREF
Vbat2
A139x
Vbat2
Vbat2
Vbat2
A1
A2
A3
A4
Supply pin
Microprocessor
I/O
Vbat1
A1
A2
A3
A4
Cfilter
Cbypass
VCC
OUT
GND GND
SLEEP
VREF
A1391x
Cbypass
VCC
OUT
GND GND
SLEEP
VREF
A139x
Cbypass
VCC
OUT
GND GND
SLEEP
VREF
A139x
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
15
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package EH, 6-pin MLP/DFN
C0.08
7X C
SEATING
PLANE
6
21
A
ATerminal #1 mark area
BExposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
For Reference Only, not for tooling use (reference DWG-2861;
reference JEDEC MO-229WCED, Type 1)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
CReference land pattern layout;
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
Hall Element (not to scale); U.S. customary dimensions controlling
Branding scale and appearance at supplier discretion
E
E
E
1
6
B
2
F
E
FActive Area Depth, 0.32 mm NOM
1.00
3.70 1.25
0.50
0.95
0.30
1
6
G
G
PCB Layout Reference View
C
2.00 ±0.15
1.00
1.50
3.00 ±0.15
0.75 ±0.05
1.224 ±0.050
1.042 +0.100
–0.150
0.25 ±0.05
0.5 BSC
0.55 ±0.10
D
DCoplanarity includes exposed thermal pad and terminals
Standard Branding Reference View
Y = Last two digits of year of manufacture
W = Week of manufacture
L = Lot number
N = Last two digits of device part number
YWW
LLL
NN
1
Micro Power 3 V Linear Hall Effect Sensor ICs
with Tri-State Output and User Selectable Sleep Mode
A1391, A1392,
A1393, and A1395
16
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Revision History
Revision Revision Date Description of Revision
Rev. 7 October 26, 2011 Update Selection Guide
Rev. 8 February 13, 2019 Minor editorial updates
Copyright ©2019, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.

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